[llvm] ed51908 - [RISCV] Emit VP strided load in mgather combine. NFCI (#98112)
via llvm-commits
llvm-commits at lists.llvm.org
Mon Jul 8 23:57:25 PDT 2024
Author: Luke Lau
Date: 2024-07-09T14:57:21+08:00
New Revision: ed51908cec879c9dff435abdc70d8b03afc35c07
URL: https://github.com/llvm/llvm-project/commit/ed51908cec879c9dff435abdc70d8b03afc35c07
DIFF: https://github.com/llvm/llvm-project/commit/ed51908cec879c9dff435abdc70d8b03afc35c07.diff
LOG: [RISCV] Emit VP strided load in mgather combine. NFCI (#98112)
This combine is a duplication of the transform in
RISCVGatherScatterLowering but at the SelectionDAG level, so similarly
to #98111 we can replace the use of riscv_masked_strided_load with a VP
strided load.
Unlike #98111 we don't require #97800 or #97798 since it only operates
on fixed vectors with a non-zero stride.
Added:
Modified:
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index 74b2f8cb50d25..e2b6a98bc72ff 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -17062,15 +17062,16 @@ SDValue RISCVTargetLowering::PerformDAGCombine(SDNode *N,
SDValue BasePtr = DAG.getNode(ISD::ADD, DL, PtrVT, MGN->getBasePtr(),
DAG.getConstant(Addend, DL, PtrVT));
- SDVTList VTs = DAG.getVTList({VT, MVT::Other});
- SDValue IntID =
- DAG.getTargetConstant(Intrinsic::riscv_masked_strided_load, DL,
- XLenVT);
- SDValue Ops[] =
- {MGN->getChain(), IntID, MGN->getPassThru(), BasePtr,
- DAG.getConstant(StepNumerator, DL, XLenVT), MGN->getMask()};
- return DAG.getMemIntrinsicNode(ISD::INTRINSIC_W_CHAIN, DL, VTs,
- Ops, VT, MGN->getMemOperand());
+ SDValue EVL = DAG.getElementCount(DL, Subtarget.getXLenVT(),
+ VT.getVectorElementCount());
+ SDValue StridedLoad =
+ DAG.getStridedLoadVP(VT, DL, MGN->getChain(), BasePtr,
+ DAG.getConstant(StepNumerator, DL, XLenVT),
+ MGN->getMask(), EVL, MGN->getMemOperand());
+ SDValue VPSelect = DAG.getNode(ISD::VP_SELECT, DL, VT, MGN->getMask(),
+ StridedLoad, MGN->getPassThru(), EVL);
+ return DAG.getMergeValues({VPSelect, SDValue(StridedLoad.getNode(), 1)},
+ DL);
}
}
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