[llvm] [RISCV] Add QingKe "XW" compressed opcode extension (PR #97925)

[Pengcheng Wang via llvm-commits]

https://github.com/wangpc-pp approved this pull request.

LGTM and maybe you can append a line to `llvm/docs/ReleaseNotes.rst` (`Changes to the RISC-V Backend` section)

After this patch, we can also add `-mcpu`/`-mtune` support of QingKe cores.

https://github.com/llvm/llvm-project/pull/97925