[llvm] [llvm][AArch64] Fix a crash with an incorrect asm constraint (PR #98071)

[Jon Roelofs via llvm-commits]

https://github.com/jroelofs created https://github.com/llvm/llvm-project/pull/98071

Fixes: rdar://130887714

>From 46baae2b08eb62a6e877fd1f9b136dfef203d91b Mon Sep 17 00:00:00 2001
From: Jon Roelofs <jonathan_roelofs at apple.com>
Date: Mon, 8 Jul 2024 13:04:44 -0700
Subject: [PATCH] [llvm][AArch64] Fix a crash with an incorrect asm constraint

Fixes: rdar://130887714
---
 .../Target/AArch64/AArch64ISelLowering.cpp    |  2 ++
 .../AArch64/asm-ld1-wrong-constraint.ll       | 23 +++++++++++++++++++
 2 files changed, 25 insertions(+)
 create mode 100644 llvm/test/CodeGen/AArch64/asm-ld1-wrong-constraint.ll

diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index ede8cbf39b4a9..7115e38750600 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -11481,6 +11481,8 @@ AArch64TargetLowering::getRegForInlineAsmConstraint(
           return std::make_pair(0U, &AArch64::ZPRRegClass);
         return std::make_pair(0U, nullptr);
       }
+      if (VT == MVT::Other)
+        break;
       uint64_t VTSize = VT.getFixedSizeInBits();
       if (VTSize == 16)
         return std::make_pair(0U, &AArch64::FPR16RegClass);
diff --git a/llvm/test/CodeGen/AArch64/asm-ld1-wrong-constraint.ll b/llvm/test/CodeGen/AArch64/asm-ld1-wrong-constraint.ll
new file mode 100644
index 0000000000000..b62c18ccfbcd2
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/asm-ld1-wrong-constraint.ll
@@ -0,0 +1,23 @@
+; RUN: not llc < %s -o - 2>&1 | FileCheck %s
+
+target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
+target triple = "arm64-apple-macosx"
+
+%struct.uint64x2x4_t = type { [4 x <2 x i64>] }
+
+define i64 @rdar130887714(ptr noundef %0) {
+  %2 = alloca ptr, align 8
+  %3 = alloca %struct.uint64x2x4_t, align 16
+  store ptr %0, ptr %2, align 8
+  %4 = load ptr, ptr %2, align 8
+  call void asm sideeffect "ld1 { $0.2d, ${0:T}.2d, ${0:U}.2d, ${0:V}.2d} , [$1]", "*w,r"(ptr elementtype(%struct.uint64x2x4_t) %3, ptr %4) #0, !srcloc !0
+; CHECK: error: Don't know how to handle indirect register inputs yet for constraint 'w' at line 250
+
+  %5 = getelementptr inbounds %struct.uint64x2x4_t, ptr %3, i32 0, i32 0
+  %6 = getelementptr inbounds [4 x <2 x i64>], ptr %5, i64 0, i64 0
+  %7 = load <2 x i64>, ptr %6, align 16
+  %8 = extractelement <2 x i64> %7, i32 1
+  ret i64 %8
+}
+
+!0 = !{i64 250}
\ No newline at end of file