[compiler-rt] 87e914d - [compiler-rt][X86] Unify getAMDProcessorTypeAndSubType (#97863)
via llvm-commits
llvm-commits at lists.llvm.org
Mon Jul 8 11:03:33 PDT 2024
Author: Aiden Grossman
Date: 2024-07-08T11:03:29-07:00
New Revision: 87e914db85572c4d9fe924616141dcc9a5d66177
URL: https://github.com/llvm/llvm-project/commit/87e914db85572c4d9fe924616141dcc9a5d66177
DIFF: https://github.com/llvm/llvm-project/commit/87e914db85572c4d9fe924616141dcc9a5d66177.diff
LOG: [compiler-rt][X86] Unify getAMDProcessorTypeAndSubType (#97863)
This patch unifies the implementation of getAMDProcessorTypeAndSubtype
between compiler-rt and LLVM.
This patch is intended to be a step towards pulling these functions out
into identical .inc files to better facilitate code sharing between LLVM
and compiler-rt.
Added:
Modified:
compiler-rt/lib/builtins/cpu_model/x86.c
llvm/lib/TargetParser/Host.cpp
Removed:
################################################################################
diff --git a/compiler-rt/lib/builtins/cpu_model/x86.c b/compiler-rt/lib/builtins/cpu_model/x86.c
index 7e8acb3e73eda9..ab2b685e67ef8e 100644
--- a/compiler-rt/lib/builtins/cpu_model/x86.c
+++ b/compiler-rt/lib/builtins/cpu_model/x86.c
@@ -367,13 +367,13 @@ static void detectX86FamilyModel(unsigned EAX, unsigned *Family,
}
}
+#define testFeature(F) (Features[F / 32] & (1 << (F % 32))) != 0
+
static const char *getIntelProcessorTypeAndSubtype(unsigned Family,
unsigned Model,
const unsigned *Features,
unsigned *Type,
unsigned *Subtype) {
-#define testFeature(F) (Features[F / 32] & (1 << (F % 32))) != 0
-
// We select CPU strings to match the code in Host.cpp, but we don't use them
// in compiler-rt.
const char *CPU = 0;
@@ -662,14 +662,48 @@ static const char *getAMDProcessorTypeAndSubtype(unsigned Family,
const unsigned *Features,
unsigned *Type,
unsigned *Subtype) {
- // We select CPU strings to match the code in Host.cpp, but we don't use them
- // in compiler-rt.
const char *CPU = 0;
switch (Family) {
+ case 4:
+ CPU = "i486";
+ break;
+ case 5:
+ CPU = "pentium";
+ switch (Model) {
+ case 6:
+ case 7:
+ CPU = "k6";
+ break;
+ case 8:
+ CPU = "k6-2";
+ break;
+ case 9:
+ case 13:
+ CPU = "k6-3";
+ break;
+ case 10:
+ CPU = "geode";
+ break;
+ }
+ break;
+ case 6:
+ if (testFeature(FEATURE_SSE)) {
+ CPU = "athlon-xp";
+ break;
+ }
+ CPU = "athlon";
+ break;
+ case 15:
+ if (testFeature(FEATURE_SSE3)) {
+ CPU = "k8-sse3";
+ break;
+ }
+ CPU = "k8";
+ break;
case 16:
CPU = "amdfam10";
- *Type = AMDFAM10H;
+ *Type = AMDFAM10H; // "amdfam10"
switch (Model) {
case 2:
*Subtype = AMDFAM10H_BARCELONA;
@@ -745,7 +779,7 @@ static const char *getAMDProcessorTypeAndSubtype(unsigned Family,
case 25:
CPU = "znver3";
*Type = AMDFAM19H;
- if ((Model <= 0x0f) || (Model >= 0x20 && Model <= 0x2f) ||
+ if (Model <= 0x0f || (Model >= 0x20 && Model <= 0x2f) ||
(Model >= 0x30 && Model <= 0x3f) || (Model >= 0x40 && Model <= 0x4f) ||
(Model >= 0x50 && Model <= 0x5f)) {
// Family 19h Models 00h-0Fh (Genesis, Chagall) Zen 3
@@ -776,6 +810,8 @@ static const char *getAMDProcessorTypeAndSubtype(unsigned Family,
return CPU;
}
+#undef testFeature
+
static void getAvailableFeatures(unsigned ECX, unsigned EDX, unsigned MaxLeaf,
unsigned *Features) {
unsigned EAX = 0, EBX = 0;
diff --git a/llvm/lib/TargetParser/Host.cpp b/llvm/lib/TargetParser/Host.cpp
index 2ea56746aff249..87ab23253722e9 100644
--- a/llvm/lib/TargetParser/Host.cpp
+++ b/llvm/lib/TargetParser/Host.cpp
@@ -703,14 +703,13 @@ static void detectX86FamilyModel(unsigned EAX, unsigned *Family,
}
}
-static StringRef
-getIntelProcessorTypeAndSubtype(unsigned Family, unsigned Model,
- const unsigned *Features,
- unsigned *Type, unsigned *Subtype) {
- auto testFeature = [&](unsigned F) {
- return (Features[F / 32] & (1U << (F % 32))) != 0;
- };
+#define testFeature(F) (Features[F / 32] & (1 << (F % 32))) != 0
+static StringRef getIntelProcessorTypeAndSubtype(unsigned Family,
+ unsigned Model,
+ const unsigned *Features,
+ unsigned *Type,
+ unsigned *Subtype) {
StringRef CPU;
switch (Family) {
@@ -1067,15 +1066,12 @@ getIntelProcessorTypeAndSubtype(unsigned Family, unsigned Model,
return CPU;
}
-static StringRef
-getAMDProcessorTypeAndSubtype(unsigned Family, unsigned Model,
- const unsigned *Features,
- unsigned *Type, unsigned *Subtype) {
- auto testFeature = [&](unsigned F) {
- return (Features[F / 32] & (1U << (F % 32))) != 0;
- };
-
- StringRef CPU;
+static const char *getAMDProcessorTypeAndSubtype(unsigned Family,
+ unsigned Model,
+ const unsigned *Features,
+ unsigned *Type,
+ unsigned *Subtype) {
+ const char *CPU = 0;
switch (Family) {
case 4:
@@ -1215,7 +1211,7 @@ getAMDProcessorTypeAndSubtype(unsigned Family, unsigned Model,
*Subtype = X86::AMDFAM19H_ZNVER4;
break; // "znver4"
}
- break;
+ break; // family 19h
default:
break; // Unknown AMD CPU.
}
@@ -1223,6 +1219,8 @@ getAMDProcessorTypeAndSubtype(unsigned Family, unsigned Model,
return CPU;
}
+#undef testFeature;
+
static void getAvailableFeatures(unsigned ECX, unsigned EDX, unsigned MaxLeaf,
unsigned *Features) {
unsigned EAX, EBX;
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