[llvm] [AArch64][PAC] Lower jump-tables using hardened pseudo. (PR #97666)

[Daniil Kovalev via llvm-commits]

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@@ -3597,10 +3597,22 @@ bool AArch64InstructionSelector::selectBrJT(MachineInstr &I,
   unsigned JTI = I.getOperand(1).getIndex();
   Register Index = I.getOperand(2).getReg();
 
+  MF->getInfo<AArch64FunctionInfo>()->setJumpTableEntryInfo(JTI, 4, nullptr);
+  if (MF->getFunction().hasFnAttribute("jump-table-hardening") ||
+      STI.getTargetTriple().isArm64e()) {
+    if (TM.getCodeModel() != CodeModel::Small)
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kovdan01 wrote:

I might be missing smth, but why we don't support large code model here and support it in `AArch64TargetLowering::LowerBR_JT`? The offset computation is done in pseudo expansion and it's common for both ISel's, and full 64-bit offsets are supported via movk. So, we can probably support large code model here as well?

If such behavior is expected - the error message below looks untested. I'm OK with adding tests as a follow-up patch later if it's more convenient.

https://github.com/llvm/llvm-project/pull/97666