[llvm] [RISCV] Remove -riscv-disable-insert-vsetvl-phi-opt flag (PR #97991)

Luke Lau via llvm-commits llvm-commits at lists.llvm.org
Sun Jul 7 23:48:14 PDT 2024


https://github.com/lukel97 created https://github.com/llvm/llvm-project/pull/97991

This flag was added in https://reviews.llvm.org/D103277 out of precaution, but it's been enabled by default for 3 years now and I haven't seen any miscompiles upstream stemming from needVSETVLIPHI. This would remove it just to simplify the number of configurations.


>From 9edcbac4d223e94b1721821e5904a833ed551352 Mon Sep 17 00:00:00 2001
From: Luke Lau <luke at igalia.com>
Date: Mon, 8 Jul 2024 14:44:11 +0800
Subject: [PATCH] [RISCV] Remove -riscv-disable-insert-vsetvl-phi-opt flag

This flag was added in https://reviews.llvm.org/D103277 out of precaution, but it's been enabled by default for 3 years now. I haven't seen any miscompiles stemming from needVSETVLIPHI upstream, so this proposes to remove it to simplify the number of configurations.
---
 llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp | 7 -------
 1 file changed, 7 deletions(-)

diff --git a/llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp b/llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
index 9c76bb15035eb..ecdd93d85f986 100644
--- a/llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
+++ b/llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
@@ -41,10 +41,6 @@ using namespace llvm;
 STATISTIC(NumInsertedVSETVL, "Number of VSETVL inst inserted");
 STATISTIC(NumCoalescedVSETVL, "Number of VSETVL inst coalesced");
 
-static cl::opt<bool> DisableInsertVSETVLPHIOpt(
-    "riscv-disable-insert-vsetvl-phi-opt", cl::init(false), cl::Hidden,
-    cl::desc("Disable looking through phis when inserting vsetvlis."));
-
 namespace {
 
 /// Given a virtual register \p Reg, return the corresponding VNInfo for it.
@@ -1364,9 +1360,6 @@ void RISCVInsertVSETVLI::computeIncomingVLVTYPE(const MachineBasicBlock &MBB) {
 // outputs from the last VSETVLI in their respective basic blocks.
 bool RISCVInsertVSETVLI::needVSETVLIPHI(const VSETVLIInfo &Require,
                                         const MachineBasicBlock &MBB) const {
-  if (DisableInsertVSETVLPHIOpt)
-    return true;
-
   if (!Require.hasAVLReg())
     return true;
 



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