[llvm] [CGData] Outlined Hash Tree (PR #89792)
Kyungwoo Lee via llvm-commits
llvm-commits at lists.llvm.org
Sat Jul 6 07:46:06 PDT 2024
https://github.com/kyulee-com updated https://github.com/llvm/llvm-project/pull/89792
>From 5204a701bbbe996af303f86b583a3d64fb6ea219 Mon Sep 17 00:00:00 2001
From: Kyungwoo Lee <kyulee at meta.com>
Date: Mon, 22 Apr 2024 15:29:25 -0700
Subject: [PATCH 1/3] [CGData] Outlined Hash Tree
This defines the OutlinedHashTree class.
It contains sequences of stable hash values of instructions that have been outlined.
This OutlinedHashTree can be used to track the outlined instruction sequences across modules.
A trie structure is used in its implementation, allowing for a compact sharing of common prefixes.
---
.../llvm/CodeGenData/OutlinedHashTree.h | 107 +++++++++++
.../llvm/CodeGenData/OutlinedHashTreeRecord.h | 67 +++++++
llvm/lib/CMakeLists.txt | 1 +
llvm/lib/CodeGenData/CMakeLists.txt | 14 ++
llvm/lib/CodeGenData/OutlinedHashTree.cpp | 131 ++++++++++++++
.../CodeGenData/OutlinedHashTreeRecord.cpp | 168 ++++++++++++++++++
llvm/unittests/CMakeLists.txt | 1 +
llvm/unittests/CodeGenData/CMakeLists.txt | 14 ++
.../OutlinedHashTreeRecordTest.cpp | 118 ++++++++++++
.../CodeGenData/OutlinedHashTreeTest.cpp | 81 +++++++++
10 files changed, 702 insertions(+)
create mode 100644 llvm/include/llvm/CodeGenData/OutlinedHashTree.h
create mode 100644 llvm/include/llvm/CodeGenData/OutlinedHashTreeRecord.h
create mode 100644 llvm/lib/CodeGenData/CMakeLists.txt
create mode 100644 llvm/lib/CodeGenData/OutlinedHashTree.cpp
create mode 100644 llvm/lib/CodeGenData/OutlinedHashTreeRecord.cpp
create mode 100644 llvm/unittests/CodeGenData/CMakeLists.txt
create mode 100644 llvm/unittests/CodeGenData/OutlinedHashTreeRecordTest.cpp
create mode 100644 llvm/unittests/CodeGenData/OutlinedHashTreeTest.cpp
diff --git a/llvm/include/llvm/CodeGenData/OutlinedHashTree.h b/llvm/include/llvm/CodeGenData/OutlinedHashTree.h
new file mode 100644
index 0000000000000..875e1a78bb401
--- /dev/null
+++ b/llvm/include/llvm/CodeGenData/OutlinedHashTree.h
@@ -0,0 +1,107 @@
+//===- OutlinedHashTree.h --------------------------------------*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===---------------------------------------------------------------------===//
+//
+// This defines the OutlinedHashTree class. It contains sequences of stable
+// hash values of instructions that have been outlined. This OutlinedHashTree
+// can be used to track the outlined instruction sequences across modules.
+//
+//===---------------------------------------------------------------------===//
+
+#ifndef LLVM_CODEGENDATA_OUTLINEDHASHTREE_H
+#define LLVM_CODEGENDATA_OUTLINEDHASHTREE_H
+
+#include "llvm/ADT/StableHashing.h"
+#include "llvm/ObjectYAML/YAML.h"
+#include "llvm/Support/raw_ostream.h"
+
+#include <unordered_map>
+#include <vector>
+
+namespace llvm {
+
+/// A HashNode is an entry in an OutlinedHashTree, holding a hash value
+/// and a collection of Successors (other HashNodes). If a HashNode has
+/// a positive terminal value (Terminals > 0), it signifies the end of
+/// a hash sequence with that occurrence count.
+struct HashNode {
+ /// The hash value of the node.
+ stable_hash Hash;
+ /// The number of terminals in the sequence ending at this node.
+ unsigned Terminals;
+ /// The successors of this node.
+ std::unordered_map<stable_hash, std::unique_ptr<HashNode>> Successors;
+};
+
+/// HashNodeStable is the serialized, stable, and compact representation
+/// of a HashNode.
+struct HashNodeStable {
+ llvm::yaml::Hex64 Hash;
+ unsigned Terminals;
+ std::vector<unsigned> SuccessorIds;
+};
+
+class OutlinedHashTree {
+
+ using EdgeCallbackFn =
+ std::function<void(const HashNode *, const HashNode *)>;
+ using NodeCallbackFn = std::function<void(const HashNode *)>;
+
+ using HashSequence = std::vector<stable_hash>;
+ using HashSequencePair = std::pair<std::vector<stable_hash>, unsigned>;
+
+public:
+ /// Walks every edge and node in the OutlinedHashTree and calls CallbackEdge
+ /// for the edges and CallbackNode for the nodes with the stable_hash for
+ /// the source and the stable_hash of the sink for an edge. These generic
+ /// callbacks can be used to traverse a OutlinedHashTree for the purpose of
+ /// print debugging or serializing it.
+ void walkGraph(NodeCallbackFn CallbackNode,
+ EdgeCallbackFn CallbackEdge = nullptr,
+ bool SortedWalk = false) const;
+
+ /// Release all hash nodes except the root hash node.
+ void clear() {
+ assert(getRoot()->Hash == 0 && getRoot()->Terminals == 0);
+ getRoot()->Successors.clear();
+ }
+
+ /// \returns true if the hash tree has only the root node.
+ bool empty() { return size() == 1; }
+
+ /// \returns the size of a OutlinedHashTree by traversing it. If
+ /// \p GetTerminalCountOnly is true, it only counts the terminal nodes
+ /// (meaning it returns the the number of hash sequences in the
+ /// OutlinedHashTree).
+ size_t size(bool GetTerminalCountOnly = false) const;
+
+ /// \returns the depth of a OutlinedHashTree by traversing it.
+ size_t depth() const;
+
+ /// \returns the root hash node of a OutlinedHashTree.
+ const HashNode *getRoot() const { return Root.get(); }
+ HashNode *getRoot() { return Root.get(); }
+
+ /// Inserts a \p Sequence into the this tree. The last node in the sequence
+ /// will increase Terminals.
+ void insert(const HashSequencePair &SequencePair);
+
+ /// Merge a \p OtherTree into this Tree.
+ void merge(const OutlinedHashTree *OtherTree);
+
+ /// \returns the matching count if \p Sequence exists in the OutlinedHashTree.
+ unsigned find(const HashSequence &Sequence) const;
+
+ OutlinedHashTree() { Root = std::make_unique<HashNode>(); }
+
+private:
+ std::unique_ptr<HashNode> Root;
+};
+
+} // namespace llvm
+
+#endif
diff --git a/llvm/include/llvm/CodeGenData/OutlinedHashTreeRecord.h b/llvm/include/llvm/CodeGenData/OutlinedHashTreeRecord.h
new file mode 100644
index 0000000000000..ccd2ad26dd087
--- /dev/null
+++ b/llvm/include/llvm/CodeGenData/OutlinedHashTreeRecord.h
@@ -0,0 +1,67 @@
+//===- OutlinedHashTreeRecord.h --------------------------------*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===---------------------------------------------------------------------===//
+//
+// This defines the OutlinedHashTreeRecord class. This class holds the outlined
+// hash tree for both serialization and deserialization processes. It utilizes
+// two data formats for serialization: raw binary data and YAML.
+// These two formats can be used interchangeably.
+//
+//===---------------------------------------------------------------------===//
+
+#ifndef LLVM_CODEGENDATA_OUTLINEDHASHTREERECORD_H
+#define LLVM_CODEGENDATA_OUTLINEDHASHTREERECORD_H
+
+#include "llvm/CodeGenData/OutlinedHashTree.h"
+
+namespace llvm {
+
+using IdHashNodeStableMapTy = std::map<unsigned, HashNodeStable>;
+using IdHashNodeMapTy = std::map<unsigned, HashNode *>;
+using HashNodeIdMapTy = std::unordered_map<const HashNode *, unsigned>;
+
+struct OutlinedHashTreeRecord {
+ std::unique_ptr<OutlinedHashTree> HashTree;
+
+ OutlinedHashTreeRecord() { HashTree = std::make_unique<OutlinedHashTree>(); }
+ OutlinedHashTreeRecord(std::unique_ptr<OutlinedHashTree> HashTree)
+ : HashTree(std::move(HashTree)){};
+
+ /// Serialize the outlined hash tree to a raw_ostream.
+ void serialize(raw_ostream &OS) const;
+ /// Deserialize the outlined hash tree from a raw_ostream.
+ void deserialize(const unsigned char *&Ptr);
+ /// Serialize the outlined hash tree to a YAML stream.
+ void serializeYAML(yaml::Output &YOS) const;
+ /// Deserialize the outlined hash tree from a YAML stream.
+ void deserializeYAML(yaml::Input &YIS);
+
+ /// Merge the other outlined hash tree into this one.
+ void merge(const OutlinedHashTreeRecord &Other) {
+ HashTree->merge(Other.HashTree.get());
+ }
+
+ /// \returns true if the outlined hash tree is empty.
+ bool empty() const { return HashTree->empty(); }
+
+ /// Print the outlined hash tree in a YAML format.
+ void print(raw_ostream &OS = llvm::errs()) const {
+ yaml::Output YOS(OS);
+ serializeYAML(YOS);
+ }
+
+private:
+ /// Convert the outlined hash tree to stable data.
+ void convertToStableData(IdHashNodeStableMapTy &IdNodeStableMap) const;
+
+ /// Convert the stable data back to the outlined hash tree.
+ void convertFromStableData(const IdHashNodeStableMapTy &IdNodeStableMap);
+};
+
+} // end namespace llvm
+
+#endif // LLVM_CODEGENDATA_OUTLINEDHASHTREERECORD_H
diff --git a/llvm/lib/CMakeLists.txt b/llvm/lib/CMakeLists.txt
index 08f198679551d..638c3bd6f90f5 100644
--- a/llvm/lib/CMakeLists.txt
+++ b/llvm/lib/CMakeLists.txt
@@ -10,6 +10,7 @@ add_subdirectory(InterfaceStub)
add_subdirectory(IRPrinter)
add_subdirectory(IRReader)
add_subdirectory(CodeGen)
+add_subdirectory(CodeGenData)
add_subdirectory(CodeGenTypes)
add_subdirectory(BinaryFormat)
add_subdirectory(Bitcode)
diff --git a/llvm/lib/CodeGenData/CMakeLists.txt b/llvm/lib/CodeGenData/CMakeLists.txt
new file mode 100644
index 0000000000000..3ba90f96cc86d
--- /dev/null
+++ b/llvm/lib/CodeGenData/CMakeLists.txt
@@ -0,0 +1,14 @@
+add_llvm_component_library(LLVMCodeGenData
+ OutlinedHashTree.cpp
+ OutlinedHashTreeRecord.cpp
+
+ ADDITIONAL_HEADER_DIRS
+ ${LLVM_MAIN_INCLUDE_DIR}/llvm/CodeGenData
+
+ DEPENDS
+ intrinsics_gen
+
+ LINK_COMPONENTS
+ Core
+ Support
+ )
diff --git a/llvm/lib/CodeGenData/OutlinedHashTree.cpp b/llvm/lib/CodeGenData/OutlinedHashTree.cpp
new file mode 100644
index 0000000000000..032993ded60ea
--- /dev/null
+++ b/llvm/lib/CodeGenData/OutlinedHashTree.cpp
@@ -0,0 +1,131 @@
+//===-- OutlinedHashTree.cpp ----------------------------------------------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+// An OutlinedHashTree is a Trie that contains sequences of stable hash values
+// of instructions that have been outlined. This OutlinedHashTree can be used
+// to understand the outlined instruction sequences collected across modules.
+//
+//===----------------------------------------------------------------------===//
+
+#include "llvm/CodeGenData/OutlinedHashTree.h"
+
+#include <stack>
+#include <tuple>
+
+#define DEBUG_TYPE "outlined-hash-tree"
+
+using namespace llvm;
+
+void OutlinedHashTree::walkGraph(NodeCallbackFn CallbackNode,
+ EdgeCallbackFn CallbackEdge,
+ bool SortedWalk) const {
+ std::stack<const HashNode *> Stack;
+ Stack.push(getRoot());
+
+ while (!Stack.empty()) {
+ const auto *Current = Stack.top();
+ Stack.pop();
+ if (CallbackNode)
+ CallbackNode(Current);
+
+ auto HandleNext = [&](const HashNode *Next) {
+ if (CallbackEdge)
+ CallbackEdge(Current, Next);
+ Stack.push(Next);
+ };
+ if (SortedWalk) {
+ std::map<stable_hash, const HashNode *> SortedSuccessors;
+ for (const auto &P : Current->Successors)
+ SortedSuccessors[P.first] = P.second.get();
+ for (const auto &P : SortedSuccessors)
+ HandleNext(P.second);
+ } else {
+ for (const auto &P : Current->Successors)
+ HandleNext(P.second.get());
+ }
+ }
+}
+
+size_t OutlinedHashTree::size(bool GetTerminalCountOnly) const {
+ size_t Size = 0;
+ walkGraph([&Size, GetTerminalCountOnly](const HashNode *N) {
+ Size += (N && (!GetTerminalCountOnly || N->Terminals));
+ });
+ return Size;
+}
+
+size_t OutlinedHashTree::depth() const {
+ size_t Size = 0;
+ std::unordered_map<const HashNode *, size_t> DepthMap;
+ walkGraph([&Size, &DepthMap](
+ const HashNode *N) { Size = std::max(Size, DepthMap[N]); },
+ [&DepthMap](const HashNode *Src, const HashNode *Dst) {
+ size_t Depth = DepthMap[Src];
+ DepthMap[Dst] = Depth + 1;
+ });
+ return Size;
+}
+
+void OutlinedHashTree::insert(const HashSequencePair &SequencePair) {
+ const auto &Sequence = SequencePair.first;
+ unsigned Count = SequencePair.second;
+ HashNode *Current = getRoot();
+
+ for (stable_hash StableHash : Sequence) {
+ auto I = Current->Successors.find(StableHash);
+ if (I == Current->Successors.end()) {
+ std::unique_ptr<HashNode> Next = std::make_unique<HashNode>();
+ HashNode *NextPtr = Next.get();
+ NextPtr->Hash = StableHash;
+ Current->Successors.emplace(StableHash, std::move(Next));
+ Current = NextPtr;
+ } else
+ Current = I->second.get();
+ }
+ Current->Terminals += Count;
+}
+
+void OutlinedHashTree::merge(const OutlinedHashTree *Tree) {
+ HashNode *Dst = getRoot();
+ const HashNode *Src = Tree->getRoot();
+ std::stack<std::pair<HashNode *, const HashNode *>> Stack;
+ Stack.push({Dst, Src});
+
+ while (!Stack.empty()) {
+ auto [DstNode, SrcNode] = Stack.top();
+ Stack.pop();
+ if (!SrcNode)
+ continue;
+ DstNode->Terminals += SrcNode->Terminals;
+
+ for (auto &[Hash, NextSrcNode] : SrcNode->Successors) {
+ HashNode *NextDstNode;
+ auto I = DstNode->Successors.find(Hash);
+ if (I == DstNode->Successors.end()) {
+ auto NextDst = std::make_unique<HashNode>();
+ NextDstNode = NextDst.get();
+ NextDstNode->Hash = Hash;
+ DstNode->Successors.emplace(Hash, std::move(NextDst));
+ } else
+ NextDstNode = I->second.get();
+
+ Stack.push({NextDstNode, NextSrcNode.get()});
+ }
+ }
+}
+
+unsigned OutlinedHashTree::find(const HashSequence &Sequence) const {
+ const HashNode *Current = getRoot();
+ for (stable_hash StableHash : Sequence) {
+ const auto I = Current->Successors.find(StableHash);
+ if (I == Current->Successors.end())
+ return 0;
+ Current = I->second.get();
+ }
+ return Current->Terminals;
+}
diff --git a/llvm/lib/CodeGenData/OutlinedHashTreeRecord.cpp b/llvm/lib/CodeGenData/OutlinedHashTreeRecord.cpp
new file mode 100644
index 0000000000000..0d5dd864c89c5
--- /dev/null
+++ b/llvm/lib/CodeGenData/OutlinedHashTreeRecord.cpp
@@ -0,0 +1,168 @@
+//===-- OutlinedHashTreeRecord.cpp ----------------------------------------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+// This defines the OutlinedHashTreeRecord class. This class holds the outlined
+// hash tree for both serialization and deserialization processes. It utilizes
+// two data formats for serialization: raw binary data and YAML.
+// These two formats can be used interchangeably.
+//
+//===----------------------------------------------------------------------===//
+
+#include "llvm/CodeGenData/OutlinedHashTreeRecord.h"
+#include "llvm/CodeGenData/OutlinedHashTree.h"
+#include "llvm/ObjectYAML/YAML.h"
+#include "llvm/Support/Endian.h"
+#include "llvm/Support/EndianStream.h"
+
+#define DEBUG_TYPE "outlined-hash-tree"
+
+using namespace llvm;
+using namespace llvm::support;
+
+namespace llvm {
+namespace yaml {
+
+template <> struct MappingTraits<HashNodeStable> {
+ static void mapping(IO &io, HashNodeStable &res) {
+ io.mapRequired("Hash", res.Hash);
+ io.mapRequired("Terminals", res.Terminals);
+ io.mapRequired("SuccessorIds", res.SuccessorIds);
+ }
+};
+
+template <> struct CustomMappingTraits<IdHashNodeStableMapTy> {
+ static void inputOne(IO &io, StringRef Key, IdHashNodeStableMapTy &V) {
+ HashNodeStable NodeStable;
+ io.mapRequired(Key.str().c_str(), NodeStable);
+ unsigned Id;
+ if (Key.getAsInteger(0, Id)) {
+ io.setError("Id not an integer");
+ return;
+ }
+ V.insert({Id, NodeStable});
+ }
+
+ static void output(IO &io, IdHashNodeStableMapTy &V) {
+ for (auto Iter = V.begin(); Iter != V.end(); ++Iter)
+ io.mapRequired(utostr(Iter->first).c_str(), Iter->second);
+ }
+};
+
+} // namespace yaml
+} // namespace llvm
+
+void OutlinedHashTreeRecord::serialize(raw_ostream &OS) const {
+ IdHashNodeStableMapTy IdNodeStableMap;
+ convertToStableData(IdNodeStableMap);
+ support::endian::Writer Writer(OS, endianness::little);
+ Writer.write<uint32_t>(IdNodeStableMap.size());
+
+ for (const auto &[Id, NodeStable] : IdNodeStableMap) {
+ Writer.write<uint32_t>(Id);
+ Writer.write<uint64_t>(NodeStable.Hash);
+ Writer.write<uint32_t>(NodeStable.Terminals);
+ Writer.write<uint32_t>(NodeStable.SuccessorIds.size());
+ for (auto SuccessorId : NodeStable.SuccessorIds)
+ Writer.write<uint32_t>(SuccessorId);
+ }
+}
+
+void OutlinedHashTreeRecord::deserialize(const unsigned char *&Ptr) {
+ IdHashNodeStableMapTy IdNodeStableMap;
+ auto NumIdNodeStableMap =
+ endian::readNext<uint32_t, endianness::little, unaligned>(Ptr);
+
+ for (unsigned I = 0; I < NumIdNodeStableMap; ++I) {
+ auto Id = endian::readNext<uint32_t, endianness::little, unaligned>(Ptr);
+ HashNodeStable NodeStable;
+ NodeStable.Hash =
+ endian::readNext<uint64_t, endianness::little, unaligned>(Ptr);
+ NodeStable.Terminals =
+ endian::readNext<uint32_t, endianness::little, unaligned>(Ptr);
+ auto NumSuccessorIds =
+ endian::readNext<uint32_t, endianness::little, unaligned>(Ptr);
+ for (unsigned J = 0; J < NumSuccessorIds; ++J)
+ NodeStable.SuccessorIds.push_back(
+ endian::readNext<uint32_t, endianness::little, unaligned>(Ptr));
+
+ IdNodeStableMap[Id] = std::move(NodeStable);
+ }
+
+ convertFromStableData(IdNodeStableMap);
+}
+
+void OutlinedHashTreeRecord::serializeYAML(yaml::Output &YOS) const {
+ IdHashNodeStableMapTy IdNodeStableMap;
+ convertToStableData(IdNodeStableMap);
+
+ YOS << IdNodeStableMap;
+}
+
+void OutlinedHashTreeRecord::deserializeYAML(yaml::Input &YIS) {
+ IdHashNodeStableMapTy IdNodeStableMap;
+
+ YIS >> IdNodeStableMap;
+ YIS.nextDocument();
+
+ convertFromStableData(IdNodeStableMap);
+}
+
+void OutlinedHashTreeRecord::convertToStableData(
+ IdHashNodeStableMapTy &IdNodeStableMap) const {
+ // Build NodeIdMap
+ HashNodeIdMapTy NodeIdMap;
+ HashTree->walkGraph(
+ [&NodeIdMap](const HashNode *Current) {
+ size_t Index = NodeIdMap.size();
+ NodeIdMap[Current] = Index;
+ assert(Index = NodeIdMap.size() + 1 &&
+ "Expected size of NodeMap to increment by 1");
+ },
+ /*EdgeCallbackFn=*/nullptr, /*SortedWork=*/true);
+
+ // Convert NodeIdMap to NodeStableMap
+ for (auto &P : NodeIdMap) {
+ auto *Node = P.first;
+ auto Id = P.second;
+ HashNodeStable NodeStable;
+ NodeStable.Hash = Node->Hash;
+ NodeStable.Terminals = Node->Terminals;
+ for (auto &P : Node->Successors)
+ NodeStable.SuccessorIds.push_back(NodeIdMap[P.second.get()]);
+ IdNodeStableMap[Id] = NodeStable;
+ }
+
+ // Sort the Successors so that they come out in the same order as in the map.
+ for (auto &P : IdNodeStableMap)
+ std::sort(P.second.SuccessorIds.begin(), P.second.SuccessorIds.end());
+}
+
+void OutlinedHashTreeRecord::convertFromStableData(
+ const IdHashNodeStableMapTy &IdNodeStableMap) {
+ IdHashNodeMapTy IdNodeMap;
+ // Initialize the root node at 0.
+ IdNodeMap[0] = HashTree->getRoot();
+ assert(IdNodeMap[0]->Successors.empty());
+
+ for (auto &P : IdNodeStableMap) {
+ auto Id = P.first;
+ const HashNodeStable &NodeStable = P.second;
+ assert(IdNodeMap.count(Id));
+ HashNode *Curr = IdNodeMap[Id];
+ Curr->Hash = NodeStable.Hash;
+ Curr->Terminals = NodeStable.Terminals;
+ auto &Successors = Curr->Successors;
+ assert(Successors.empty());
+ for (auto SuccessorId : NodeStable.SuccessorIds) {
+ auto Sucessor = std::make_unique<HashNode>();
+ IdNodeMap[SuccessorId] = Sucessor.get();
+ auto Hash = IdNodeStableMap.at(SuccessorId).Hash;
+ Successors[Hash] = std::move(Sucessor);
+ }
+ }
+}
diff --git a/llvm/unittests/CMakeLists.txt b/llvm/unittests/CMakeLists.txt
index 696926110df7a..49ed6c8fb6c42 100644
--- a/llvm/unittests/CMakeLists.txt
+++ b/llvm/unittests/CMakeLists.txt
@@ -21,6 +21,7 @@ add_subdirectory(BinaryFormat)
add_subdirectory(Bitcode)
add_subdirectory(Bitstream)
add_subdirectory(CodeGen)
+add_subdirectory(CodeGenData)
add_subdirectory(DebugInfo)
add_subdirectory(Debuginfod)
add_subdirectory(Demangle)
diff --git a/llvm/unittests/CodeGenData/CMakeLists.txt b/llvm/unittests/CodeGenData/CMakeLists.txt
new file mode 100644
index 0000000000000..3d821b87e29d8
--- /dev/null
+++ b/llvm/unittests/CodeGenData/CMakeLists.txt
@@ -0,0 +1,14 @@
+set(LLVM_LINK_COMPONENTS
+ ${LLVM_TARGETS_TO_BUILD}
+ CodeGen
+ CodeGenData
+ Core
+ Support
+ )
+
+add_llvm_unittest(CodeGenDataTests
+ OutlinedHashTreeRecordTest.cpp
+ OutlinedHashTreeTest.cpp
+ )
+
+target_link_libraries(CodeGenDataTests PRIVATE LLVMTestingSupport)
diff --git a/llvm/unittests/CodeGenData/OutlinedHashTreeRecordTest.cpp b/llvm/unittests/CodeGenData/OutlinedHashTreeRecordTest.cpp
new file mode 100644
index 0000000000000..aa7ad4a33754f
--- /dev/null
+++ b/llvm/unittests/CodeGenData/OutlinedHashTreeRecordTest.cpp
@@ -0,0 +1,118 @@
+//===- OutlinedHashTreeRecordTest.cpp -------------------------------------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#include "llvm/CodeGenData/OutlinedHashTreeRecord.h"
+#include "gmock/gmock.h"
+#include "gtest/gtest.h"
+
+using namespace llvm;
+
+namespace {
+
+TEST(OutlinedHashTreeRecordTest, Empty) {
+ OutlinedHashTreeRecord HashTreeRecord;
+ ASSERT_TRUE(HashTreeRecord.empty());
+}
+
+TEST(OutlinedHashTreeRecordTest, Print) {
+ OutlinedHashTreeRecord HashTreeRecord;
+ HashTreeRecord.HashTree->insert({{1, 2}, 3});
+
+ const char *ExpectedTreeStr = R"(---
+0:
+ Hash: 0x0
+ Terminals: 0
+ SuccessorIds: [ 1 ]
+1:
+ Hash: 0x1
+ Terminals: 0
+ SuccessorIds: [ 2 ]
+2:
+ Hash: 0x2
+ Terminals: 3
+ SuccessorIds: [ ]
+...
+)";
+ std::string TreeDump;
+ raw_string_ostream OS(TreeDump);
+ HashTreeRecord.print(OS);
+ EXPECT_EQ(ExpectedTreeStr, TreeDump);
+}
+
+TEST(OutlinedHashTreeRecordTest, Stable) {
+ OutlinedHashTreeRecord HashTreeRecord1;
+ HashTreeRecord1.HashTree->insert({{1, 2}, 4});
+ HashTreeRecord1.HashTree->insert({{1, 3}, 5});
+
+ OutlinedHashTreeRecord HashTreeRecord2;
+ HashTreeRecord2.HashTree->insert({{1, 3}, 5});
+ HashTreeRecord2.HashTree->insert({{1, 2}, 4});
+
+ // Output is stable regardless of insertion order.
+ std::string TreeDump1;
+ raw_string_ostream OS1(TreeDump1);
+ HashTreeRecord1.print(OS1);
+ std::string TreeDump2;
+ raw_string_ostream OS2(TreeDump2);
+ HashTreeRecord2.print(OS2);
+
+ EXPECT_EQ(TreeDump1, TreeDump2);
+}
+
+TEST(OutlinedHashTreeRecordTest, Serialize) {
+ OutlinedHashTreeRecord HashTreeRecord1;
+ HashTreeRecord1.HashTree->insert({{1, 2}, 4});
+ HashTreeRecord1.HashTree->insert({{1, 3}, 5});
+
+ // Serialize and deserialize the tree.
+ SmallVector<char> Out;
+ raw_svector_ostream OS(Out);
+ HashTreeRecord1.serialize(OS);
+
+ OutlinedHashTreeRecord HashTreeRecord2;
+ const uint8_t *Data = reinterpret_cast<const uint8_t *>(Out.data());
+ HashTreeRecord2.deserialize(Data);
+
+ // Two trees should be identical.
+ std::string TreeDump1;
+ raw_string_ostream OS1(TreeDump1);
+ HashTreeRecord1.print(OS1);
+ std::string TreeDump2;
+ raw_string_ostream OS2(TreeDump2);
+ HashTreeRecord2.print(OS2);
+
+ EXPECT_EQ(TreeDump1, TreeDump2);
+}
+
+TEST(OutlinedHashTreeRecordTest, SerializeYAML) {
+ OutlinedHashTreeRecord HashTreeRecord1;
+ HashTreeRecord1.HashTree->insert({{1, 2}, 4});
+ HashTreeRecord1.HashTree->insert({{1, 3}, 5});
+
+ // Serialize and deserialize the tree in a YAML format.
+ std::string Out;
+ raw_string_ostream OS(Out);
+ yaml::Output YOS(OS);
+ HashTreeRecord1.serializeYAML(YOS);
+
+ OutlinedHashTreeRecord HashTreeRecord2;
+ yaml::Input YIS(StringRef(Out.data(), Out.size()));
+ HashTreeRecord2.deserializeYAML(YIS);
+
+ // Two trees should be identical.
+ std::string TreeDump1;
+ raw_string_ostream OS1(TreeDump1);
+ HashTreeRecord1.print(OS1);
+ std::string TreeDump2;
+ raw_string_ostream OS2(TreeDump2);
+ HashTreeRecord2.print(OS2);
+
+ EXPECT_EQ(TreeDump1, TreeDump2);
+}
+
+} // end namespace
diff --git a/llvm/unittests/CodeGenData/OutlinedHashTreeTest.cpp b/llvm/unittests/CodeGenData/OutlinedHashTreeTest.cpp
new file mode 100644
index 0000000000000..d11618cf8e4fa
--- /dev/null
+++ b/llvm/unittests/CodeGenData/OutlinedHashTreeTest.cpp
@@ -0,0 +1,81 @@
+//===- OutlinedHashTreeTest.cpp -------------------------------------------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#include "llvm/CodeGenData/OutlinedHashTree.h"
+#include "gmock/gmock.h"
+#include "gtest/gtest.h"
+
+using namespace llvm;
+
+namespace {
+
+TEST(OutlinedHashTreeTest, Empty) {
+ OutlinedHashTree HashTree;
+ ASSERT_TRUE(HashTree.empty());
+ // The header node is always present.
+ ASSERT_TRUE(HashTree.size() == 1);
+ ASSERT_TRUE(HashTree.depth() == 0);
+}
+
+TEST(OutlinedHashTreeTest, Insert) {
+ OutlinedHashTree HashTree;
+ HashTree.insert({{1, 2, 3}, 1});
+ // The node count is 4 (including the root node).
+ ASSERT_TRUE(HashTree.size() == 4);
+ // The terminal count is 1.
+ ASSERT_TRUE(HashTree.size(/*GetTerminalCountOnly=*/true) == 1);
+ // The depth is 3.
+ ASSERT_TRUE(HashTree.depth() == 3);
+
+ HashTree.clear();
+ ASSERT_TRUE(HashTree.empty());
+
+ HashTree.insert({{1, 2, 3}, 1});
+ HashTree.insert({{1, 2, 4}, 2});
+ // The nodes of 1 and 2 are shared with the same prefix.
+ // The nodes are root, 1, 2, 3 and 4, whose counts are 5.
+ ASSERT_TRUE(HashTree.size() == 5);
+}
+
+TEST(OutlinedHashTreeTest, Find) {
+ OutlinedHashTree HashTree;
+ HashTree.insert({{1, 2, 3}, 1});
+ HashTree.insert({{1, 2, 3}, 2});
+
+ // The node count does not change as the same sequences are added.
+ ASSERT_TRUE(HashTree.size() == 4);
+ // The terminal counts are accumulated from two same sequences.
+ ASSERT_TRUE(HashTree.find({1, 2, 3}) == 3);
+ ASSERT_TRUE(HashTree.find({1, 2}) == 0);
+}
+
+TEST(OutlinedHashTreeTest, Merge) {
+ // Build HashTree1 inserting 2 sequences.
+ OutlinedHashTree HashTree1;
+
+ HashTree1.insert({{1, 2}, 20});
+ HashTree1.insert({{1, 4}, 30});
+
+ // Build HashTree2 and HashTree3 for each
+ OutlinedHashTree HashTree2;
+ HashTree2.insert({{1, 2}, 20});
+ OutlinedHashTree HashTree3;
+ HashTree3.insert({{1, 4}, 30});
+
+ // Merge HashTree3 into HashTree2.
+ HashTree2.merge(&HashTree3);
+
+ // Compare HashTree1 and HashTree2.
+ EXPECT_EQ(HashTree1.size(), HashTree2.size());
+ EXPECT_EQ(HashTree1.depth(), HashTree2.depth());
+ EXPECT_EQ(HashTree1.find({1, 2}), HashTree2.find({1, 2}));
+ EXPECT_EQ(HashTree1.find({1, 4}), HashTree2.find({1, 4}));
+ EXPECT_EQ(HashTree1.find({1, 3}), HashTree2.find({1, 3}));
+}
+
+} // end namespace
>From 40eaed652cbe13b51fdfc8c9de1e370234d7c24a Mon Sep 17 00:00:00 2001
From: Kyungwoo Lee <kyulee at meta.com>
Date: Sat, 4 May 2024 17:24:33 -0700
Subject: [PATCH 2/3] Address comments from Ellis
---
.../llvm/CodeGenData/OutlinedHashTree.h | 29 ++++++-----------
.../llvm/CodeGenData/OutlinedHashTreeRecord.h | 13 ++++++--
llvm/lib/CodeGenData/OutlinedHashTree.cpp | 32 +++++++++----------
.../CodeGenData/OutlinedHashTreeRecord.cpp | 7 ++--
.../CodeGenData/OutlinedHashTreeTest.cpp | 5 +--
5 files changed, 44 insertions(+), 42 deletions(-)
diff --git a/llvm/include/llvm/CodeGenData/OutlinedHashTree.h b/llvm/include/llvm/CodeGenData/OutlinedHashTree.h
index 875e1a78bb401..c40038cd8c517 100644
--- a/llvm/include/llvm/CodeGenData/OutlinedHashTree.h
+++ b/llvm/include/llvm/CodeGenData/OutlinedHashTree.h
@@ -30,29 +30,22 @@ namespace llvm {
/// a hash sequence with that occurrence count.
struct HashNode {
/// The hash value of the node.
- stable_hash Hash;
+ stable_hash Hash = 0;
/// The number of terminals in the sequence ending at this node.
- unsigned Terminals;
+ std::optional<unsigned> Terminals;
/// The successors of this node.
+ /// We don't use DenseMap as a stable_hash value can be tombstone.
std::unordered_map<stable_hash, std::unique_ptr<HashNode>> Successors;
};
-/// HashNodeStable is the serialized, stable, and compact representation
-/// of a HashNode.
-struct HashNodeStable {
- llvm::yaml::Hex64 Hash;
- unsigned Terminals;
- std::vector<unsigned> SuccessorIds;
-};
-
class OutlinedHashTree {
using EdgeCallbackFn =
std::function<void(const HashNode *, const HashNode *)>;
using NodeCallbackFn = std::function<void(const HashNode *)>;
- using HashSequence = std::vector<stable_hash>;
- using HashSequencePair = std::pair<std::vector<stable_hash>, unsigned>;
+ using HashSequence = SmallVector<stable_hash>;
+ using HashSequencePair = std::pair<HashSequence, unsigned>;
public:
/// Walks every edge and node in the OutlinedHashTree and calls CallbackEdge
@@ -66,7 +59,7 @@ class OutlinedHashTree {
/// Release all hash nodes except the root hash node.
void clear() {
- assert(getRoot()->Hash == 0 && getRoot()->Terminals == 0);
+ assert(getRoot()->Hash == 0 && !getRoot()->Terminals);
getRoot()->Successors.clear();
}
@@ -83,8 +76,8 @@ class OutlinedHashTree {
size_t depth() const;
/// \returns the root hash node of a OutlinedHashTree.
- const HashNode *getRoot() const { return Root.get(); }
- HashNode *getRoot() { return Root.get(); }
+ const HashNode *getRoot() const { return &Root; }
+ HashNode *getRoot() { return &Root; }
/// Inserts a \p Sequence into the this tree. The last node in the sequence
/// will increase Terminals.
@@ -94,12 +87,10 @@ class OutlinedHashTree {
void merge(const OutlinedHashTree *OtherTree);
/// \returns the matching count if \p Sequence exists in the OutlinedHashTree.
- unsigned find(const HashSequence &Sequence) const;
-
- OutlinedHashTree() { Root = std::make_unique<HashNode>(); }
+ std::optional<unsigned> find(const HashSequence &Sequence) const;
private:
- std::unique_ptr<HashNode> Root;
+ HashNode Root;
};
} // namespace llvm
diff --git a/llvm/include/llvm/CodeGenData/OutlinedHashTreeRecord.h b/llvm/include/llvm/CodeGenData/OutlinedHashTreeRecord.h
index ccd2ad26dd087..2960e31960448 100644
--- a/llvm/include/llvm/CodeGenData/OutlinedHashTreeRecord.h
+++ b/llvm/include/llvm/CodeGenData/OutlinedHashTreeRecord.h
@@ -16,13 +16,22 @@
#ifndef LLVM_CODEGENDATA_OUTLINEDHASHTREERECORD_H
#define LLVM_CODEGENDATA_OUTLINEDHASHTREERECORD_H
+#include "llvm/ADT/DenseMap.h"
#include "llvm/CodeGenData/OutlinedHashTree.h"
namespace llvm {
+/// HashNodeStable is the serialized, stable, and compact representation
+/// of a HashNode.
+struct HashNodeStable {
+ llvm::yaml::Hex64 Hash;
+ unsigned Terminals;
+ std::vector<unsigned> SuccessorIds;
+};
+
using IdHashNodeStableMapTy = std::map<unsigned, HashNodeStable>;
-using IdHashNodeMapTy = std::map<unsigned, HashNode *>;
-using HashNodeIdMapTy = std::unordered_map<const HashNode *, unsigned>;
+using IdHashNodeMapTy = DenseMap<unsigned, HashNode *>;
+using HashNodeIdMapTy = DenseMap<const HashNode *, unsigned>;
struct OutlinedHashTreeRecord {
std::unique_ptr<OutlinedHashTree> HashTree;
diff --git a/llvm/lib/CodeGenData/OutlinedHashTree.cpp b/llvm/lib/CodeGenData/OutlinedHashTree.cpp
index 032993ded60ea..cb985aa87afcf 100644
--- a/llvm/lib/CodeGenData/OutlinedHashTree.cpp
+++ b/llvm/lib/CodeGenData/OutlinedHashTree.cpp
@@ -24,19 +24,18 @@ using namespace llvm;
void OutlinedHashTree::walkGraph(NodeCallbackFn CallbackNode,
EdgeCallbackFn CallbackEdge,
bool SortedWalk) const {
- std::stack<const HashNode *> Stack;
- Stack.push(getRoot());
+ SmallVector<const HashNode *> Stack;
+ Stack.emplace_back(getRoot());
while (!Stack.empty()) {
- const auto *Current = Stack.top();
- Stack.pop();
+ const auto *Current = Stack.pop_back_val();
if (CallbackNode)
CallbackNode(Current);
auto HandleNext = [&](const HashNode *Next) {
if (CallbackEdge)
CallbackEdge(Current, Next);
- Stack.push(Next);
+ Stack.emplace_back(Next);
};
if (SortedWalk) {
std::map<stable_hash, const HashNode *> SortedSuccessors;
@@ -72,8 +71,7 @@ size_t OutlinedHashTree::depth() const {
}
void OutlinedHashTree::insert(const HashSequencePair &SequencePair) {
- const auto &Sequence = SequencePair.first;
- unsigned Count = SequencePair.second;
+ auto &[Sequence, Count] = SequencePair;
HashNode *Current = getRoot();
for (stable_hash StableHash : Sequence) {
@@ -87,22 +85,23 @@ void OutlinedHashTree::insert(const HashSequencePair &SequencePair) {
} else
Current = I->second.get();
}
- Current->Terminals += Count;
+ if (Count)
+ Current->Terminals = (Current->Terminals ? *Current->Terminals : 0) + Count;
}
void OutlinedHashTree::merge(const OutlinedHashTree *Tree) {
HashNode *Dst = getRoot();
const HashNode *Src = Tree->getRoot();
- std::stack<std::pair<HashNode *, const HashNode *>> Stack;
- Stack.push({Dst, Src});
+ SmallVector<std::pair<HashNode *, const HashNode *>> Stack;
+ Stack.emplace_back(Dst, Src);
while (!Stack.empty()) {
- auto [DstNode, SrcNode] = Stack.top();
- Stack.pop();
+ auto [DstNode, SrcNode] = Stack.pop_back_val();
if (!SrcNode)
continue;
- DstNode->Terminals += SrcNode->Terminals;
-
+ if (SrcNode->Terminals)
+ DstNode->Terminals =
+ (DstNode->Terminals ? *DstNode->Terminals : 0) + *SrcNode->Terminals;
for (auto &[Hash, NextSrcNode] : SrcNode->Successors) {
HashNode *NextDstNode;
auto I = DstNode->Successors.find(Hash);
@@ -114,12 +113,13 @@ void OutlinedHashTree::merge(const OutlinedHashTree *Tree) {
} else
NextDstNode = I->second.get();
- Stack.push({NextDstNode, NextSrcNode.get()});
+ Stack.emplace_back(NextDstNode, NextSrcNode.get());
}
}
}
-unsigned OutlinedHashTree::find(const HashSequence &Sequence) const {
+std::optional<unsigned>
+OutlinedHashTree::find(const HashSequence &Sequence) const {
const HashNode *Current = getRoot();
for (stable_hash StableHash : Sequence) {
const auto I = Current->Successors.find(StableHash);
diff --git a/llvm/lib/CodeGenData/OutlinedHashTreeRecord.cpp b/llvm/lib/CodeGenData/OutlinedHashTreeRecord.cpp
index 0d5dd864c89c5..da4db7e9e69f1 100644
--- a/llvm/lib/CodeGenData/OutlinedHashTreeRecord.cpp
+++ b/llvm/lib/CodeGenData/OutlinedHashTreeRecord.cpp
@@ -131,7 +131,7 @@ void OutlinedHashTreeRecord::convertToStableData(
auto Id = P.second;
HashNodeStable NodeStable;
NodeStable.Hash = Node->Hash;
- NodeStable.Terminals = Node->Terminals;
+ NodeStable.Terminals = Node->Terminals ? *Node->Terminals : 0;
for (auto &P : Node->Successors)
NodeStable.SuccessorIds.push_back(NodeIdMap[P.second.get()]);
IdNodeStableMap[Id] = NodeStable;
@@ -139,7 +139,7 @@ void OutlinedHashTreeRecord::convertToStableData(
// Sort the Successors so that they come out in the same order as in the map.
for (auto &P : IdNodeStableMap)
- std::sort(P.second.SuccessorIds.begin(), P.second.SuccessorIds.end());
+ llvm::sort(P.second.SuccessorIds);
}
void OutlinedHashTreeRecord::convertFromStableData(
@@ -155,7 +155,8 @@ void OutlinedHashTreeRecord::convertFromStableData(
assert(IdNodeMap.count(Id));
HashNode *Curr = IdNodeMap[Id];
Curr->Hash = NodeStable.Hash;
- Curr->Terminals = NodeStable.Terminals;
+ if (NodeStable.Terminals)
+ Curr->Terminals = NodeStable.Terminals;
auto &Successors = Curr->Successors;
assert(Successors.empty());
for (auto SuccessorId : NodeStable.SuccessorIds) {
diff --git a/llvm/unittests/CodeGenData/OutlinedHashTreeTest.cpp b/llvm/unittests/CodeGenData/OutlinedHashTreeTest.cpp
index d11618cf8e4fa..5fdfa60673b7f 100644
--- a/llvm/unittests/CodeGenData/OutlinedHashTreeTest.cpp
+++ b/llvm/unittests/CodeGenData/OutlinedHashTreeTest.cpp
@@ -50,8 +50,9 @@ TEST(OutlinedHashTreeTest, Find) {
// The node count does not change as the same sequences are added.
ASSERT_TRUE(HashTree.size() == 4);
// The terminal counts are accumulated from two same sequences.
- ASSERT_TRUE(HashTree.find({1, 2, 3}) == 3);
- ASSERT_TRUE(HashTree.find({1, 2}) == 0);
+ ASSERT_TRUE(HashTree.find({1, 2, 3}));
+ ASSERT_TRUE(HashTree.find({1, 2, 3}).value() == 3);
+ ASSERT_FALSE(HashTree.find({1, 2}));
}
TEST(OutlinedHashTreeTest, Merge) {
>From 37d294442f55d9bcce4a60fc18bc8d1961d5953a Mon Sep 17 00:00:00 2001
From: Kyungwoo Lee <kyulee at meta.com>
Date: Tue, 18 Jun 2024 17:03:50 -0700
Subject: [PATCH 3/3] Address feedback #2 from ellishg + clean-up header
inclusion
---
.../llvm/CodeGenData/OutlinedHashTree.h | 1 +
.../llvm/CodeGenData/OutlinedHashTreeRecord.h | 3 +-
llvm/lib/CodeGenData/OutlinedHashTree.cpp | 12 +-
.../CodeGenData/OutlinedHashTreeRecord.cpp | 1 -
.../CodeGenData/OutlinedHashTreeTest.cpp | 24 +-
out.txt | 4444 +++++++++++++++++
6 files changed, 4463 insertions(+), 22 deletions(-)
create mode 100644 out.txt
diff --git a/llvm/include/llvm/CodeGenData/OutlinedHashTree.h b/llvm/include/llvm/CodeGenData/OutlinedHashTree.h
index c40038cd8c517..2c8a9288f8a8c 100644
--- a/llvm/include/llvm/CodeGenData/OutlinedHashTree.h
+++ b/llvm/include/llvm/CodeGenData/OutlinedHashTree.h
@@ -15,6 +15,7 @@
#ifndef LLVM_CODEGENDATA_OUTLINEDHASHTREE_H
#define LLVM_CODEGENDATA_OUTLINEDHASHTREE_H
+#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/StableHashing.h"
#include "llvm/ObjectYAML/YAML.h"
#include "llvm/Support/raw_ostream.h"
diff --git a/llvm/include/llvm/CodeGenData/OutlinedHashTreeRecord.h b/llvm/include/llvm/CodeGenData/OutlinedHashTreeRecord.h
index 2960e31960448..de397c9ca5e70 100644
--- a/llvm/include/llvm/CodeGenData/OutlinedHashTreeRecord.h
+++ b/llvm/include/llvm/CodeGenData/OutlinedHashTreeRecord.h
@@ -16,7 +16,6 @@
#ifndef LLVM_CODEGENDATA_OUTLINEDHASHTREERECORD_H
#define LLVM_CODEGENDATA_OUTLINEDHASHTREERECORD_H
-#include "llvm/ADT/DenseMap.h"
#include "llvm/CodeGenData/OutlinedHashTree.h"
namespace llvm {
@@ -38,7 +37,7 @@ struct OutlinedHashTreeRecord {
OutlinedHashTreeRecord() { HashTree = std::make_unique<OutlinedHashTree>(); }
OutlinedHashTreeRecord(std::unique_ptr<OutlinedHashTree> HashTree)
- : HashTree(std::move(HashTree)){};
+ : HashTree(std::move(HashTree)) {};
/// Serialize the outlined hash tree to a raw_ostream.
void serialize(raw_ostream &OS) const;
diff --git a/llvm/lib/CodeGenData/OutlinedHashTree.cpp b/llvm/lib/CodeGenData/OutlinedHashTree.cpp
index cb985aa87afcf..d64098098de62 100644
--- a/llvm/lib/CodeGenData/OutlinedHashTree.cpp
+++ b/llvm/lib/CodeGenData/OutlinedHashTree.cpp
@@ -14,9 +14,6 @@
#include "llvm/CodeGenData/OutlinedHashTree.h"
-#include <stack>
-#include <tuple>
-
#define DEBUG_TYPE "outlined-hash-tree"
using namespace llvm;
@@ -38,9 +35,10 @@ void OutlinedHashTree::walkGraph(NodeCallbackFn CallbackNode,
Stack.emplace_back(Next);
};
if (SortedWalk) {
- std::map<stable_hash, const HashNode *> SortedSuccessors;
- for (const auto &P : Current->Successors)
- SortedSuccessors[P.first] = P.second.get();
+ SmallVector<std::pair<stable_hash, const HashNode *>> SortedSuccessors;
+ for (const auto &[Hash, Successor] : Current->Successors)
+ SortedSuccessors.emplace_back(Hash, Successor.get());
+ llvm::sort(SortedSuccessors);
for (const auto &P : SortedSuccessors)
HandleNext(P.second);
} else {
@@ -60,7 +58,7 @@ size_t OutlinedHashTree::size(bool GetTerminalCountOnly) const {
size_t OutlinedHashTree::depth() const {
size_t Size = 0;
- std::unordered_map<const HashNode *, size_t> DepthMap;
+ DenseMap<const HashNode *, size_t> DepthMap;
walkGraph([&Size, &DepthMap](
const HashNode *N) { Size = std::max(Size, DepthMap[N]); },
[&DepthMap](const HashNode *Src, const HashNode *Dst) {
diff --git a/llvm/lib/CodeGenData/OutlinedHashTreeRecord.cpp b/llvm/lib/CodeGenData/OutlinedHashTreeRecord.cpp
index da4db7e9e69f1..996a57fd5e713 100644
--- a/llvm/lib/CodeGenData/OutlinedHashTreeRecord.cpp
+++ b/llvm/lib/CodeGenData/OutlinedHashTreeRecord.cpp
@@ -14,7 +14,6 @@
//===----------------------------------------------------------------------===//
#include "llvm/CodeGenData/OutlinedHashTreeRecord.h"
-#include "llvm/CodeGenData/OutlinedHashTree.h"
#include "llvm/ObjectYAML/YAML.h"
#include "llvm/Support/Endian.h"
#include "llvm/Support/EndianStream.h"
diff --git a/llvm/unittests/CodeGenData/OutlinedHashTreeTest.cpp b/llvm/unittests/CodeGenData/OutlinedHashTreeTest.cpp
index 5fdfa60673b7f..4ab5566cf817b 100644
--- a/llvm/unittests/CodeGenData/OutlinedHashTreeTest.cpp
+++ b/llvm/unittests/CodeGenData/OutlinedHashTreeTest.cpp
@@ -16,30 +16,30 @@ namespace {
TEST(OutlinedHashTreeTest, Empty) {
OutlinedHashTree HashTree;
- ASSERT_TRUE(HashTree.empty());
+ EXPECT_TRUE(HashTree.empty());
// The header node is always present.
- ASSERT_TRUE(HashTree.size() == 1);
- ASSERT_TRUE(HashTree.depth() == 0);
+ EXPECT_EQ(HashTree.size(), 1);
+ EXPECT_EQ(HashTree.depth(), 0);
}
TEST(OutlinedHashTreeTest, Insert) {
OutlinedHashTree HashTree;
HashTree.insert({{1, 2, 3}, 1});
// The node count is 4 (including the root node).
- ASSERT_TRUE(HashTree.size() == 4);
+ EXPECT_EQ(HashTree.size(), 4);
// The terminal count is 1.
- ASSERT_TRUE(HashTree.size(/*GetTerminalCountOnly=*/true) == 1);
+ EXPECT_EQ(HashTree.size(/*GetTerminalCountOnly=*/true), 1);
// The depth is 3.
- ASSERT_TRUE(HashTree.depth() == 3);
+ EXPECT_EQ(HashTree.depth(), 3);
HashTree.clear();
- ASSERT_TRUE(HashTree.empty());
+ EXPECT_TRUE(HashTree.empty());
HashTree.insert({{1, 2, 3}, 1});
HashTree.insert({{1, 2, 4}, 2});
// The nodes of 1 and 2 are shared with the same prefix.
// The nodes are root, 1, 2, 3 and 4, whose counts are 5.
- ASSERT_TRUE(HashTree.size() == 5);
+ EXPECT_EQ(HashTree.size(), 5);
}
TEST(OutlinedHashTreeTest, Find) {
@@ -48,11 +48,11 @@ TEST(OutlinedHashTreeTest, Find) {
HashTree.insert({{1, 2, 3}, 2});
// The node count does not change as the same sequences are added.
- ASSERT_TRUE(HashTree.size() == 4);
+ EXPECT_EQ(HashTree.size(), 4);
// The terminal counts are accumulated from two same sequences.
- ASSERT_TRUE(HashTree.find({1, 2, 3}));
- ASSERT_TRUE(HashTree.find({1, 2, 3}).value() == 3);
- ASSERT_FALSE(HashTree.find({1, 2}));
+ EXPECT_TRUE(HashTree.find({1, 2, 3}));
+ EXPECT_EQ(HashTree.find({1, 2, 3}).value(), 3);
+ EXPECT_FALSE(HashTree.find({1, 2}));
}
TEST(OutlinedHashTreeTest, Merge) {
diff --git a/out.txt b/out.txt
new file mode 100644
index 0000000000000..ce075d97ae246
--- /dev/null
+++ b/out.txt
@@ -0,0 +1,4444 @@
+3b0846e8f7689 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2014-05-24 12:50:23 +0000 1) //===- AArch64FrameLowering.cpp - AArch64 Frame Lowering -------*- C++ -*-====//
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2) //
+2946cd7010674 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Chandler Carruth 2019-01-19 08:50:56 +0000 3) // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+2946cd7010674 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Chandler Carruth 2019-01-19 08:50:56 +0000 4) // See https://llvm.org/LICENSE.txt for license information.
+2946cd7010674 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Chandler Carruth 2019-01-19 08:50:56 +0000 5) // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 6) //
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 7) //===----------------------------------------------------------------------===//
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 8) //
+3b0846e8f7689 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2014-05-24 12:50:23 +0000 9) // This file contains the AArch64 implementation of TargetFrameLowering class.
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 10) //
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 11) // On AArch64, stack frames are structured as follows:
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 12) //
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 13) // The stack grows downward.
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 14) //
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 15) // All of the individual frame areas on the frame below are optional, i.e. it's
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 16) // possible to create a function so that the particular area isn't present
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 17) // in the frame.
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 18) //
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 19) // At function entry, the "frame" looks as follows:
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 20) //
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 21) // | | Higher address
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 22) // |-----------------------------------|
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 23) // | |
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 24) // | arguments passed on the stack |
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 25) // | |
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 26) // |-----------------------------------| <- sp
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 27) // | | Lower address
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 28) //
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 29) //
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 30) // After the prologue has run, the frame has the following general structure.
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 31) // Note that this doesn't depict the case where a red-zone is used. Also,
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 32) // technically the last frame area (VLAs) doesn't get created until in the
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 33) // main function body, after the prologue is run. However, it's depicted here
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 34) // for completeness.
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 35) //
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 36) // | | Higher address
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 37) // |-----------------------------------|
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 38) // | |
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 39) // | arguments passed on the stack |
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 40) // | |
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 41) // |-----------------------------------|
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 42) // | |
+68266faa31acd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2017-07-13 17:03:12 +0000 43) // | (Win64 only) varargs from reg |
+68266faa31acd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2017-07-13 17:03:12 +0000 44) // | |
+68266faa31acd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2017-07-13 17:03:12 +0000 45) // |-----------------------------------|
+68266faa31acd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2017-07-13 17:03:12 +0000 46) // | |
+f28e1128d9efb llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-08-16 15:42:28 +0000 47) // | callee-saved gpr registers | <--.
+f28e1128d9efb llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-08-16 15:42:28 +0000 48) // | | | On Darwin platforms these
+f28e1128d9efb llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-08-16 15:42:28 +0000 49) // |- - - - - - - - - - - - - - - - - -| | callee saves are swapped,
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 50) // | prev_lr | | (frame record first)
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 51) // | prev_fp | <--'
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 52) // | async context if needed |
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 53) // | (a.k.a. "frame record") |
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 54) // |-----------------------------------| <- fp(=x29)
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 55) // | |
+f28e1128d9efb llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-08-16 15:42:28 +0000 56) // | callee-saved fp/simd/SVE regs |
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 57) // | |
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 58) // |-----------------------------------|
+4f99b6f0fe425 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-03 11:33:50 +0000 59) // | |
+4f99b6f0fe425 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-03 11:33:50 +0000 60) // | SVE stack objects |
+4f99b6f0fe425 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-03 11:33:50 +0000 61) // | |
+4f99b6f0fe425 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-03 11:33:50 +0000 62) // |-----------------------------------|
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 63) // |.empty.space.to.make.part.below....|
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 64) // |.aligned.in.case.it.needs.more.than| (size of this area is unknown at
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 65) // |.the.standard.16-byte.alignment....| compile time; if present)
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 66) // |-----------------------------------|
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 67) // | |
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 68) // | local variables of fixed size |
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 69) // | including spill slots |
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 70) // |-----------------------------------| <- bp(not defined by ABI,
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 71) // |.variable-sized.local.variables....| LLVM chooses X19)
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 72) // |.(VLAs)............................| (size of this area is unknown at
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 73) // |...................................| compile time)
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 74) // |-----------------------------------| <- sp
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 75) // | | Lower address
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 76) //
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 77) //
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 78) // To access the data in a frame, at-compile time, a constant offset must be
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 79) // computable from one of the pointers (fp, bp, sp) to access it. The size
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 80) // of the areas with a dotted background cannot be computed at compile-time
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 81) // if they are present, making it required to have all three of fp, bp and
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 82) // sp to be set up to be able to access all contents in the frame areas,
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 83) // assuming all of the frame areas are non-empty.
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 84) //
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 85) // For most functions, some of the frame areas are empty. For those functions,
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 86) // it may not be necessary to set up fp or bp:
+df005cbe19816 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Benjamin Kramer 2015-08-08 18:27:36 +0000 87) // * A base pointer is definitely needed when there are both VLAs and local
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 88) // variables with more-than-default alignment requirements.
+df005cbe19816 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Benjamin Kramer 2015-08-08 18:27:36 +0000 89) // * A frame pointer is definitely needed when there are local variables with
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 90) // more-than-default alignment requirements.
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 91) //
+f28e1128d9efb llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-08-16 15:42:28 +0000 92) // For Darwin platforms the frame-record (fp, lr) is stored at the top of the
+f28e1128d9efb llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-08-16 15:42:28 +0000 93) // callee-saved area, since the unwind encoding does not allow for encoding
+f28e1128d9efb llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-08-16 15:42:28 +0000 94) // this dynamically and existing tools depend on this layout. For other
+f28e1128d9efb llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-08-16 15:42:28 +0000 95) // platforms, the frame-record is stored at the bottom of the (gpr) callee-saved
+f28e1128d9efb llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-08-16 15:42:28 +0000 96) // area to allow SVE stack objects (allocated directly below the callee-saves,
+f28e1128d9efb llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-08-16 15:42:28 +0000 97) // if available) to be accessed directly from the framepointer.
+f28e1128d9efb llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-08-16 15:42:28 +0000 98) // The SVE spill/fill instructions have VL-scaled addressing modes such
+f28e1128d9efb llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-08-16 15:42:28 +0000 99) // as:
+f28e1128d9efb llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-08-16 15:42:28 +0000 100) // ldr z8, [fp, #-7 mul vl]
+f28e1128d9efb llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-08-16 15:42:28 +0000 101) // For SVE the size of the vector length (VL) is not known at compile-time, so
+f28e1128d9efb llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-08-16 15:42:28 +0000 102) // '#-7 mul vl' is an offset that can only be evaluated at runtime. With this
+f28e1128d9efb llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-08-16 15:42:28 +0000 103) // layout, we don't need to add an unscaled offset to the framepointer before
+f28e1128d9efb llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-08-16 15:42:28 +0000 104) // accessing the SVE object in the frame.
+f28e1128d9efb llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-08-16 15:42:28 +0000 105) //
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 106) // In some cases when a base pointer is not strictly needed, it is generated
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 107) // anyway when offsets from the frame pointer to access local variables become
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 108) // so large that the offset can't be encoded in the immediate fields of loads
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 109) // or stores.
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 110) //
+8d632ca436551 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Oliver Stannard 2021-03-09 14:41:31 +0000 111) // Outgoing function arguments must be at the bottom of the stack frame when
+8d632ca436551 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Oliver Stannard 2021-03-09 14:41:31 +0000 112) // calling another function. If we do not have variable-sized stack objects, we
+8d632ca436551 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Oliver Stannard 2021-03-09 14:41:31 +0000 113) // can allocate a "reserved call frame" area at the bottom of the local
+8d632ca436551 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Oliver Stannard 2021-03-09 14:41:31 +0000 114) // variable area, large enough for all outgoing calls. If we do have VLAs, then
+8d632ca436551 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Oliver Stannard 2021-03-09 14:41:31 +0000 115) // the stack pointer must be decremented and incremented around each call to
+8d632ca436551 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Oliver Stannard 2021-03-09 14:41:31 +0000 116) // make space for the arguments below the VLAs.
+8d632ca436551 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Oliver Stannard 2021-03-09 14:41:31 +0000 117) //
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 118) // FIXME: also explain the redzone concept.
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 119) //
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 120) // An example of the prologue:
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 121) //
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 122) // .globl __foo
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 123) // .align 2
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 124) // __foo:
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 125) // Ltmp0:
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 126) // .cfi_startproc
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 127) // .cfi_personality 155, ___gxx_personality_v0
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 128) // Leh_func_begin:
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 129) // .cfi_lsda 16, Lexception33
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 130) //
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 131) // stp xa,bx, [sp, -#offset]!
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 132) // ...
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 133) // stp x28, x27, [sp, #offset-32]
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 134) // stp fp, lr, [sp, #offset-16]
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 135) // add fp, sp, #offset - 16
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 136) // sub sp, sp, #1360
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 137) //
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 138) // The Stack:
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 139) // +-------------------------------------------+
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 140) // 10000 | ........ | ........ | ........ | ........ |
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 141) // 10004 | ........ | ........ | ........ | ........ |
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 142) // +-------------------------------------------+
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 143) // 10008 | ........ | ........ | ........ | ........ |
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 144) // 1000c | ........ | ........ | ........ | ........ |
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 145) // +===========================================+
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 146) // 10010 | X28 Register |
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 147) // 10014 | X28 Register |
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 148) // +-------------------------------------------+
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 149) // 10018 | X27 Register |
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 150) // 1001c | X27 Register |
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 151) // +===========================================+
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 152) // 10020 | Frame Pointer |
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 153) // 10024 | Frame Pointer |
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 154) // +-------------------------------------------+
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 155) // 10028 | Link Register |
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 156) // 1002c | Link Register |
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 157) // +===========================================+
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 158) // 10030 | ........ | ........ | ........ | ........ |
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 159) // 10034 | ........ | ........ | ........ | ........ |
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 160) // +-------------------------------------------+
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 161) // 10038 | ........ | ........ | ........ | ........ |
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 162) // 1003c | ........ | ........ | ........ | ........ |
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 163) // +-------------------------------------------+
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 164) //
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 165) // [sp] = 10030 :: >>initial value<<
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 166) // sp = 10020 :: stp fp, lr, [sp, #-16]!
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 167) // fp = sp == 10020 :: mov fp, sp
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 168) // [sp] == 10020 :: stp x28, x27, [sp, #-16]!
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 169) // sp == 10010 :: >>final value<<
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 170) //
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 171) // The frame pointer (w29) points to address 10020. If we use an offset of
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 172) // '16' from 'w29', we get the CFI offsets of -8 for w30, -16 for w29, -24
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 173) // for w27, and -32 for w28:
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 174) //
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 175) // Ltmp1:
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 176) // .cfi_def_cfa w29, 16
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 177) // Ltmp2:
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 178) // .cfi_offset w30, -8
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 179) // Ltmp3:
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 180) // .cfi_offset w29, -16
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 181) // Ltmp4:
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 182) // .cfi_offset w27, -24
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 183) // Ltmp5:
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 184) // .cfi_offset w28, -32
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 185) //
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 186) //===----------------------------------------------------------------------===//
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 187)
+3b0846e8f7689 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2014-05-24 12:50:23 +0000 188) #include "AArch64FrameLowering.h"
+3b0846e8f7689 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2014-05-24 12:50:23 +0000 189) #include "AArch64InstrInfo.h"
+3b0846e8f7689 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2014-05-24 12:50:23 +0000 190) #include "AArch64MachineFunctionInfo.h"
+11f6907f408ac llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eugene Zelenko 2017-01-25 00:29:26 +0000 191) #include "AArch64RegisterInfo.h"
+3b0846e8f7689 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2014-05-24 12:50:23 +0000 192) #include "AArch64Subtarget.h"
+3b0846e8f7689 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2014-05-24 12:50:23 +0000 193) #include "AArch64TargetMachine.h"
+2778fd0b59b64 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2017-12-20 06:51:45 +0000 194) #include "MCTargetDesc/AArch64AddressingModes.h"
+0593ce5f0bbb7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Mayer 2022-06-02 18:05:02 -0700 195) #include "MCTargetDesc/AArch64MCTargetDesc.h"
+64dcdec60cdc3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Luke Cheeseman 2018-08-17 12:53:22 +0000 196) #include "llvm/ADT/ScopeExit.h"
+11f6907f408ac llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eugene Zelenko 2017-01-25 00:29:26 +0000 197) #include "llvm/ADT/SmallVector.h"
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 198) #include "llvm/ADT/Statistic.h"
+332bb5c2364d2 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2016-07-06 21:31:27 +0000 199) #include "llvm/CodeGen/LivePhysRegs.h"
+11f6907f408ac llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eugene Zelenko 2017-01-25 00:29:26 +0000 200) #include "llvm/CodeGen/MachineBasicBlock.h"
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 201) #include "llvm/CodeGen/MachineFrameInfo.h"
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 202) #include "llvm/CodeGen/MachineFunction.h"
+11f6907f408ac llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eugene Zelenko 2017-01-25 00:29:26 +0000 203) #include "llvm/CodeGen/MachineInstr.h"
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 204) #include "llvm/CodeGen/MachineInstrBuilder.h"
+11f6907f408ac llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eugene Zelenko 2017-01-25 00:29:26 +0000 205) #include "llvm/CodeGen/MachineMemOperand.h"
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 206) #include "llvm/CodeGen/MachineModuleInfo.h"
+11f6907f408ac llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eugene Zelenko 2017-01-25 00:29:26 +0000 207) #include "llvm/CodeGen/MachineOperand.h"
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 208) #include "llvm/CodeGen/MachineRegisterInfo.h"
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 209) #include "llvm/CodeGen/RegisterScavenging.h"
+3f833edc7c518 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (David Blaikie 2017-11-08 01:01:31 +0000 210) #include "llvm/CodeGen/TargetInstrInfo.h"
+b3bde2ea50dec llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (David Blaikie 2017-11-17 01:07:10 +0000 211) #include "llvm/CodeGen/TargetRegisterInfo.h"
+b3bde2ea50dec llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (David Blaikie 2017-11-17 01:07:10 +0000 212) #include "llvm/CodeGen/TargetSubtargetInfo.h"
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 213) #include "llvm/CodeGen/WinEHFuncInfo.h"
+11f6907f408ac llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eugene Zelenko 2017-01-25 00:29:26 +0000 214) #include "llvm/IR/Attributes.h"
+11f6907f408ac llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eugene Zelenko 2017-01-25 00:29:26 +0000 215) #include "llvm/IR/CallingConv.h"
+1f8930e3d35ba llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Benjamin Kramer 2014-07-25 11:42:14 +0000 216) #include "llvm/IR/DataLayout.h"
+11f6907f408ac llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eugene Zelenko 2017-01-25 00:29:26 +0000 217) #include "llvm/IR/DebugLoc.h"
+1f8930e3d35ba llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Benjamin Kramer 2014-07-25 11:42:14 +0000 218) #include "llvm/IR/Function.h"
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 219) #include "llvm/MC/MCAsmInfo.h"
+11f6907f408ac llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eugene Zelenko 2017-01-25 00:29:26 +0000 220) #include "llvm/MC/MCDwarf.h"
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 221) #include "llvm/Support/CommandLine.h"
+1f8930e3d35ba llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Benjamin Kramer 2014-07-25 11:42:14 +0000 222) #include "llvm/Support/Debug.h"
+11f6907f408ac llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eugene Zelenko 2017-01-25 00:29:26 +0000 223) #include "llvm/Support/ErrorHandling.h"
+11f6907f408ac llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eugene Zelenko 2017-01-25 00:29:26 +0000 224) #include "llvm/Support/MathExtras.h"
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 225) #include "llvm/Support/raw_ostream.h"
+11f6907f408ac llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eugene Zelenko 2017-01-25 00:29:26 +0000 226) #include "llvm/Target/TargetMachine.h"
+11f6907f408ac llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eugene Zelenko 2017-01-25 00:29:26 +0000 227) #include "llvm/Target/TargetOptions.h"
+11f6907f408ac llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eugene Zelenko 2017-01-25 00:29:26 +0000 228) #include <cassert>
+11f6907f408ac llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eugene Zelenko 2017-01-25 00:29:26 +0000 229) #include <cstdint>
+11f6907f408ac llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eugene Zelenko 2017-01-25 00:29:26 +0000 230) #include <iterator>
+4f7e5930abf3f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kazu Hirata 2022-11-25 21:57:21 -0800 231) #include <optional>
+11f6907f408ac llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eugene Zelenko 2017-01-25 00:29:26 +0000 232) #include <vector>
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 233)
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 234) using namespace llvm;
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 235)
+84e68b2994470 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Chandler Carruth 2014-04-22 02:41:26 +0000 236) #define DEBUG_TYPE "frame-info"
+84e68b2994470 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Chandler Carruth 2014-04-22 02:41:26 +0000 237)
+3b0846e8f7689 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2014-05-24 12:50:23 +0000 238) static cl::opt<bool> EnableRedZone("aarch64-redzone",
+3b0846e8f7689 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2014-05-24 12:50:23 +0000 239) cl::desc("enable use of redzone on AArch64"),
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 240) cl::init(false), cl::Hidden);
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 241)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 242) static cl::opt<bool> StackTaggingMergeSetTag(
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 243) "stack-tagging-merge-settag",
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 244) cl::desc("merge settag instruction in function epilog"), cl::init(true),
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 245) cl::Hidden);
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 246)
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 247) static cl::opt<bool> OrderFrameObjects("aarch64-order-frame-objects",
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 248) cl::desc("sort stack allocations"),
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 249) cl::init(true), cl::Hidden);
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 250)
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 251) cl::opt<bool> EnableHomogeneousPrologEpilog(
+557efc9a8b686 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Fangrui Song 2022-06-03 21:59:05 -0700 252) "homogeneous-prolog-epilog", cl::Hidden,
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 253) cl::desc("Emit homogeneous prologue and epilogue for the size "
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 254) "optimization (default = off)"));
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 255)
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 256) STATISTIC(NumRedZoneFunctions, "Number of functions using red zone");
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 257)
+82a0e808bb2cd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2020-11-19 12:32:50 +0000 258) /// Returns how much of the incoming argument stack area (in bytes) we should
+82a0e808bb2cd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2020-11-19 12:32:50 +0000 259) /// clean up in an epilogue. For the C calling convention this will be 0, for
+82a0e808bb2cd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2020-11-19 12:32:50 +0000 260) /// guaranteed tail call conventions it can be positive (a normal return or a
+82a0e808bb2cd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2020-11-19 12:32:50 +0000 261) /// tail call to a function that uses less stack space for arguments) or
+82a0e808bb2cd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2020-11-19 12:32:50 +0000 262) /// negative (for a tail call to a function that needs more stack space than us
+82a0e808bb2cd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2020-11-19 12:32:50 +0000 263) /// for arguments).
+82a0e808bb2cd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2020-11-19 12:32:50 +0000 264) static int64_t getArgumentStackToRestore(MachineFunction &MF,
+82a0e808bb2cd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2020-11-19 12:32:50 +0000 265) MachineBasicBlock &MBB) {
+7af27b65b3ce4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2020-07-09 11:42:50 -0700 266) MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
+7af27b65b3ce4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2020-07-09 11:42:50 -0700 267) AArch64FunctionInfo *AFI = MF.getInfo<AArch64FunctionInfo>();
+1d2b558265bd9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Anatoly Trosinenko 2023-10-11 13:52:41 +0300 268) bool IsTailCallReturn = (MBB.end() != MBBI)
+1d2b558265bd9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Anatoly Trosinenko 2023-10-11 13:52:41 +0300 269) ? AArch64InstrInfo::isTailCallReturnInst(*MBBI)
+1d2b558265bd9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Anatoly Trosinenko 2023-10-11 13:52:41 +0300 270) : false;
+7af27b65b3ce4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2020-07-09 11:42:50 -0700 271)
+82a0e808bb2cd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2020-11-19 12:32:50 +0000 272) int64_t ArgumentPopSize = 0;
+7af27b65b3ce4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2020-07-09 11:42:50 -0700 273) if (IsTailCallReturn) {
+7af27b65b3ce4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2020-07-09 11:42:50 -0700 274) MachineOperand &StackAdjust = MBBI->getOperand(1);
+7af27b65b3ce4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2020-07-09 11:42:50 -0700 275)
+7af27b65b3ce4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2020-07-09 11:42:50 -0700 276) // For a tail-call in a callee-pops-arguments environment, some or all of
+7af27b65b3ce4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2020-07-09 11:42:50 -0700 277) // the stack may actually be in use for the call's arguments, this is
+7af27b65b3ce4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2020-07-09 11:42:50 -0700 278) // calculated during LowerCall and consumed here...
+7af27b65b3ce4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2020-07-09 11:42:50 -0700 279) ArgumentPopSize = StackAdjust.getImm();
+7af27b65b3ce4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2020-07-09 11:42:50 -0700 280) } else {
+7af27b65b3ce4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2020-07-09 11:42:50 -0700 281) // ... otherwise the amount to pop is *all* of the argument space,
+7af27b65b3ce4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2020-07-09 11:42:50 -0700 282) // conveniently stored in the MachineFunctionInfo by
+7af27b65b3ce4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2020-07-09 11:42:50 -0700 283) // LowerFormalArguments. This will, of course, be zero for the C calling
+7af27b65b3ce4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2020-07-09 11:42:50 -0700 284) // convention.
+7af27b65b3ce4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2020-07-09 11:42:50 -0700 285) ArgumentPopSize = AFI->getArgumentStackToRestore();
+7af27b65b3ce4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2020-07-09 11:42:50 -0700 286) }
+7af27b65b3ce4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2020-07-09 11:42:50 -0700 287)
+7af27b65b3ce4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2020-07-09 11:42:50 -0700 288) return ArgumentPopSize;
+7af27b65b3ce4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2020-07-09 11:42:50 -0700 289) }
+7af27b65b3ce4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2020-07-09 11:42:50 -0700 290)
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 291) static bool produceCompactUnwindFrame(MachineFunction &MF);
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 292) static bool needsWinCFI(const MachineFunction &MF);
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 293) static StackOffset getSVEStackSize(const MachineFunction &MF);
+90c326b198080 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Mikael Holmen 2024-01-18 11:24:25 +0100 294) static Register findScratchNonCalleeSaveRegister(MachineBasicBlock *MBB);
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 295)
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 296) /// Returns true if a homogeneous prolog or epilog code can be emitted
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 297) /// for the size optimization. If possible, a frame helper call is injected.
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 298) /// When Exit block is given, this check is for epilog.
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 299) bool AArch64FrameLowering::homogeneousPrologEpilog(
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 300) MachineFunction &MF, MachineBasicBlock *Exit) const {
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 301) if (!MF.getFunction().hasMinSize())
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 302) return false;
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 303) if (!EnableHomogeneousPrologEpilog)
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 304) return false;
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 305) if (EnableRedZone)
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 306) return false;
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 307)
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 308) // TODO: Window is supported yet.
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 309) if (needsWinCFI(MF))
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 310) return false;
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 311) // TODO: SVE is not supported yet.
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 312) if (getSVEStackSize(MF))
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 313) return false;
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 314)
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 315) // Bail on stack adjustment needed on return for simplicity.
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 316) const MachineFrameInfo &MFI = MF.getFrameInfo();
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 317) const TargetRegisterInfo *RegInfo = MF.getSubtarget().getRegisterInfo();
+a9968c0a339ab llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tomas Matheson 2021-03-15 13:01:34 +0000 318) if (MFI.hasVarSizedObjects() || RegInfo->hasStackRealignment(MF))
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 319) return false;
+82a0e808bb2cd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2020-11-19 12:32:50 +0000 320) if (Exit && getArgumentStackToRestore(MF, *Exit))
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 321) return false;
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 322)
+baf39032186ec llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Zhaoxuan Jiang 2023-09-26 23:42:01 +0800 323) auto *AFI = MF.getInfo<AArch64FunctionInfo>();
+baf39032186ec llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Zhaoxuan Jiang 2023-09-26 23:42:01 +0800 324) if (AFI->hasSwiftAsyncContext())
+baf39032186ec llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Zhaoxuan Jiang 2023-09-26 23:42:01 +0800 325) return false;
+baf39032186ec llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Zhaoxuan Jiang 2023-09-26 23:42:01 +0800 326)
+041a786c78fbc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Zhaoxuan Jiang 2023-10-17 14:34:04 +0800 327) // If there are an odd number of GPRs before LR and FP in the CSRs list,
+041a786c78fbc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Zhaoxuan Jiang 2023-10-17 14:34:04 +0800 328) // they will not be paired into one RegPairInfo, which is incompatible with
+041a786c78fbc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Zhaoxuan Jiang 2023-10-17 14:34:04 +0800 329) // the assumption made by the homogeneous prolog epilog pass.
+041a786c78fbc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Zhaoxuan Jiang 2023-10-17 14:34:04 +0800 330) const MCPhysReg *CSRegs = MF.getRegInfo().getCalleeSavedRegs();
+041a786c78fbc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Zhaoxuan Jiang 2023-10-17 14:34:04 +0800 331) unsigned NumGPRs = 0;
+041a786c78fbc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Zhaoxuan Jiang 2023-10-17 14:34:04 +0800 332) for (unsigned I = 0; CSRegs[I]; ++I) {
+041a786c78fbc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Zhaoxuan Jiang 2023-10-17 14:34:04 +0800 333) Register Reg = CSRegs[I];
+041a786c78fbc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Zhaoxuan Jiang 2023-10-17 14:34:04 +0800 334) if (Reg == AArch64::LR) {
+041a786c78fbc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Zhaoxuan Jiang 2023-10-17 14:34:04 +0800 335) assert(CSRegs[I + 1] == AArch64::FP);
+041a786c78fbc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Zhaoxuan Jiang 2023-10-17 14:34:04 +0800 336) if (NumGPRs % 2 != 0)
+041a786c78fbc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Zhaoxuan Jiang 2023-10-17 14:34:04 +0800 337) return false;
+041a786c78fbc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Zhaoxuan Jiang 2023-10-17 14:34:04 +0800 338) break;
+041a786c78fbc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Zhaoxuan Jiang 2023-10-17 14:34:04 +0800 339) }
+041a786c78fbc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Zhaoxuan Jiang 2023-10-17 14:34:04 +0800 340) if (AArch64::GPR64RegClass.contains(Reg))
+041a786c78fbc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Zhaoxuan Jiang 2023-10-17 14:34:04 +0800 341) ++NumGPRs;
+041a786c78fbc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Zhaoxuan Jiang 2023-10-17 14:34:04 +0800 342) }
+041a786c78fbc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Zhaoxuan Jiang 2023-10-17 14:34:04 +0800 343)
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 344) return true;
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 345) }
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 346)
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 347) /// Returns true if CSRs should be paired.
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 348) bool AArch64FrameLowering::producePairRegisters(MachineFunction &MF) const {
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 349) return produceCompactUnwindFrame(MF) || homogeneousPrologEpilog(MF);
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 350) }
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 351)
+5c290dc206016 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2018-01-19 03:16:36 +0000 352) /// This is the biggest offset to the stack pointer we can encode in aarch64
+5c290dc206016 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2018-01-19 03:16:36 +0000 353) /// instructions (without using a separate calculation and a temp register).
+5c290dc206016 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2018-01-19 03:16:36 +0000 354) /// Note that the exception here are vector stores/loads which cannot encode any
+5c290dc206016 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2018-01-19 03:16:36 +0000 355) /// displacements (see estimateRSStackSizeLimit(), isAArch64FrameOffsetLegal()).
+5c290dc206016 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2018-01-19 03:16:36 +0000 356) static const unsigned DefaultSafeSPDisplacement = 255;
+5c290dc206016 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2018-01-19 03:16:36 +0000 357)
+2af1e90eb2697 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2017-05-30 06:58:41 +0000 358) /// Look at each instruction that references stack frames and return the stack
+2af1e90eb2697 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2017-05-30 06:58:41 +0000 359) /// size limit beyond which some of these instructions will require a scratch
+2af1e90eb2697 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2017-05-30 06:58:41 +0000 360) /// register during their expansion later.
+2af1e90eb2697 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2017-05-30 06:58:41 +0000 361) static unsigned estimateRSStackSizeLimit(MachineFunction &MF) {
+2af1e90eb2697 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2017-05-30 06:58:41 +0000 362) // FIXME: For now, just conservatively guestimate based on unscaled indexing
+2af1e90eb2697 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2017-05-30 06:58:41 +0000 363) // range. We'll end up allocating an unnecessary spill slot a lot, but
+2af1e90eb2697 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2017-05-30 06:58:41 +0000 364) // realistically that's not a big deal at this stage of the game.
+2af1e90eb2697 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2017-05-30 06:58:41 +0000 365) for (MachineBasicBlock &MBB : MF) {
+2af1e90eb2697 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2017-05-30 06:58:41 +0000 366) for (MachineInstr &MI : MBB) {
+801bf7ebbed34 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Shiva Chen 2018-05-09 02:42:00 +0000 367) if (MI.isDebugInstr() || MI.isPseudo() ||
+2af1e90eb2697 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2017-05-30 06:58:41 +0000 368) MI.getOpcode() == AArch64::ADDXri ||
+2af1e90eb2697 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2017-05-30 06:58:41 +0000 369) MI.getOpcode() == AArch64::ADDSXri)
+2af1e90eb2697 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2017-05-30 06:58:41 +0000 370) continue;
+2af1e90eb2697 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2017-05-30 06:58:41 +0000 371)
+d13d419d4a149 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Javed Absar 2017-10-30 22:00:06 +0000 372) for (const MachineOperand &MO : MI.operands()) {
+d13d419d4a149 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Javed Absar 2017-10-30 22:00:06 +0000 373) if (!MO.isFI())
+2af1e90eb2697 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2017-05-30 06:58:41 +0000 374) continue;
+2af1e90eb2697 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2017-05-30 06:58:41 +0000 375)
+612b038966103 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-08-06 13:06:40 +0000 376) StackOffset Offset;
+2af1e90eb2697 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2017-05-30 06:58:41 +0000 377) if (isAArch64FrameOffsetLegal(MI, Offset, nullptr, nullptr, nullptr) ==
+2af1e90eb2697 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2017-05-30 06:58:41 +0000 378) AArch64FrameOffsetCannotUpdate)
+2af1e90eb2697 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2017-05-30 06:58:41 +0000 379) return 0;
+2af1e90eb2697 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2017-05-30 06:58:41 +0000 380) }
+2af1e90eb2697 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2017-05-30 06:58:41 +0000 381) }
+2af1e90eb2697 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2017-05-30 06:58:41 +0000 382) }
+5c290dc206016 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2018-01-19 03:16:36 +0000 383) return DefaultSafeSPDisplacement;
+2af1e90eb2697 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2017-05-30 06:58:41 +0000 384) }
+2af1e90eb2697 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2017-05-30 06:58:41 +0000 385)
+9a1c243aa5ded llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-13 08:31:49 +0000 386) TargetStackID::Value
+9a1c243aa5ded llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-13 08:31:49 +0000 387) AArch64FrameLowering::getStackIDForScalableVectors() const {
+914e2f5a02f4f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hsiangkai Wang 2021-01-12 16:19:37 +0800 388) return TargetStackID::ScalableVector;
+9a1c243aa5ded llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-13 08:31:49 +0000 389) }
+9a1c243aa5ded llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-13 08:31:49 +0000 390)
+494abe139a9aa llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Daniel Frampton 2020-03-31 13:12:54 -0700 391) /// Returns the size of the fixed object area (allocated next to sp on entry)
+494abe139a9aa llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Daniel Frampton 2020-03-31 13:12:54 -0700 392) /// On Win64 this may include a var args area and an UnwindHelp object for EH.
+494abe139a9aa llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Daniel Frampton 2020-03-31 13:12:54 -0700 393) static unsigned getFixedObjectSize(const MachineFunction &MF,
+494abe139a9aa llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Daniel Frampton 2020-03-31 13:12:54 -0700 394) const AArch64FunctionInfo *AFI, bool IsWin64,
+494abe139a9aa llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Daniel Frampton 2020-03-31 13:12:54 -0700 395) bool IsFunclet) {
+494abe139a9aa llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Daniel Frampton 2020-03-31 13:12:54 -0700 396) if (!IsWin64 || IsFunclet) {
+82a0e808bb2cd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2020-11-19 12:32:50 +0000 397) return AFI->getTailCallReservedStack();
+494abe139a9aa llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Daniel Frampton 2020-03-31 13:12:54 -0700 398) } else {
+692566a8b2368 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hiroshi Yamauchi 2024-02-15 15:54:03 -0800 399) if (AFI->getTailCallReservedStack() != 0 &&
+692566a8b2368 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hiroshi Yamauchi 2024-02-15 15:54:03 -0800 400) !MF.getFunction().getAttributes().hasAttrSomewhere(
+692566a8b2368 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hiroshi Yamauchi 2024-02-15 15:54:03 -0800 401) Attribute::SwiftAsync))
+82a0e808bb2cd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2020-11-19 12:32:50 +0000 402) report_fatal_error("cannot generate ABI-changing tail call for Win64");
+494abe139a9aa llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Daniel Frampton 2020-03-31 13:12:54 -0700 403) // Var args are stored here in the primary function.
+494abe139a9aa llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Daniel Frampton 2020-03-31 13:12:54 -0700 404) const unsigned VarArgsArea = AFI->getVarArgsGPRSize();
+494abe139a9aa llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Daniel Frampton 2020-03-31 13:12:54 -0700 405) // To support EH funclets we allocate an UnwindHelp object
+494abe139a9aa llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Daniel Frampton 2020-03-31 13:12:54 -0700 406) const unsigned UnwindHelpObject = (MF.hasEHFunclets() ? 8 : 0);
+692566a8b2368 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hiroshi Yamauchi 2024-02-15 15:54:03 -0800 407) return AFI->getTailCallReservedStack() +
+692566a8b2368 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hiroshi Yamauchi 2024-02-15 15:54:03 -0800 408) alignTo(VarArgsArea + UnwindHelpObject, 16);
+494abe139a9aa llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Daniel Frampton 2020-03-31 13:12:54 -0700 409) }
+494abe139a9aa llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Daniel Frampton 2020-03-31 13:12:54 -0700 410) }
+494abe139a9aa llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Daniel Frampton 2020-03-31 13:12:54 -0700 411)
+4f99b6f0fe425 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-03 11:33:50 +0000 412) /// Returns the size of the entire SVE stackframe (calleesaves + spills).
+4f99b6f0fe425 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-03 11:33:50 +0000 413) static StackOffset getSVEStackSize(const MachineFunction &MF) {
+4f99b6f0fe425 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-03 11:33:50 +0000 414) const AArch64FunctionInfo *AFI = MF.getInfo<AArch64FunctionInfo>();
+73b6cb67dcdad llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-11-03 16:44:20 +0000 415) return StackOffset::getScalable((int64_t)AFI->getStackSizeSVE());
+4f99b6f0fe425 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-03 11:33:50 +0000 416) }
+4f99b6f0fe425 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-03 11:33:50 +0000 417)
+3b0846e8f7689 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2014-05-24 12:50:23 +0000 418) bool AArch64FrameLowering::canUseRedZone(const MachineFunction &MF) const {
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 419) if (!EnableRedZone)
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 420) return false;
+0146d206317e1 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Amara Emerson 2021-01-21 14:54:26 -0800 421)
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 422) // Don't use the red zone if the function explicitly asks us not to.
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 423) // This is typically used for kernel code.
+0146d206317e1 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Amara Emerson 2021-01-21 14:54:26 -0800 424) const AArch64Subtarget &Subtarget = MF.getSubtarget<AArch64Subtarget>();
+0146d206317e1 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Amara Emerson 2021-01-21 14:54:26 -0800 425) const unsigned RedZoneSize =
+0146d206317e1 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Amara Emerson 2021-01-21 14:54:26 -0800 426) Subtarget.getTargetLowering()->getRedZoneSize(MF.getFunction());
+0146d206317e1 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Amara Emerson 2021-01-21 14:54:26 -0800 427) if (!RedZoneSize)
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 428) return false;
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 429)
+941a705b7bf15 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2016-07-28 18:40:00 +0000 430) const MachineFrameInfo &MFI = MF.getFrameInfo();
+3b0846e8f7689 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2014-05-24 12:50:23 +0000 431) const AArch64FunctionInfo *AFI = MF.getInfo<AArch64FunctionInfo>();
+965ed1e974e80 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kiran Chandramohan 2019-11-20 12:45:26 +0000 432) uint64_t NumBytes = AFI->getLocalStackSize();
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 433)
+0146d206317e1 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Amara Emerson 2021-01-21 14:54:26 -0800 434) return !(MFI.hasCalls() || hasFP(MF) || NumBytes > RedZoneSize ||
+4f99b6f0fe425 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-03 11:33:50 +0000 435) getSVEStackSize(MF));
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 436) }
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 437)
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 438) /// hasFP - Return true if the specified function should have a dedicated frame
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 439) /// pointer register.
+3b0846e8f7689 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2014-05-24 12:50:23 +0000 440) bool AArch64FrameLowering::hasFP(const MachineFunction &MF) const {
+941a705b7bf15 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2016-07-28 18:40:00 +0000 441) const MachineFrameInfo &MFI = MF.getFrameInfo();
+fc6de428c8ab1 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eric Christopher 2014-08-05 02:39:49 +0000 442) const TargetRegisterInfo *RegInfo = MF.getSubtarget().getRegisterInfo();
+702c3f56d3868 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2023-09-01 14:34:13 +0000 443)
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 444) // Win64 EH requires a frame pointer if funclets are present, as the locals
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 445) // are accessed off the frame pointer in both the parent function and the
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 446) // funclets.
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 447) if (MF.hasEHFunclets())
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 448) return true;
+62c1a1e7c7fc1 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-03-02 17:58:31 +0000 449) // Retain behavior of always omitting the FP for leaf functions when possible.
+a0aa58dad53f2 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Fangrui Song 2019-12-07 10:23:30 -0800 450) if (MF.getTarget().Options.DisableFramePointerElim(MF))
+5c290dc206016 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2018-01-19 03:16:36 +0000 451) return true;
+5c290dc206016 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2018-01-19 03:16:36 +0000 452) if (MFI.hasVarSizedObjects() || MFI.isFrameAddressTaken() ||
+5c290dc206016 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2018-01-19 03:16:36 +0000 453) MFI.hasStackMap() || MFI.hasPatchPoint() ||
+a9968c0a339ab llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tomas Matheson 2021-03-15 13:01:34 +0000 454) RegInfo->hasStackRealignment(MF))
+5c290dc206016 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2018-01-19 03:16:36 +0000 455) return true;
+5c290dc206016 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2018-01-19 03:16:36 +0000 456) // With large callframes around we may need to use FP to access the scavenging
+5c290dc206016 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2018-01-19 03:16:36 +0000 457) // emergency spillslot.
+5c290dc206016 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2018-01-19 03:16:36 +0000 458) //
+5c290dc206016 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2018-01-19 03:16:36 +0000 459) // Unfortunately some calls to hasFP() like machine verifier ->
+5c290dc206016 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2018-01-19 03:16:36 +0000 460) // getReservedReg() -> hasFP in the middle of global isel are too early
+5c290dc206016 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2018-01-19 03:16:36 +0000 461) // to know the max call frame size. Hopefully conservatively returning "true"
+5c290dc206016 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2018-01-19 03:16:36 +0000 462) // in those cases is fine.
+5c290dc206016 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2018-01-19 03:16:36 +0000 463) // DefaultSafeSPDisplacement is fine as we only emergency spill GP regs.
+5c290dc206016 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2018-01-19 03:16:36 +0000 464) if (!MFI.isMaxCallFrameSizeComputed() ||
+5c290dc206016 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2018-01-19 03:16:36 +0000 465) MFI.getMaxCallFrameSize() > DefaultSafeSPDisplacement)
+5c290dc206016 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2018-01-19 03:16:36 +0000 466) return true;
+5c290dc206016 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2018-01-19 03:16:36 +0000 467)
+5c290dc206016 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2018-01-19 03:16:36 +0000 468) return false;
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 469) }
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 470)
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 471) /// hasReservedCallFrame - Under normal circumstances, when a frame pointer is
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 472) /// not required, we reserve argument space for call sites in the function
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 473) /// immediately on entry to the current function. This eliminates the need for
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 474) /// add/sub sp brackets around call sites. Returns true if the call frame is
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 475) /// included as part of the stack frame.
+3b0846e8f7689 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2014-05-24 12:50:23 +0000 476) bool
+3b0846e8f7689 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2014-05-24 12:50:23 +0000 477) AArch64FrameLowering::hasReservedCallFrame(const MachineFunction &MF) const {
+b1806e6a1f058 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-12-02 10:09:41 +0000 478) // The stack probing code for the dynamically allocated outgoing arguments
+b1806e6a1f058 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-12-02 10:09:41 +0000 479) // area assumes that the stack is probed at the top - either by the prologue
+b1806e6a1f058 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-12-02 10:09:41 +0000 480) // code, which issues a probe if `hasVarSizedObjects` return true, or by the
+b1806e6a1f058 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-12-02 10:09:41 +0000 481) // most recent variable-sized object allocation. Changing the condition here
+b1806e6a1f058 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-12-02 10:09:41 +0000 482) // may need to be followed up by changes to the probe issuing logic.
+941a705b7bf15 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2016-07-28 18:40:00 +0000 483) return !MF.getFrameInfo().hasVarSizedObjects();
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 484) }
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 485)
+e1a2e90ffadd8 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hans Wennborg 2016-03-31 18:33:38 +0000 486) MachineBasicBlock::iterator AArch64FrameLowering::eliminateCallFramePseudoInstr(
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 487) MachineFunction &MF, MachineBasicBlock &MBB,
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 488) MachineBasicBlock::iterator I) const {
+fc6de428c8ab1 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eric Christopher 2014-08-05 02:39:49 +0000 489) const AArch64InstrInfo *TII =
+fc6de428c8ab1 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eric Christopher 2014-08-05 02:39:49 +0000 490) static_cast<const AArch64InstrInfo *>(MF.getSubtarget().getInstrInfo());
+b1806e6a1f058 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-12-02 10:09:41 +0000 491) const AArch64TargetLowering *TLI =
+b1806e6a1f058 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-12-02 10:09:41 +0000 492) MF.getSubtarget<AArch64Subtarget>().getTargetLowering();
+e9c6f3f5e7e23 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Jie Fu 2023-12-02 18:32:20 +0800 493) [[maybe_unused]] MachineFrameInfo &MFI = MF.getFrameInfo();
+09cc56431078f llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Jiangning Liu 2014-05-15 01:33:17 +0000 494) DebugLoc DL = I->getDebugLoc();
+fa3872e7ad06f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2015-05-18 20:27:55 +0000 495) unsigned Opc = I->getOpcode();
+09cc56431078f llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Jiangning Liu 2014-05-15 01:33:17 +0000 496) bool IsDestroy = Opc == TII->getCallFrameDestroyOpcode();
+09cc56431078f llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Jiangning Liu 2014-05-15 01:33:17 +0000 497) uint64_t CalleePopAmount = IsDestroy ? I->getOperand(1).getImm() : 0;
+09cc56431078f llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Jiangning Liu 2014-05-15 01:33:17 +0000 498)
+8fcc70f141489 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matt Arsenault 2019-06-25 20:53:35 +0000 499) if (!hasReservedCallFrame(MF)) {
+09cc56431078f llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Jiangning Liu 2014-05-15 01:33:17 +0000 500) int64_t Amount = I->getOperand(0).getImm();
+b727aabcb8c67 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Guillaume Chatelet 2020-03-26 17:51:25 +0000 501) Amount = alignTo(Amount, getStackAlign());
+09cc56431078f llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Jiangning Liu 2014-05-15 01:33:17 +0000 502) if (!IsDestroy)
+09cc56431078f llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Jiangning Liu 2014-05-15 01:33:17 +0000 503) Amount = -Amount;
+09cc56431078f llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Jiangning Liu 2014-05-15 01:33:17 +0000 504)
+09cc56431078f llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Jiangning Liu 2014-05-15 01:33:17 +0000 505) // N.b. if CalleePopAmount is valid but zero (i.e. callee would pop, but it
+09cc56431078f llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Jiangning Liu 2014-05-15 01:33:17 +0000 506) // doesn't have to pop anything), then the first operand will be zero too so
+09cc56431078f llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Jiangning Liu 2014-05-15 01:33:17 +0000 507) // this adjustment is a no-op.
+09cc56431078f llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Jiangning Liu 2014-05-15 01:33:17 +0000 508) if (CalleePopAmount == 0) {
+09cc56431078f llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Jiangning Liu 2014-05-15 01:33:17 +0000 509) // FIXME: in-function stack adjustment for calls is limited to 24-bits
+09cc56431078f llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Jiangning Liu 2014-05-15 01:33:17 +0000 510) // because there's no guaranteed temporary register available.
+09cc56431078f llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Jiangning Liu 2014-05-15 01:33:17 +0000 511) //
+469de19a09313 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sylvestre Ledru 2014-08-11 18:04:46 +0000 512) // ADD/SUB (immediate) has only LSL #0 and LSL #12 available.
+09cc56431078f llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Jiangning Liu 2014-05-15 01:33:17 +0000 513) // 1) For offset <= 12-bit, we use LSL #0
+09cc56431078f llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Jiangning Liu 2014-05-15 01:33:17 +0000 514) // 2) For 12-bit <= offset <= 24-bit, we use two instructions. One uses
+09cc56431078f llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Jiangning Liu 2014-05-15 01:33:17 +0000 515) // LSL #0, and the other uses LSL #12.
+09cc56431078f llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Jiangning Liu 2014-05-15 01:33:17 +0000 516) //
+401a4ab8d8511 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Chad Rosier 2016-01-19 16:50:45 +0000 517) // Most call frames will be allocated at the start of a function so
+09cc56431078f llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Jiangning Liu 2014-05-15 01:33:17 +0000 518) // this is OK, but it is a limitation that needs dealing with.
+09cc56431078f llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Jiangning Liu 2014-05-15 01:33:17 +0000 519) assert(Amount > -0xffffff && Amount < 0xffffff && "call frame too large");
+b1806e6a1f058 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-12-02 10:09:41 +0000 520)
+b1806e6a1f058 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-12-02 10:09:41 +0000 521) if (TLI->hasInlineStackProbe(MF) &&
+b1806e6a1f058 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-12-02 10:09:41 +0000 522) -Amount >= AArch64::StackProbeMaxUnprobedStack) {
+b1806e6a1f058 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-12-02 10:09:41 +0000 523) // When stack probing is enabled, the decrement of SP may need to be
+b1806e6a1f058 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-12-02 10:09:41 +0000 524) // probed. We only need to do this if the call site needs 1024 bytes of
+b1806e6a1f058 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-12-02 10:09:41 +0000 525) // space or more, because a region smaller than that is allowed to be
+b1806e6a1f058 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-12-02 10:09:41 +0000 526) // unprobed at an ABI boundary. We rely on the fact that SP has been
+b1806e6a1f058 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-12-02 10:09:41 +0000 527) // probed exactly at this point, either by the prologue or most recent
+b1806e6a1f058 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-12-02 10:09:41 +0000 528) // dynamic allocation.
+b1806e6a1f058 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-12-02 10:09:41 +0000 529) assert(MFI.hasVarSizedObjects() &&
+b1806e6a1f058 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-12-02 10:09:41 +0000 530) "non-reserved call frame without var sized objects?");
+b1806e6a1f058 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-12-02 10:09:41 +0000 531) Register ScratchReg =
+b1806e6a1f058 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-12-02 10:09:41 +0000 532) MF.getRegInfo().createVirtualRegister(&AArch64::GPR64RegClass);
+b1806e6a1f058 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-12-02 10:09:41 +0000 533) inlineStackProbeFixed(I, ScratchReg, -Amount, StackOffset::get(0, 0));
+b1806e6a1f058 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-12-02 10:09:41 +0000 534) } else {
+b1806e6a1f058 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-12-02 10:09:41 +0000 535) emitFrameOffset(MBB, I, DL, AArch64::SP, AArch64::SP,
+b1806e6a1f058 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-12-02 10:09:41 +0000 536) StackOffset::getFixed(Amount), TII);
+b1806e6a1f058 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-12-02 10:09:41 +0000 537) }
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 538) }
+09cc56431078f llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Jiangning Liu 2014-05-15 01:33:17 +0000 539) } else if (CalleePopAmount != 0) {
+09cc56431078f llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Jiangning Liu 2014-05-15 01:33:17 +0000 540) // If the calling convention demands that the callee pops arguments from the
+09cc56431078f llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Jiangning Liu 2014-05-15 01:33:17 +0000 541) // stack, we want to add it back if we have a reserved call frame.
+09cc56431078f llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Jiangning Liu 2014-05-15 01:33:17 +0000 542) assert(CalleePopAmount < 0xffffff && "call frame too large");
+612b038966103 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-08-06 13:06:40 +0000 543) emitFrameOffset(MBB, I, DL, AArch64::SP, AArch64::SP,
+73b6cb67dcdad llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-11-03 16:44:20 +0000 544) StackOffset::getFixed(-(int64_t)CalleePopAmount), TII);
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 545) }
+e1a2e90ffadd8 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hans Wennborg 2016-03-31 18:33:38 +0000 546) return MBB.erase(I);
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 547) }
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 548)
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 549) void AArch64FrameLowering::emitCalleeSavedGPRLocations(
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 550) MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI) const {
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 551) MachineFunction &MF = *MBB.getParent();
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 552) MachineFrameInfo &MFI = MF.getFrameInfo();
+fd6584a22043b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-08-04 10:58:47 +0100 553)
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 554) const std::vector<CalleeSavedInfo> &CSI = MFI.getCalleeSavedInfo();
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 555) if (CSI.empty())
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 556) return;
+fd6584a22043b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-08-04 10:58:47 +0100 557)
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 558) const TargetSubtargetInfo &STI = MF.getSubtarget();
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 559) const TargetRegisterInfo &TRI = *STI.getRegisterInfo();
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 560) const TargetInstrInfo &TII = *STI.getInstrInfo();
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 561) DebugLoc DL = MBB.findDebugLoc(MBBI);
+fd6584a22043b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-08-04 10:58:47 +0100 562)
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 563) for (const auto &Info : CSI) {
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 564) if (MFI.getStackID(Info.getFrameIdx()) == TargetStackID::ScalableVector)
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 565) continue;
+fd6584a22043b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-08-04 10:58:47 +0100 566)
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 567) assert(!Info.isSpilledToReg() && "Spilling to registers not implemented");
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 568) unsigned DwarfReg = TRI.getDwarfRegNum(Info.getReg(), true);
+fd6584a22043b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-08-04 10:58:47 +0100 569)
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 570) int64_t Offset =
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 571) MFI.getObjectOffset(Info.getFrameIdx()) - getOffsetOfLocalArea();
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 572) unsigned CFIIndex = MF.addFrameInst(
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 573) MCCFIInstruction::createOffset(nullptr, DwarfReg, Offset));
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 574) BuildMI(MBB, MBBI, DL, TII.get(TargetOpcode::CFI_INSTRUCTION))
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 575) .addCFIIndex(CFIIndex)
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 576) .setMIFlags(MachineInstr::FrameSetup);
+fd6584a22043b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-08-04 10:58:47 +0100 577) }
+fd6584a22043b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-08-04 10:58:47 +0100 578) }
+fd6584a22043b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-08-04 10:58:47 +0100 579)
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 580) void AArch64FrameLowering::emitCalleeSavedSVELocations(
+62d472507e515 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-25 16:36:08 +0000 581) MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI) const {
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 582) MachineFunction &MF = *MBB.getParent();
+941a705b7bf15 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2016-07-28 18:40:00 +0000 583) MachineFrameInfo &MFI = MF.getFrameInfo();
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 584)
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 585) // Add callee saved registers to move list.
+941a705b7bf15 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2016-07-28 18:40:00 +0000 586) const std::vector<CalleeSavedInfo> &CSI = MFI.getCalleeSavedInfo();
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 587) if (CSI.empty())
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 588) return;
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 589)
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 590) const TargetSubtargetInfo &STI = MF.getSubtarget();
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 591) const TargetRegisterInfo &TRI = *STI.getRegisterInfo();
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 592) const TargetInstrInfo &TII = *STI.getInstrInfo();
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 593) DebugLoc DL = MBB.findDebugLoc(MBBI);
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 594) AArch64FunctionInfo &AFI = *MF.getInfo<AArch64FunctionInfo>();
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 595)
+91f1f47751687 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Jim Grosbach 2014-04-02 18:00:49 +0000 596) for (const auto &Info : CSI) {
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 597) if (!(MFI.getStackID(Info.getFrameIdx()) == TargetStackID::ScalableVector))
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 598) continue;
+bb3344c7d8c27 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-08-04 11:10:32 +0100 599)
+bb3344c7d8c27 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-08-04 11:10:32 +0100 600) // Not all unwinders may know about SVE registers, so assume the lowest
+bb3344c7d8c27 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-08-04 11:10:32 +0100 601) // common demoninator.
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 602) assert(!Info.isSpilledToReg() && "Spilling to registers not implemented");
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 603) unsigned Reg = Info.getReg();
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 604) if (!static_cast<const AArch64RegisterInfo &>(TRI).regNeedsCFI(Reg, Reg))
+bb3344c7d8c27 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-08-04 11:10:32 +0100 605) continue;
+bb3344c7d8c27 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-08-04 11:10:32 +0100 606)
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 607) StackOffset Offset =
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 608) StackOffset::getScalable(MFI.getObjectOffset(Info.getFrameIdx())) -
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 609) StackOffset::getFixed(AFI.getCalleeSavedStackSize(MFI));
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 610)
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 611) unsigned CFIIndex = MF.addFrameInst(createCFAOffset(TRI, Reg, Offset));
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 612) BuildMI(MBB, MBBI, DL, TII.get(TargetOpcode::CFI_INSTRUCTION))
+b9fa945d510cd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Adrian Prantl 2014-12-16 00:20:49 +0000 613) .addCFIIndex(CFIIndex)
+b9fa945d510cd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Adrian Prantl 2014-12-16 00:20:49 +0000 614) .setMIFlags(MachineInstr::FrameSetup);
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 615) }
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 616) }
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 617)
+b4ad28da196d3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-11 12:08:26 +0100 618) static void insertCFISameValue(const MCInstrDesc &Desc, MachineFunction &MF,
+b4ad28da196d3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-11 12:08:26 +0100 619) MachineBasicBlock &MBB,
+b4ad28da196d3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-11 12:08:26 +0100 620) MachineBasicBlock::iterator InsertPt,
+b4ad28da196d3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-11 12:08:26 +0100 621) unsigned DwarfReg) {
+b4ad28da196d3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-11 12:08:26 +0100 622) unsigned CFIIndex =
+b4ad28da196d3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-11 12:08:26 +0100 623) MF.addFrameInst(MCCFIInstruction::createSameValue(nullptr, DwarfReg));
+b4ad28da196d3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-11 12:08:26 +0100 624) BuildMI(MBB, InsertPt, DebugLoc(), Desc).addCFIIndex(CFIIndex);
+b4ad28da196d3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-11 12:08:26 +0100 625) }
+b4ad28da196d3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-11 12:08:26 +0100 626)
+b4ad28da196d3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-11 12:08:26 +0100 627) void AArch64FrameLowering::resetCFIToInitialState(
+b4ad28da196d3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-11 12:08:26 +0100 628) MachineBasicBlock &MBB) const {
+b4ad28da196d3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-11 12:08:26 +0100 629)
+b4ad28da196d3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-11 12:08:26 +0100 630) MachineFunction &MF = *MBB.getParent();
+b4ad28da196d3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-11 12:08:26 +0100 631) const auto &Subtarget = MF.getSubtarget<AArch64Subtarget>();
+b4ad28da196d3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-11 12:08:26 +0100 632) const TargetInstrInfo &TII = *Subtarget.getInstrInfo();
+b4ad28da196d3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-11 12:08:26 +0100 633) const auto &TRI =
+b4ad28da196d3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-11 12:08:26 +0100 634) static_cast<const AArch64RegisterInfo &>(*Subtarget.getRegisterInfo());
+b4ad28da196d3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-11 12:08:26 +0100 635) const auto &MFI = *MF.getInfo<AArch64FunctionInfo>();
+b4ad28da196d3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-11 12:08:26 +0100 636)
+b4ad28da196d3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-11 12:08:26 +0100 637) const MCInstrDesc &CFIDesc = TII.get(TargetOpcode::CFI_INSTRUCTION);
+b4ad28da196d3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-11 12:08:26 +0100 638) DebugLoc DL;
+b4ad28da196d3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-11 12:08:26 +0100 639)
+b4ad28da196d3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-11 12:08:26 +0100 640) // Reset the CFA to `SP + 0`.
+b4ad28da196d3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-11 12:08:26 +0100 641) MachineBasicBlock::iterator InsertPt = MBB.begin();
+b4ad28da196d3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-11 12:08:26 +0100 642) unsigned CFIIndex = MF.addFrameInst(MCCFIInstruction::cfiDefCfa(
+b4ad28da196d3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-11 12:08:26 +0100 643) nullptr, TRI.getDwarfRegNum(AArch64::SP, true), 0));
+b4ad28da196d3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-11 12:08:26 +0100 644) BuildMI(MBB, InsertPt, DL, CFIDesc).addCFIIndex(CFIIndex);
+b4ad28da196d3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-11 12:08:26 +0100 645)
+b4ad28da196d3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-11 12:08:26 +0100 646) // Flip the RA sign state.
+588ecc11b8959 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matt Arsenault 2022-12-16 12:13:47 -0500 647) if (MFI.shouldSignReturnAddress(MF)) {
+b4ad28da196d3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-11 12:08:26 +0100 648) CFIIndex = MF.addFrameInst(MCCFIInstruction::createNegateRAState(nullptr));
+b4ad28da196d3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-11 12:08:26 +0100 649) BuildMI(MBB, InsertPt, DL, CFIDesc).addCFIIndex(CFIIndex);
+b4ad28da196d3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-11 12:08:26 +0100 650) }
+b4ad28da196d3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-11 12:08:26 +0100 651)
+b4ad28da196d3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-11 12:08:26 +0100 652) // Shadow call stack uses X18, reset it.
+1d2b558265bd9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Anatoly Trosinenko 2023-10-11 13:52:41 +0300 653) if (MFI.needsShadowCallStackPrologueEpilogue(MF))
+b4ad28da196d3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-11 12:08:26 +0100 654) insertCFISameValue(CFIDesc, MF, MBB, InsertPt,
+b4ad28da196d3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-11 12:08:26 +0100 655) TRI.getDwarfRegNum(AArch64::X18, true));
+b4ad28da196d3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-11 12:08:26 +0100 656)
+b4ad28da196d3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-11 12:08:26 +0100 657) // Emit .cfi_same_value for callee-saved registers.
+b4ad28da196d3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-11 12:08:26 +0100 658) const std::vector<CalleeSavedInfo> &CSI =
+b4ad28da196d3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-11 12:08:26 +0100 659) MF.getFrameInfo().getCalleeSavedInfo();
+b4ad28da196d3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-11 12:08:26 +0100 660) for (const auto &Info : CSI) {
+b4ad28da196d3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-11 12:08:26 +0100 661) unsigned Reg = Info.getReg();
+b4ad28da196d3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-11 12:08:26 +0100 662) if (!TRI.regNeedsCFI(Reg, Reg))
+b4ad28da196d3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-11 12:08:26 +0100 663) continue;
+b4ad28da196d3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-11 12:08:26 +0100 664) insertCFISameValue(CFIDesc, MF, MBB, InsertPt,
+b4ad28da196d3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-11 12:08:26 +0100 665) TRI.getDwarfRegNum(Reg, true));
+b4ad28da196d3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-11 12:08:26 +0100 666) }
+b4ad28da196d3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-11 12:08:26 +0100 667) }
+b4ad28da196d3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-11 12:08:26 +0100 668)
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 669) static void emitCalleeSavedRestores(MachineBasicBlock &MBB,
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 670) MachineBasicBlock::iterator MBBI,
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 671) bool SVE) {
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 672) MachineFunction &MF = *MBB.getParent();
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 673) MachineFrameInfo &MFI = MF.getFrameInfo();
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 674)
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 675) const std::vector<CalleeSavedInfo> &CSI = MFI.getCalleeSavedInfo();
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 676) if (CSI.empty())
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 677) return;
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 678)
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 679) const TargetSubtargetInfo &STI = MF.getSubtarget();
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 680) const TargetRegisterInfo &TRI = *STI.getRegisterInfo();
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 681) const TargetInstrInfo &TII = *STI.getInstrInfo();
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 682) DebugLoc DL = MBB.findDebugLoc(MBBI);
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 683)
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 684) for (const auto &Info : CSI) {
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 685) if (SVE !=
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 686) (MFI.getStackID(Info.getFrameIdx()) == TargetStackID::ScalableVector))
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 687) continue;
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 688)
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 689) unsigned Reg = Info.getReg();
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 690) if (SVE &&
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 691) !static_cast<const AArch64RegisterInfo &>(TRI).regNeedsCFI(Reg, Reg))
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 692) continue;
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 693)
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 694) unsigned CFIIndex = MF.addFrameInst(MCCFIInstruction::createRestore(
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 695) nullptr, TRI.getDwarfRegNum(Info.getReg(), true)));
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 696) BuildMI(MBB, MBBI, DL, TII.get(TargetOpcode::CFI_INSTRUCTION))
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 697) .addCFIIndex(CFIIndex)
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 698) .setMIFlags(MachineInstr::FrameDestroy);
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 699) }
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 700) }
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 701)
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 702) void AArch64FrameLowering::emitCalleeSavedGPRRestores(
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 703) MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI) const {
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 704) emitCalleeSavedRestores(MBB, MBBI, false);
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 705) }
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 706)
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 707) void AArch64FrameLowering::emitCalleeSavedSVERestores(
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 708) MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI) const {
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 709) emitCalleeSavedRestores(MBB, MBBI, true);
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 710) }
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 711)
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 712) // Return the maximum possible number of bytes for `Size` due to the
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 713) // architectural limit on the size of a SVE register.
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 714) static int64_t upperBound(StackOffset Size) {
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 715) static const int64_t MAX_BYTES_PER_SCALABLE_BYTE = 16;
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 716) return Size.getScalable() * MAX_BYTES_PER_SCALABLE_BYTE + Size.getFixed();
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 717) }
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 718)
+dedf2c6bb5193 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-15 09:27:01 +0000 719) void AArch64FrameLowering::allocateStackSpace(
+dedf2c6bb5193 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-15 09:27:01 +0000 720) MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 721) int64_t RealignmentPadding, StackOffset AllocSize, bool NeedsWinCFI,
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 722) bool *HasWinCFI, bool EmitCFI, StackOffset InitialOffset,
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 723) bool FollowupAllocs) const {
+dedf2c6bb5193 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-15 09:27:01 +0000 724)
+dedf2c6bb5193 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-15 09:27:01 +0000 725) if (!AllocSize)
+dedf2c6bb5193 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-15 09:27:01 +0000 726) return;
+dedf2c6bb5193 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-15 09:27:01 +0000 727)
+dedf2c6bb5193 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-15 09:27:01 +0000 728) DebugLoc DL;
+dedf2c6bb5193 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-15 09:27:01 +0000 729) MachineFunction &MF = *MBB.getParent();
+dedf2c6bb5193 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-15 09:27:01 +0000 730) const AArch64Subtarget &Subtarget = MF.getSubtarget<AArch64Subtarget>();
+dedf2c6bb5193 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-15 09:27:01 +0000 731) const TargetInstrInfo &TII = *Subtarget.getInstrInfo();
+dedf2c6bb5193 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-15 09:27:01 +0000 732) AArch64FunctionInfo &AFI = *MF.getInfo<AArch64FunctionInfo>();
+dedf2c6bb5193 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-15 09:27:01 +0000 733) const MachineFrameInfo &MFI = MF.getFrameInfo();
+dedf2c6bb5193 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-15 09:27:01 +0000 734)
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 735) const int64_t MaxAlign = MFI.getMaxAlign().value();
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 736) const uint64_t AndMask = ~(MaxAlign - 1);
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 737)
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 738) if (!Subtarget.getTargetLowering()->hasInlineStackProbe(MF)) {
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 739) Register TargetReg = RealignmentPadding
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 740) ? findScratchNonCalleeSaveRegister(&MBB)
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 741) : AArch64::SP;
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 742) // SUB Xd/SP, SP, AllocSize
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 743) emitFrameOffset(MBB, MBBI, DL, TargetReg, AArch64::SP, -AllocSize, &TII,
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 744) MachineInstr::FrameSetup, false, NeedsWinCFI, HasWinCFI,
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 745) EmitCFI, InitialOffset);
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 746)
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 747) if (RealignmentPadding) {
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 748) // AND SP, X9, 0b11111...0000
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 749) BuildMI(MBB, MBBI, DL, TII.get(AArch64::ANDXri), AArch64::SP)
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 750) .addReg(TargetReg, RegState::Kill)
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 751) .addImm(AArch64_AM::encodeLogicalImmediate(AndMask, 64))
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 752) .setMIFlags(MachineInstr::FrameSetup);
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 753) AFI.setStackRealigned(true);
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 754)
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 755) // No need for SEH instructions here; if we're realigning the stack,
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 756) // we've set a frame pointer and already finished the SEH prologue.
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 757) assert(!NeedsWinCFI);
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 758) }
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 759) return;
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 760) }
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 761)
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 762) //
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 763) // Stack probing allocation.
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 764) //
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 765)
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 766) // Fixed length allocation. If we don't need to re-align the stack and don't
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 767) // have SVE objects, we can use a more efficient sequence for stack probing.
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 768) if (AllocSize.getScalable() == 0 && RealignmentPadding == 0) {
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 769) Register ScratchReg = findScratchNonCalleeSaveRegister(&MBB);
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 770) assert(ScratchReg != AArch64::NoRegister);
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 771) BuildMI(MBB, MBBI, DL, TII.get(AArch64::PROBED_STACKALLOC))
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 772) .addDef(ScratchReg)
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 773) .addImm(AllocSize.getFixed())
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 774) .addImm(InitialOffset.getFixed())
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 775) .addImm(InitialOffset.getScalable());
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 776) // The fixed allocation may leave unprobed bytes at the top of the
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 777) // stack. If we have subsequent alocation (e.g. if we have variable-sized
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 778) // objects), we need to issue an extra probe, so these allocations start in
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 779) // a known state.
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 780) if (FollowupAllocs) {
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 781) // STR XZR, [SP]
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 782) BuildMI(MBB, MBBI, DL, TII.get(AArch64::STRXui))
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 783) .addReg(AArch64::XZR)
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 784) .addReg(AArch64::SP)
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 785) .addImm(0)
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 786) .setMIFlags(MachineInstr::FrameSetup);
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 787) }
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 788)
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 789) return;
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 790) }
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 791)
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 792) // Variable length allocation.
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 793)
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 794) // If the (unknown) allocation size cannot exceed the probe size, decrement
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 795) // the stack pointer right away.
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 796) int64_t ProbeSize = AFI.getStackProbeSize();
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 797) if (upperBound(AllocSize) + RealignmentPadding <= ProbeSize) {
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 798) Register ScratchReg = RealignmentPadding
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 799) ? findScratchNonCalleeSaveRegister(&MBB)
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 800) : AArch64::SP;
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 801) assert(ScratchReg != AArch64::NoRegister);
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 802) // SUB Xd, SP, AllocSize
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 803) emitFrameOffset(MBB, MBBI, DL, ScratchReg, AArch64::SP, -AllocSize, &TII,
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 804) MachineInstr::FrameSetup, false, NeedsWinCFI, HasWinCFI,
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 805) EmitCFI, InitialOffset);
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 806) if (RealignmentPadding) {
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 807) // AND SP, Xn, 0b11111...0000
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 808) BuildMI(MBB, MBBI, DL, TII.get(AArch64::ANDXri), AArch64::SP)
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 809) .addReg(ScratchReg, RegState::Kill)
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 810) .addImm(AArch64_AM::encodeLogicalImmediate(AndMask, 64))
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 811) .setMIFlags(MachineInstr::FrameSetup);
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 812) AFI.setStackRealigned(true);
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 813) }
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 814) if (FollowupAllocs || upperBound(AllocSize) + RealignmentPadding >
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 815) AArch64::StackProbeMaxUnprobedStack) {
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 816) // STR XZR, [SP]
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 817) BuildMI(MBB, MBBI, DL, TII.get(AArch64::STRXui))
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 818) .addReg(AArch64::XZR)
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 819) .addReg(AArch64::SP)
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 820) .addImm(0)
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 821) .setMIFlags(MachineInstr::FrameSetup);
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 822) }
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 823) return;
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 824) }
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 825)
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 826) // Emit a variable-length allocation probing loop.
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 827) // TODO: As an optimisation, the loop can be "unrolled" into a few parts,
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 828) // each of them guaranteed to adjust the stack by less than the probe size.
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 829) Register TargetReg = findScratchNonCalleeSaveRegister(&MBB);
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 830) assert(TargetReg != AArch64::NoRegister);
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 831) // SUB Xd, SP, AllocSize
+dedf2c6bb5193 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-15 09:27:01 +0000 832) emitFrameOffset(MBB, MBBI, DL, TargetReg, AArch64::SP, -AllocSize, &TII,
+dedf2c6bb5193 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-15 09:27:01 +0000 833) MachineInstr::FrameSetup, false, NeedsWinCFI, HasWinCFI,
+dedf2c6bb5193 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-15 09:27:01 +0000 834) EmitCFI, InitialOffset);
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 835) if (RealignmentPadding) {
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 836) // AND Xn, Xn, 0b11111...0000
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 837) BuildMI(MBB, MBBI, DL, TII.get(AArch64::ANDXri), TargetReg)
+dedf2c6bb5193 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-15 09:27:01 +0000 838) .addReg(TargetReg, RegState::Kill)
+dedf2c6bb5193 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-15 09:27:01 +0000 839) .addImm(AArch64_AM::encodeLogicalImmediate(AndMask, 64))
+dedf2c6bb5193 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-15 09:27:01 +0000 840) .setMIFlags(MachineInstr::FrameSetup);
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 841) }
+dedf2c6bb5193 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-15 09:27:01 +0000 842)
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 843) BuildMI(MBB, MBBI, DL, TII.get(AArch64::PROBED_STACKALLOC_VAR))
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 844) .addReg(TargetReg);
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 845) if (EmitCFI) {
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 846) // Set the CFA register back to SP.
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 847) unsigned Reg =
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 848) Subtarget.getRegisterInfo()->getDwarfRegNum(AArch64::SP, true);
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 849) unsigned CFIIndex =
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 850) MF.addFrameInst(MCCFIInstruction::createDefCfaRegister(nullptr, Reg));
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 851) BuildMI(MBB, MBBI, DL, TII.get(TargetOpcode::CFI_INSTRUCTION))
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 852) .addCFIIndex(CFIIndex)
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 853) .setMIFlags(MachineInstr::FrameSetup);
+dedf2c6bb5193 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-15 09:27:01 +0000 854) }
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 855) if (RealignmentPadding)
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 856) AFI.setStackRealigned(true);
+dedf2c6bb5193 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-15 09:27:01 +0000 857) }
+dedf2c6bb5193 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-15 09:27:01 +0000 858)
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 859) static MCRegister getRegisterOrZero(MCRegister Reg, bool HasSVE) {
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 860) switch (Reg.id()) {
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 861) default:
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 862) // The called routine is expected to preserve r19-r28
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 863) // r29 and r30 are used as frame pointer and link register resp.
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 864) return 0;
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 865)
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 866) // GPRs
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 867) #define CASE(n) \
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 868) case AArch64::W##n: \
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 869) case AArch64::X##n: \
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 870) return AArch64::X##n
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 871) CASE(0);
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 872) CASE(1);
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 873) CASE(2);
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 874) CASE(3);
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 875) CASE(4);
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 876) CASE(5);
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 877) CASE(6);
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 878) CASE(7);
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 879) CASE(8);
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 880) CASE(9);
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 881) CASE(10);
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 882) CASE(11);
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 883) CASE(12);
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 884) CASE(13);
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 885) CASE(14);
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 886) CASE(15);
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 887) CASE(16);
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 888) CASE(17);
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 889) CASE(18);
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 890) #undef CASE
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 891)
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 892) // FPRs
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 893) #define CASE(n) \
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 894) case AArch64::B##n: \
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 895) case AArch64::H##n: \
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 896) case AArch64::S##n: \
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 897) case AArch64::D##n: \
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 898) case AArch64::Q##n: \
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 899) return HasSVE ? AArch64::Z##n : AArch64::Q##n
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 900) CASE(0);
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 901) CASE(1);
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 902) CASE(2);
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 903) CASE(3);
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 904) CASE(4);
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 905) CASE(5);
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 906) CASE(6);
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 907) CASE(7);
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 908) CASE(8);
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 909) CASE(9);
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 910) CASE(10);
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 911) CASE(11);
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 912) CASE(12);
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 913) CASE(13);
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 914) CASE(14);
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 915) CASE(15);
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 916) CASE(16);
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 917) CASE(17);
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 918) CASE(18);
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 919) CASE(19);
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 920) CASE(20);
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 921) CASE(21);
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 922) CASE(22);
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 923) CASE(23);
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 924) CASE(24);
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 925) CASE(25);
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 926) CASE(26);
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 927) CASE(27);
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 928) CASE(28);
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 929) CASE(29);
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 930) CASE(30);
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 931) CASE(31);
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 932) #undef CASE
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 933) }
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 934) }
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 935)
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 936) void AArch64FrameLowering::emitZeroCallUsedRegs(BitVector RegsToZero,
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 937) MachineBasicBlock &MBB) const {
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 938) // Insertion point.
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 939) MachineBasicBlock::iterator MBBI = MBB.getFirstTerminator();
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 940)
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 941) // Fake a debug loc.
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 942) DebugLoc DL;
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 943) if (MBBI != MBB.end())
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 944) DL = MBBI->getDebugLoc();
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 945)
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 946) const MachineFunction &MF = *MBB.getParent();
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 947) const AArch64Subtarget &STI = MF.getSubtarget<AArch64Subtarget>();
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 948) const AArch64RegisterInfo &TRI = *STI.getRegisterInfo();
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 949)
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 950) BitVector GPRsToZero(TRI.getNumRegs());
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 951) BitVector FPRsToZero(TRI.getNumRegs());
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 952) bool HasSVE = STI.hasSVE();
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 953) for (MCRegister Reg : RegsToZero.set_bits()) {
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 954) if (TRI.isGeneralPurposeRegister(MF, Reg)) {
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 955) // For GPRs, we only care to clear out the 64-bit register.
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 956) if (MCRegister XReg = getRegisterOrZero(Reg, HasSVE))
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 957) GPRsToZero.set(XReg);
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 958) } else if (AArch64::FPR128RegClass.contains(Reg) ||
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 959) AArch64::FPR64RegClass.contains(Reg) ||
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 960) AArch64::FPR32RegClass.contains(Reg) ||
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 961) AArch64::FPR16RegClass.contains(Reg) ||
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 962) AArch64::FPR8RegClass.contains(Reg)) {
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 963) // For FPRs,
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 964) if (MCRegister XReg = getRegisterOrZero(Reg, HasSVE))
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 965) FPRsToZero.set(XReg);
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 966) }
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 967) }
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 968)
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 969) const AArch64InstrInfo &TII = *STI.getInstrInfo();
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 970)
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 971) // Zero out GPRs.
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 972) for (MCRegister Reg : GPRsToZero.set_bits())
+9e41c284e0516 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2023-09-21 15:57:35 -0700 973) TII.buildClearRegister(Reg, MBB, MBBI, DL);
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 974)
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 975) // Zero out FP/vector registers.
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 976) for (MCRegister Reg : FPRsToZero.set_bits())
+9e41c284e0516 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2023-09-21 15:57:35 -0700 977) TII.buildClearRegister(Reg, MBB, MBBI, DL);
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 978)
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 979) if (HasSVE) {
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 980) for (MCRegister PReg :
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 981) {AArch64::P0, AArch64::P1, AArch64::P2, AArch64::P3, AArch64::P4,
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 982) AArch64::P5, AArch64::P6, AArch64::P7, AArch64::P8, AArch64::P9,
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 983) AArch64::P10, AArch64::P11, AArch64::P12, AArch64::P13, AArch64::P14,
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 984) AArch64::P15}) {
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 985) if (RegsToZero[PReg])
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 986) BuildMI(MBB, MBBI, DL, TII.get(AArch64::PFALSE), PReg);
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 987) }
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 988) }
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 989) }
+6e00a34cdb49b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bill Wendling 2022-05-19 16:57:40 -0700 990)
+7a0e222a17058 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Jay Foad 2024-03-07 08:16:52 +0000 991) static void getLiveRegsForEntryMBB(LivePhysRegs &LiveRegs,
+58dcac3948e8c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Hahn 2023-12-05 11:41:40 +0000 992) const MachineBasicBlock &MBB) {
+58dcac3948e8c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Hahn 2023-12-05 11:41:40 +0000 993) const MachineFunction *MF = MBB.getParent();
+58dcac3948e8c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Hahn 2023-12-05 11:41:40 +0000 994) LiveRegs.addLiveIns(MBB);
+58dcac3948e8c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Hahn 2023-12-05 11:41:40 +0000 995) // Mark callee saved registers as used so we will not choose them.
+58dcac3948e8c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Hahn 2023-12-05 11:41:40 +0000 996) const MCPhysReg *CSRegs = MF->getRegInfo().getCalleeSavedRegs();
+58dcac3948e8c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Hahn 2023-12-05 11:41:40 +0000 997) for (unsigned i = 0; CSRegs[i]; ++i)
+58dcac3948e8c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Hahn 2023-12-05 11:41:40 +0000 998) LiveRegs.addReg(CSRegs[i]);
+58dcac3948e8c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Hahn 2023-12-05 11:41:40 +0000 999) }
+58dcac3948e8c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Hahn 2023-12-05 11:41:40 +0000 1000)
+7e4ba3dc02dea llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-19 18:27:32 +0000 1001) // Find a scratch register that we can use at the start of the prologue to
+7e4ba3dc02dea llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-19 18:27:32 +0000 1002) // re-align the stack pointer. We avoid using callee-save registers since they
+7e4ba3dc02dea llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-19 18:27:32 +0000 1003) // may appear to be free when this is called from canUseAsPrologue (during
+7e4ba3dc02dea llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-19 18:27:32 +0000 1004) // shrink wrapping), but then no longer be free when this is called from
+7e4ba3dc02dea llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-19 18:27:32 +0000 1005) // emitPrologue.
+7e4ba3dc02dea llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-19 18:27:32 +0000 1006) //
+7e4ba3dc02dea llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-19 18:27:32 +0000 1007) // FIXME: This is a bit conservative, since in the above case we could use one
+7e4ba3dc02dea llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-19 18:27:32 +0000 1008) // of the callee-save registers as a scratch temp to re-align the stack pointer,
+7e4ba3dc02dea llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-19 18:27:32 +0000 1009) // but we would then have to make sure that we were in fact saving at least one
+7e4ba3dc02dea llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-19 18:27:32 +0000 1010) // callee-save register in the prologue, which is additional complexity that
+7e4ba3dc02dea llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-19 18:27:32 +0000 1011) // doesn't seem worth the benefit.
+90c326b198080 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Mikael Holmen 2024-01-18 11:24:25 +0100 1012) static Register findScratchNonCalleeSaveRegister(MachineBasicBlock *MBB) {
+7e4ba3dc02dea llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-19 18:27:32 +0000 1013) MachineFunction *MF = MBB->getParent();
+7e4ba3dc02dea llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-19 18:27:32 +0000 1014)
+7e4ba3dc02dea llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-19 18:27:32 +0000 1015) // If MBB is an entry block, use X9 as the scratch register
+7e4ba3dc02dea llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-19 18:27:32 +0000 1016) if (&MF->front() == MBB)
+7e4ba3dc02dea llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-19 18:27:32 +0000 1017) return AArch64::X9;
+7e4ba3dc02dea llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-19 18:27:32 +0000 1018)
+60a245e0ffc94 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eric Christopher 2017-03-31 23:12:27 +0000 1019) const AArch64Subtarget &Subtarget = MF->getSubtarget<AArch64Subtarget>();
+ac4307c41ece4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2017-05-26 21:51:00 +0000 1020) const AArch64RegisterInfo &TRI = *Subtarget.getRegisterInfo();
+7a0e222a17058 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Jay Foad 2024-03-07 08:16:52 +0000 1021) LivePhysRegs LiveRegs(TRI);
+58dcac3948e8c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Hahn 2023-12-05 11:41:40 +0000 1022) getLiveRegsForEntryMBB(LiveRegs, *MBB);
+7e4ba3dc02dea llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-19 18:27:32 +0000 1023)
+332bb5c2364d2 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2016-07-06 21:31:27 +0000 1024) // Prefer X9 since it was historically used for the prologue scratch reg.
+7a0e222a17058 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Jay Foad 2024-03-07 08:16:52 +0000 1025) const MachineRegisterInfo &MRI = MF->getRegInfo();
+7a0e222a17058 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Jay Foad 2024-03-07 08:16:52 +0000 1026) if (LiveRegs.available(MRI, AArch64::X9))
+332bb5c2364d2 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2016-07-06 21:31:27 +0000 1027) return AArch64::X9;
+7e4ba3dc02dea llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-19 18:27:32 +0000 1028)
+7a0e222a17058 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Jay Foad 2024-03-07 08:16:52 +0000 1029) for (unsigned Reg : AArch64::GPR64RegClass) {
+7a0e222a17058 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Jay Foad 2024-03-07 08:16:52 +0000 1030) if (LiveRegs.available(MRI, Reg))
+332bb5c2364d2 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2016-07-06 21:31:27 +0000 1031) return Reg;
+332bb5c2364d2 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2016-07-06 21:31:27 +0000 1032) }
+7e4ba3dc02dea llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-19 18:27:32 +0000 1033) return AArch64::NoRegister;
+7e4ba3dc02dea llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-19 18:27:32 +0000 1034) }
+7e4ba3dc02dea llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-19 18:27:32 +0000 1035)
+7e4ba3dc02dea llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-19 18:27:32 +0000 1036) bool AArch64FrameLowering::canUseAsPrologue(
+7e4ba3dc02dea llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-19 18:27:32 +0000 1037) const MachineBasicBlock &MBB) const {
+7e4ba3dc02dea llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-19 18:27:32 +0000 1038) const MachineFunction *MF = MBB.getParent();
+7e4ba3dc02dea llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-19 18:27:32 +0000 1039) MachineBasicBlock *TmpMBB = const_cast<MachineBasicBlock *>(&MBB);
+7e4ba3dc02dea llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-19 18:27:32 +0000 1040) const AArch64Subtarget &Subtarget = MF->getSubtarget<AArch64Subtarget>();
+7e4ba3dc02dea llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-19 18:27:32 +0000 1041) const AArch64RegisterInfo *RegInfo = Subtarget.getRegisterInfo();
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 1042) const AArch64TargetLowering *TLI = Subtarget.getTargetLowering();
+58dcac3948e8c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Hahn 2023-12-05 11:41:40 +0000 1043) const AArch64FunctionInfo *AFI = MF->getInfo<AArch64FunctionInfo>();
+58dcac3948e8c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Hahn 2023-12-05 11:41:40 +0000 1044)
+58dcac3948e8c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Hahn 2023-12-05 11:41:40 +0000 1045) if (AFI->hasSwiftAsyncContext()) {
+58dcac3948e8c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Hahn 2023-12-05 11:41:40 +0000 1046) const AArch64RegisterInfo &TRI = *Subtarget.getRegisterInfo();
+7a0e222a17058 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Jay Foad 2024-03-07 08:16:52 +0000 1047) const MachineRegisterInfo &MRI = MF->getRegInfo();
+7a0e222a17058 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Jay Foad 2024-03-07 08:16:52 +0000 1048) LivePhysRegs LiveRegs(TRI);
+58dcac3948e8c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Hahn 2023-12-05 11:41:40 +0000 1049) getLiveRegsForEntryMBB(LiveRegs, MBB);
+58dcac3948e8c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Hahn 2023-12-05 11:41:40 +0000 1050) // The StoreSwiftAsyncContext clobbers X16 and X17. Make sure they are
+58dcac3948e8c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Hahn 2023-12-05 11:41:40 +0000 1051) // available.
+7a0e222a17058 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Jay Foad 2024-03-07 08:16:52 +0000 1052) if (!LiveRegs.available(MRI, AArch64::X16) ||
+7a0e222a17058 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Jay Foad 2024-03-07 08:16:52 +0000 1053) !LiveRegs.available(MRI, AArch64::X17))
+58dcac3948e8c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Hahn 2023-12-05 11:41:40 +0000 1054) return false;
+58dcac3948e8c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Hahn 2023-12-05 11:41:40 +0000 1055) }
+7e4ba3dc02dea llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-19 18:27:32 +0000 1056)
+1a7166833d38a llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2024-02-21 13:58:04 +0000 1057) // Certain stack probing sequences might clobber flags, then we can't use
+1a7166833d38a llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2024-02-21 13:58:04 +0000 1058) // the block as a prologue if the flags register is a live-in.
+1a7166833d38a llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2024-02-21 13:58:04 +0000 1059) if (MF->getInfo<AArch64FunctionInfo>()->hasStackProbing() &&
+1a7166833d38a llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2024-02-21 13:58:04 +0000 1060) MBB.isLiveIn(AArch64::NZCV))
+1a7166833d38a llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2024-02-21 13:58:04 +0000 1061) return false;
+1a7166833d38a llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2024-02-21 13:58:04 +0000 1062)
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 1063) // Don't need a scratch register if we're not going to re-align the stack or
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 1064) // emit stack probes.
+658e4763a23cc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2024-02-19 10:40:21 +0000 1065) if (!RegInfo->hasStackRealignment(*MF) && !TLI->hasInlineStackProbe(*MF))
+7e4ba3dc02dea llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-19 18:27:32 +0000 1066) return true;
+7e4ba3dc02dea llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-19 18:27:32 +0000 1067) // Otherwise, we can use any block as long as it has a scratch register
+7e4ba3dc02dea llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-19 18:27:32 +0000 1068) // available.
+7e4ba3dc02dea llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-19 18:27:32 +0000 1069) return findScratchNonCalleeSaveRegister(TmpMBB) != AArch64::NoRegister;
+7e4ba3dc02dea llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-19 18:27:32 +0000 1070) }
+7e4ba3dc02dea llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-19 18:27:32 +0000 1071)
+2778fd0b59b64 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2017-12-20 06:51:45 +0000 1072) static bool windowsRequiresStackProbe(MachineFunction &MF,
+965ed1e974e80 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kiran Chandramohan 2019-11-20 12:45:26 +0000 1073) uint64_t StackSizeInBytes) {
+2778fd0b59b64 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2017-12-20 06:51:45 +0000 1074) const AArch64Subtarget &Subtarget = MF.getSubtarget<AArch64Subtarget>();
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 1075) const AArch64FunctionInfo &MFI = *MF.getInfo<AArch64FunctionInfo>();
+2778fd0b59b64 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2017-12-20 06:51:45 +0000 1076) // TODO: When implementing stack protectors, take that into account
+2778fd0b59b64 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2017-12-20 06:51:45 +0000 1077) // for the probe threshold.
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 1078) return Subtarget.isTargetWindows() && MFI.hasStackProbing() &&
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 1079) StackSizeInBytes >= uint64_t(MFI.getStackProbeSize());
+2778fd0b59b64 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2017-12-20 06:51:45 +0000 1080) }
+2778fd0b59b64 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2017-12-20 06:51:45 +0000 1081)
+7d07405761aec llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 15:00:53 +0300 1082) static bool needsWinCFI(const MachineFunction &MF) {
+7d07405761aec llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 15:00:53 +0300 1083) const Function &F = MF.getFunction();
+7d07405761aec llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 15:00:53 +0300 1084) return MF.getTarget().getMCAsmInfo()->usesWindowsCFI() &&
+7d07405761aec llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 15:00:53 +0300 1085) F.needsUnwindTableEntry();
+7d07405761aec llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 15:00:53 +0300 1086) }
+7d07405761aec llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 15:00:53 +0300 1087)
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1088) bool AArch64FrameLowering::shouldCombineCSRLocalStackBump(
+965ed1e974e80 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kiran Chandramohan 2019-11-20 12:45:26 +0000 1089) MachineFunction &MF, uint64_t StackBumpBytes) const {
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1090) AArch64FunctionInfo *AFI = MF.getInfo<AArch64FunctionInfo>();
+941a705b7bf15 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2016-07-28 18:40:00 +0000 1091) const MachineFrameInfo &MFI = MF.getFrameInfo();
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1092) const AArch64Subtarget &Subtarget = MF.getSubtarget<AArch64Subtarget>();
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1093) const AArch64RegisterInfo *RegInfo = Subtarget.getRegisterInfo();
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 1094) if (homogeneousPrologEpilog(MF))
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 1095) return false;
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1096)
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1097) if (AFI->getLocalStackSize() == 0)
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1098) return false;
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1099)
+7d07405761aec llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 15:00:53 +0300 1100) // For WinCFI, if optimizing for size, prefer to not combine the stack bump
+7d07405761aec llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 15:00:53 +0300 1101) // (to force a stp with predecrement) to match the packed unwind format,
+7d07405761aec llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 15:00:53 +0300 1102) // provided that there actually are any callee saved registers to merge the
+7d07405761aec llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 15:00:53 +0300 1103) // decrement with.
+7d07405761aec llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 15:00:53 +0300 1104) // This is potentially marginally slower, but allows using the packed
+7d07405761aec llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 15:00:53 +0300 1105) // unwind format for functions that both have a local area and callee saved
+7d07405761aec llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 15:00:53 +0300 1106) // registers. Using the packed unwind format notably reduces the size of
+7d07405761aec llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 15:00:53 +0300 1107) // the unwind info.
+7d07405761aec llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 15:00:53 +0300 1108) if (needsWinCFI(MF) && AFI->getCalleeSavedStackSize() > 0 &&
+7d07405761aec llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 15:00:53 +0300 1109) MF.getFunction().hasOptSize())
+7d07405761aec llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 15:00:53 +0300 1110) return false;
+7d07405761aec llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 15:00:53 +0300 1111)
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1112) // 512 is the maximum immediate for stp/ldp that will be used for
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1113) // callee-save save/restores
+2778fd0b59b64 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2017-12-20 06:51:45 +0000 1114) if (StackBumpBytes >= 512 || windowsRequiresStackProbe(MF, StackBumpBytes))
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1115) return false;
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1116)
+941a705b7bf15 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2016-07-28 18:40:00 +0000 1117) if (MFI.hasVarSizedObjects())
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1118) return false;
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1119)
+a9968c0a339ab llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tomas Matheson 2021-03-15 13:01:34 +0000 1120) if (RegInfo->hasStackRealignment(MF))
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1121) return false;
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1122)
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1123) // This isn't strictly necessary, but it simplifies things a bit since the
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1124) // current RedZone handling code assumes the SP is adjusted by the
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1125) // callee-save save/restore code.
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1126) if (canUseRedZone(MF))
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1127) return false;
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1128)
+4f99b6f0fe425 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-03 11:33:50 +0000 1129) // When there is an SVE area on the stack, always allocate the
+4f99b6f0fe425 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-03 11:33:50 +0000 1130) // callee-saves and spills/locals separately.
+4f99b6f0fe425 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-03 11:33:50 +0000 1131) if (getSVEStackSize(MF))
+4f99b6f0fe425 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-03 11:33:50 +0000 1132) return false;
+4f99b6f0fe425 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-03 11:33:50 +0000 1133)
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1134) return true;
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1135) }
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1136)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 1137) bool AArch64FrameLowering::shouldCombineCSRLocalStackBumpInEpilogue(
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 1138) MachineBasicBlock &MBB, unsigned StackBumpBytes) const {
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 1139) if (!shouldCombineCSRLocalStackBump(*MBB.getParent(), StackBumpBytes))
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 1140) return false;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 1141)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 1142) if (MBB.empty())
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 1143) return true;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 1144)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 1145) // Disable combined SP bump if the last instruction is an MTE tag store. It
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 1146) // is almost always better to merge SP adjustment into those instructions.
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 1147) MachineBasicBlock::iterator LastI = MBB.getFirstTerminator();
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 1148) MachineBasicBlock::iterator Begin = MBB.begin();
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 1149) while (LastI != Begin) {
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 1150) --LastI;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 1151) if (LastI->isTransient())
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 1152) continue;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 1153) if (!LastI->getFlag(MachineInstr::FrameDestroy))
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 1154) break;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 1155) }
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 1156) switch (LastI->getOpcode()) {
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 1157) case AArch64::STGloop:
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 1158) case AArch64::STZGloop:
+0847cc06a6c4f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hsiangkai Wang 2023-01-16 04:21:51 +0000 1159) case AArch64::STGi:
+0847cc06a6c4f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hsiangkai Wang 2023-01-16 04:21:51 +0000 1160) case AArch64::STZGi:
+0847cc06a6c4f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hsiangkai Wang 2023-01-16 04:21:51 +0000 1161) case AArch64::ST2Gi:
+0847cc06a6c4f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hsiangkai Wang 2023-01-16 04:21:51 +0000 1162) case AArch64::STZ2Gi:
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 1163) return false;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 1164) default:
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 1165) return true;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 1166) }
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 1167) llvm_unreachable("unreachable");
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 1168) }
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 1169)
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1170) // Given a load or a store instruction, generate an appropriate unwinding SEH
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1171) // code on Windows.
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1172) static MachineBasicBlock::iterator InsertSEH(MachineBasicBlock::iterator MBBI,
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1173) const TargetInstrInfo &TII,
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1174) MachineInstr::MIFlag Flag) {
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1175) unsigned Opc = MBBI->getOpcode();
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1176) MachineBasicBlock *MBB = MBBI->getParent();
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1177) MachineFunction &MF = *MBB->getParent();
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1178) DebugLoc DL = MBBI->getDebugLoc();
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1179) unsigned ImmIdx = MBBI->getNumOperands() - 1;
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1180) int Imm = MBBI->getOperand(ImmIdx).getImm();
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1181) MachineInstrBuilder MIB;
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1182) const AArch64Subtarget &Subtarget = MF.getSubtarget<AArch64Subtarget>();
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1183) const AArch64RegisterInfo *RegInfo = Subtarget.getRegisterInfo();
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1184)
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1185) switch (Opc) {
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1186) default:
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1187) llvm_unreachable("No SEH Opcode for this instruction");
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1188) case AArch64::LDPDpost:
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1189) Imm = -Imm;
+de9d80c1c579e llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Fangrui Song 2022-08-08 11:24:15 -0700 1190) [[fallthrough]];
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1191) case AArch64::STPDpre: {
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1192) unsigned Reg0 = RegInfo->getSEHRegNum(MBBI->getOperand(1).getReg());
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1193) unsigned Reg1 = RegInfo->getSEHRegNum(MBBI->getOperand(2).getReg());
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1194) MIB = BuildMI(MF, DL, TII.get(AArch64::SEH_SaveFRegP_X))
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1195) .addImm(Reg0)
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1196) .addImm(Reg1)
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1197) .addImm(Imm * 8)
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1198) .setMIFlag(Flag);
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1199) break;
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1200) }
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1201) case AArch64::LDPXpost:
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1202) Imm = -Imm;
+de9d80c1c579e llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Fangrui Song 2022-08-08 11:24:15 -0700 1203) [[fallthrough]];
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1204) case AArch64::STPXpre: {
+5ae66e56cf0cf llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Daniel Sanders 2019-08-12 22:40:53 +0000 1205) Register Reg0 = MBBI->getOperand(1).getReg();
+5ae66e56cf0cf llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Daniel Sanders 2019-08-12 22:40:53 +0000 1206) Register Reg1 = MBBI->getOperand(2).getReg();
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1207) if (Reg0 == AArch64::FP && Reg1 == AArch64::LR)
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1208) MIB = BuildMI(MF, DL, TII.get(AArch64::SEH_SaveFPLR_X))
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1209) .addImm(Imm * 8)
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1210) .setMIFlag(Flag);
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1211) else
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1212) MIB = BuildMI(MF, DL, TII.get(AArch64::SEH_SaveRegP_X))
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1213) .addImm(RegInfo->getSEHRegNum(Reg0))
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1214) .addImm(RegInfo->getSEHRegNum(Reg1))
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1215) .addImm(Imm * 8)
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1216) .setMIFlag(Flag);
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1217) break;
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1218) }
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1219) case AArch64::LDRDpost:
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1220) Imm = -Imm;
+de9d80c1c579e llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Fangrui Song 2022-08-08 11:24:15 -0700 1221) [[fallthrough]];
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1222) case AArch64::STRDpre: {
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1223) unsigned Reg = RegInfo->getSEHRegNum(MBBI->getOperand(1).getReg());
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1224) MIB = BuildMI(MF, DL, TII.get(AArch64::SEH_SaveFReg_X))
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1225) .addImm(Reg)
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1226) .addImm(Imm)
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1227) .setMIFlag(Flag);
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1228) break;
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1229) }
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1230) case AArch64::LDRXpost:
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1231) Imm = -Imm;
+de9d80c1c579e llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Fangrui Song 2022-08-08 11:24:15 -0700 1232) [[fallthrough]];
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1233) case AArch64::STRXpre: {
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1234) unsigned Reg = RegInfo->getSEHRegNum(MBBI->getOperand(1).getReg());
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1235) MIB = BuildMI(MF, DL, TII.get(AArch64::SEH_SaveReg_X))
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1236) .addImm(Reg)
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1237) .addImm(Imm)
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1238) .setMIFlag(Flag);
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1239) break;
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1240) }
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1241) case AArch64::STPDi:
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1242) case AArch64::LDPDi: {
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1243) unsigned Reg0 = RegInfo->getSEHRegNum(MBBI->getOperand(0).getReg());
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1244) unsigned Reg1 = RegInfo->getSEHRegNum(MBBI->getOperand(1).getReg());
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1245) MIB = BuildMI(MF, DL, TII.get(AArch64::SEH_SaveFRegP))
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1246) .addImm(Reg0)
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1247) .addImm(Reg1)
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1248) .addImm(Imm * 8)
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1249) .setMIFlag(Flag);
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1250) break;
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1251) }
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1252) case AArch64::STPXi:
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1253) case AArch64::LDPXi: {
+5ae66e56cf0cf llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Daniel Sanders 2019-08-12 22:40:53 +0000 1254) Register Reg0 = MBBI->getOperand(0).getReg();
+5ae66e56cf0cf llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Daniel Sanders 2019-08-12 22:40:53 +0000 1255) Register Reg1 = MBBI->getOperand(1).getReg();
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1256) if (Reg0 == AArch64::FP && Reg1 == AArch64::LR)
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1257) MIB = BuildMI(MF, DL, TII.get(AArch64::SEH_SaveFPLR))
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1258) .addImm(Imm * 8)
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1259) .setMIFlag(Flag);
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1260) else
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1261) MIB = BuildMI(MF, DL, TII.get(AArch64::SEH_SaveRegP))
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1262) .addImm(RegInfo->getSEHRegNum(Reg0))
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1263) .addImm(RegInfo->getSEHRegNum(Reg1))
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1264) .addImm(Imm * 8)
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1265) .setMIFlag(Flag);
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1266) break;
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1267) }
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1268) case AArch64::STRXui:
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1269) case AArch64::LDRXui: {
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1270) int Reg = RegInfo->getSEHRegNum(MBBI->getOperand(0).getReg());
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1271) MIB = BuildMI(MF, DL, TII.get(AArch64::SEH_SaveReg))
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1272) .addImm(Reg)
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1273) .addImm(Imm * 8)
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1274) .setMIFlag(Flag);
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1275) break;
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1276) }
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1277) case AArch64::STRDui:
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1278) case AArch64::LDRDui: {
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1279) unsigned Reg = RegInfo->getSEHRegNum(MBBI->getOperand(0).getReg());
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1280) MIB = BuildMI(MF, DL, TII.get(AArch64::SEH_SaveFReg))
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1281) .addImm(Reg)
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1282) .addImm(Imm * 8)
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1283) .setMIFlag(Flag);
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1284) break;
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1285) }
+a6065f0fa55aa llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2024-01-22 21:28:07 -0800 1286) case AArch64::STPQi:
+a6065f0fa55aa llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2024-01-22 21:28:07 -0800 1287) case AArch64::LDPQi: {
+a6065f0fa55aa llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2024-01-22 21:28:07 -0800 1288) unsigned Reg0 = RegInfo->getSEHRegNum(MBBI->getOperand(0).getReg());
+a6065f0fa55aa llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2024-01-22 21:28:07 -0800 1289) unsigned Reg1 = RegInfo->getSEHRegNum(MBBI->getOperand(1).getReg());
+a6065f0fa55aa llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2024-01-22 21:28:07 -0800 1290) MIB = BuildMI(MF, DL, TII.get(AArch64::SEH_SaveAnyRegQP))
+a6065f0fa55aa llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2024-01-22 21:28:07 -0800 1291) .addImm(Reg0)
+a6065f0fa55aa llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2024-01-22 21:28:07 -0800 1292) .addImm(Reg1)
+a6065f0fa55aa llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2024-01-22 21:28:07 -0800 1293) .addImm(Imm * 16)
+a6065f0fa55aa llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2024-01-22 21:28:07 -0800 1294) .setMIFlag(Flag);
+a6065f0fa55aa llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2024-01-22 21:28:07 -0800 1295) break;
+a6065f0fa55aa llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2024-01-22 21:28:07 -0800 1296) }
+a6065f0fa55aa llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2024-01-22 21:28:07 -0800 1297) case AArch64::LDPQpost:
+a6065f0fa55aa llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2024-01-22 21:28:07 -0800 1298) Imm = -Imm;
+a6065f0fa55aa llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2024-01-22 21:28:07 -0800 1299) LLVM_FALLTHROUGH;
+a6065f0fa55aa llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2024-01-22 21:28:07 -0800 1300) case AArch64::STPQpre: {
+a6065f0fa55aa llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2024-01-22 21:28:07 -0800 1301) unsigned Reg0 = RegInfo->getSEHRegNum(MBBI->getOperand(1).getReg());
+a6065f0fa55aa llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2024-01-22 21:28:07 -0800 1302) unsigned Reg1 = RegInfo->getSEHRegNum(MBBI->getOperand(2).getReg());
+a6065f0fa55aa llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2024-01-22 21:28:07 -0800 1303) MIB = BuildMI(MF, DL, TII.get(AArch64::SEH_SaveAnyRegQPX))
+a6065f0fa55aa llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2024-01-22 21:28:07 -0800 1304) .addImm(Reg0)
+a6065f0fa55aa llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2024-01-22 21:28:07 -0800 1305) .addImm(Reg1)
+a6065f0fa55aa llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2024-01-22 21:28:07 -0800 1306) .addImm(Imm * 16)
+a6065f0fa55aa llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2024-01-22 21:28:07 -0800 1307) .setMIFlag(Flag);
+a6065f0fa55aa llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2024-01-22 21:28:07 -0800 1308) break;
+a6065f0fa55aa llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2024-01-22 21:28:07 -0800 1309) }
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1310) }
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1311) auto I = MBB->insertAfter(MBBI, MIB);
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1312) return I;
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1313) }
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1314)
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1315) // Fix up the SEH opcode associated with the save/restore instruction.
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1316) static void fixupSEHOpcode(MachineBasicBlock::iterator MBBI,
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1317) unsigned LocalStackSize) {
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1318) MachineOperand *ImmOpnd = nullptr;
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1319) unsigned ImmIdx = MBBI->getNumOperands() - 1;
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1320) switch (MBBI->getOpcode()) {
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1321) default:
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1322) llvm_unreachable("Fix the offset in the SEH instruction");
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1323) case AArch64::SEH_SaveFPLR:
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1324) case AArch64::SEH_SaveRegP:
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1325) case AArch64::SEH_SaveReg:
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1326) case AArch64::SEH_SaveFRegP:
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1327) case AArch64::SEH_SaveFReg:
+a6065f0fa55aa llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2024-01-22 21:28:07 -0800 1328) case AArch64::SEH_SaveAnyRegQP:
+a6065f0fa55aa llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2024-01-22 21:28:07 -0800 1329) case AArch64::SEH_SaveAnyRegQPX:
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1330) ImmOpnd = &MBBI->getOperand(ImmIdx);
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1331) break;
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1332) }
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1333) if (ImmOpnd)
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1334) ImmOpnd->setImm(ImmOpnd->getImm() + LocalStackSize);
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1335) }
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1336)
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1337) // Convert callee-save register save/restore instruction to do stack pointer
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1338) // decrement/increment to allocate/deallocate the callee-save stack area by
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1339) // converting store/load to use pre/post increment version.
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1340) static MachineBasicBlock::iterator convertCalleeSaveRestoreToSPPrePostIncDec(
+bdc4956bac81a llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Benjamin Kramer 2016-06-12 15:39:02 +0000 1341) MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1342) const DebugLoc &DL, const TargetInstrInfo *TII, int CSStackSizeInc,
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 1343) bool NeedsWinCFI, bool *HasWinCFI, bool EmitCFI,
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 1344) MachineInstr::MIFlag FrameFlag = MachineInstr::FrameSetup,
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 1345) int CFAOffset = 0) {
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1346) unsigned NewOpc;
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1347) switch (MBBI->getOpcode()) {
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1348) default:
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1349) llvm_unreachable("Unexpected callee-save save/restore opcode!");
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1350) case AArch64::STPXi:
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1351) NewOpc = AArch64::STPXpre;
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1352) break;
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1353) case AArch64::STPDi:
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1354) NewOpc = AArch64::STPDpre;
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1355) break;
+2d77e788f2fd5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 12:10:22 +0000 1356) case AArch64::STPQi:
+2d77e788f2fd5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 12:10:22 +0000 1357) NewOpc = AArch64::STPQpre;
+2d77e788f2fd5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 12:10:22 +0000 1358) break;
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1359) case AArch64::STRXui:
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1360) NewOpc = AArch64::STRXpre;
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1361) break;
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1362) case AArch64::STRDui:
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1363) NewOpc = AArch64::STRDpre;
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1364) break;
+2d77e788f2fd5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 12:10:22 +0000 1365) case AArch64::STRQui:
+2d77e788f2fd5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 12:10:22 +0000 1366) NewOpc = AArch64::STRQpre;
+2d77e788f2fd5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 12:10:22 +0000 1367) break;
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1368) case AArch64::LDPXi:
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1369) NewOpc = AArch64::LDPXpost;
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1370) break;
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1371) case AArch64::LDPDi:
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1372) NewOpc = AArch64::LDPDpost;
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1373) break;
+2d77e788f2fd5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 12:10:22 +0000 1374) case AArch64::LDPQi:
+2d77e788f2fd5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 12:10:22 +0000 1375) NewOpc = AArch64::LDPQpost;
+2d77e788f2fd5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 12:10:22 +0000 1376) break;
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1377) case AArch64::LDRXui:
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1378) NewOpc = AArch64::LDRXpost;
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1379) break;
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1380) case AArch64::LDRDui:
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1381) NewOpc = AArch64::LDRDpost;
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1382) break;
+2d77e788f2fd5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 12:10:22 +0000 1383) case AArch64::LDRQui:
+2d77e788f2fd5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 12:10:22 +0000 1384) NewOpc = AArch64::LDRQpost;
+2d77e788f2fd5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 12:10:22 +0000 1385) break;
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1386) }
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1387) // Get rid of the SEH code associated with the old instruction.
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1388) if (NeedsWinCFI) {
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1389) auto SEH = std::next(MBBI);
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1390) if (AArch64InstrInfo::isSEHInstruction(*SEH))
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1391) SEH->eraseFromParent();
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1392) }
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1393)
+4d80122598462 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (David Green 2023-11-30 16:54:28 +0000 1394) TypeSize Scale = TypeSize::getFixed(1), Width = TypeSize::getFixed(0);
+82a0e808bb2cd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2020-11-19 12:32:50 +0000 1395) int64_t MinOffset, MaxOffset;
+82a0e808bb2cd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2020-11-19 12:32:50 +0000 1396) bool Success = static_cast<const AArch64InstrInfo *>(TII)->getMemOpInfo(
+82a0e808bb2cd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2020-11-19 12:32:50 +0000 1397) NewOpc, Scale, Width, MinOffset, MaxOffset);
+82a0e808bb2cd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2020-11-19 12:32:50 +0000 1398) (void)Success;
+82a0e808bb2cd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2020-11-19 12:32:50 +0000 1399) assert(Success && "unknown load/store opcode");
+82a0e808bb2cd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2020-11-19 12:32:50 +0000 1400)
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 1401) // If the first store isn't right where we want SP then we can't fold the
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 1402) // update in so create a normal arithmetic instruction instead.
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 1403) MachineFunction &MF = *MBB.getParent();
+82a0e808bb2cd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2020-11-19 12:32:50 +0000 1404) if (MBBI->getOperand(MBBI->getNumOperands() - 1).getImm() != 0 ||
+82a0e808bb2cd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2020-11-19 12:32:50 +0000 1405) CSStackSizeInc < MinOffset || CSStackSizeInc > MaxOffset) {
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 1406) emitFrameOffset(MBB, MBBI, DL, AArch64::SP, AArch64::SP,
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 1407) StackOffset::getFixed(CSStackSizeInc), TII, FrameFlag,
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 1408) false, false, nullptr, EmitCFI,
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 1409) StackOffset::getFixed(CFAOffset));
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 1410)
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 1411) return std::prev(MBBI);
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 1412) }
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 1413)
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1414) MachineInstrBuilder MIB = BuildMI(MBB, MBBI, DL, TII->get(NewOpc));
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1415) MIB.addReg(AArch64::SP, RegState::Define);
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1416)
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1417) // Copy all operands other than the immediate offset.
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1418) unsigned OpndIdx = 0;
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1419) for (unsigned OpndEnd = MBBI->getNumOperands() - 1; OpndIdx < OpndEnd;
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1420) ++OpndIdx)
+116bbab4e4f44 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Diana Picus 2017-01-13 09:58:52 +0000 1421) MIB.add(MBBI->getOperand(OpndIdx));
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1422)
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1423) assert(MBBI->getOperand(OpndIdx).getImm() == 0 &&
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1424) "Unexpected immediate offset in first/last callee-save save/restore "
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1425) "instruction!");
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1426) assert(MBBI->getOperand(OpndIdx - 1).getReg() == AArch64::SP &&
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1427) "Unexpected base register in callee-save save/restore instruction!");
+7140363cd0122 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 09:44:46 +0000 1428) assert(CSStackSizeInc % Scale == 0);
+82a0e808bb2cd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2020-11-19 12:32:50 +0000 1429) MIB.addImm(CSStackSizeInc / (int)Scale);
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1430)
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1431) MIB.setMIFlags(MBBI->getFlags());
+c73c0307fe71a llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Chandler Carruth 2018-08-16 21:30:05 +0000 1432) MIB.setMemRefs(MBBI->memoperands());
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1433)
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1434) // Generate a new SEH code that corresponds to the new instruction.
+814435fe87412 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Mandeep Singh Grang 2019-05-15 21:23:41 +0000 1435) if (NeedsWinCFI) {
+814435fe87412 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Mandeep Singh Grang 2019-05-15 21:23:41 +0000 1436) *HasWinCFI = true;
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 1437) InsertSEH(*MIB, *TII, FrameFlag);
+814435fe87412 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Mandeep Singh Grang 2019-05-15 21:23:41 +0000 1438) }
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1439)
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 1440) if (EmitCFI) {
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 1441) unsigned CFIIndex = MF.addFrameInst(
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 1442) MCCFIInstruction::cfiDefCfaOffset(nullptr, CFAOffset - CSStackSizeInc));
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 1443) BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 1444) .addCFIIndex(CFIIndex)
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 1445) .setMIFlags(FrameFlag);
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 1446) }
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 1447)
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1448) return std::prev(MBB.erase(MBBI));
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1449) }
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1450)
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1451) // Fixup callee-save register save/restore instructions to take into account
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1452) // combined SP bump by adding the local stack size to the stack offsets.
+ab53fd9b500b3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Duncan P. N. Exon Smith 2016-07-08 20:29:42 +0000 1453) static void fixupCalleeSaveRestoreStackOffset(MachineInstr &MI,
+965ed1e974e80 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kiran Chandramohan 2019-11-20 12:45:26 +0000 1454) uint64_t LocalStackSize,
+814435fe87412 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Mandeep Singh Grang 2019-05-15 21:23:41 +0000 1455) bool NeedsWinCFI,
+814435fe87412 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Mandeep Singh Grang 2019-05-15 21:23:41 +0000 1456) bool *HasWinCFI) {
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1457) if (AArch64InstrInfo::isSEHInstruction(MI))
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1458) return;
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1459)
+ab53fd9b500b3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Duncan P. N. Exon Smith 2016-07-08 20:29:42 +0000 1460) unsigned Opc = MI.getOpcode();
+7140363cd0122 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 09:44:46 +0000 1461) unsigned Scale;
+7140363cd0122 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 09:44:46 +0000 1462) switch (Opc) {
+7140363cd0122 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 09:44:46 +0000 1463) case AArch64::STPXi:
+7140363cd0122 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 09:44:46 +0000 1464) case AArch64::STRXui:
+7140363cd0122 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 09:44:46 +0000 1465) case AArch64::STPDi:
+7140363cd0122 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 09:44:46 +0000 1466) case AArch64::STRDui:
+7140363cd0122 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 09:44:46 +0000 1467) case AArch64::LDPXi:
+7140363cd0122 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 09:44:46 +0000 1468) case AArch64::LDRXui:
+7140363cd0122 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 09:44:46 +0000 1469) case AArch64::LDPDi:
+7140363cd0122 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 09:44:46 +0000 1470) case AArch64::LDRDui:
+7140363cd0122 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 09:44:46 +0000 1471) Scale = 8;
+7140363cd0122 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 09:44:46 +0000 1472) break;
+2d77e788f2fd5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 12:10:22 +0000 1473) case AArch64::STPQi:
+2d77e788f2fd5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 12:10:22 +0000 1474) case AArch64::STRQui:
+2d77e788f2fd5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 12:10:22 +0000 1475) case AArch64::LDPQi:
+2d77e788f2fd5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 12:10:22 +0000 1476) case AArch64::LDRQui:
+2d77e788f2fd5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 12:10:22 +0000 1477) Scale = 16;
+2d77e788f2fd5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 12:10:22 +0000 1478) break;
+7140363cd0122 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 09:44:46 +0000 1479) default:
+7140363cd0122 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 09:44:46 +0000 1480) llvm_unreachable("Unexpected callee-save save/restore opcode!");
+7140363cd0122 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 09:44:46 +0000 1481) }
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1482)
+ab53fd9b500b3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Duncan P. N. Exon Smith 2016-07-08 20:29:42 +0000 1483) unsigned OffsetIdx = MI.getNumExplicitOperands() - 1;
+ab53fd9b500b3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Duncan P. N. Exon Smith 2016-07-08 20:29:42 +0000 1484) assert(MI.getOperand(OffsetIdx - 1).getReg() == AArch64::SP &&
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1485) "Unexpected base register in callee-save save/restore instruction!");
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1486) // Last operand is immediate offset that needs fixing.
+ab53fd9b500b3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Duncan P. N. Exon Smith 2016-07-08 20:29:42 +0000 1487) MachineOperand &OffsetOpnd = MI.getOperand(OffsetIdx);
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1488) // All generated opcodes have scaled offsets.
+2d77e788f2fd5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 12:10:22 +0000 1489) assert(LocalStackSize % Scale == 0);
+7140363cd0122 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 09:44:46 +0000 1490) OffsetOpnd.setImm(OffsetOpnd.getImm() + LocalStackSize / Scale);
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1491)
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1492) if (NeedsWinCFI) {
+814435fe87412 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Mandeep Singh Grang 2019-05-15 21:23:41 +0000 1493) *HasWinCFI = true;
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1494) auto MBBI = std::next(MachineBasicBlock::iterator(MI));
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1495) assert(MBBI != MI.getParent()->end() && "Expecting a valid instruction");
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1496) assert(AArch64InstrInfo::isSEHInstruction(*MBBI) &&
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1497) "Expecting a SEH instruction");
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1498) fixupSEHOpcode(MBBI, LocalStackSize);
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1499) }
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1500) }
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1501)
+1cc8fff420a76 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanne Wouda 2020-01-14 13:16:57 +0000 1502) static bool isTargetWindows(const MachineFunction &MF) {
+1cc8fff420a76 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanne Wouda 2020-01-14 13:16:57 +0000 1503) return MF.getSubtarget<AArch64Subtarget>().isTargetWindows();
+1cc8fff420a76 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanne Wouda 2020-01-14 13:16:57 +0000 1504) }
+1cc8fff420a76 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanne Wouda 2020-01-14 13:16:57 +0000 1505)
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 1506) // Convenience function to determine whether I is an SVE callee save.
+df186507e1d07 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Benjamin Kramer 2020-01-14 14:06:12 +0100 1507) static bool IsSVECalleeSave(MachineBasicBlock::iterator I) {
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 1508) switch (I->getOpcode()) {
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 1509) default:
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 1510) return false;
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 1511) case AArch64::STR_ZXI:
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 1512) case AArch64::STR_PXI:
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 1513) case AArch64::LDR_ZXI:
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 1514) case AArch64::LDR_PXI:
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 1515) return I->getFlag(MachineInstr::FrameSetup) ||
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 1516) I->getFlag(MachineInstr::FrameDestroy);
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 1517) }
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 1518) }
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 1519)
+20a093e2bc310 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-25 10:50:02 +0000 1520) static void emitShadowCallStackPrologue(const TargetInstrInfo &TII,
+20a093e2bc310 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-25 10:50:02 +0000 1521) MachineFunction &MF,
+20a093e2bc310 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-25 10:50:02 +0000 1522) MachineBasicBlock &MBB,
+20a093e2bc310 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-25 10:50:02 +0000 1523) MachineBasicBlock::iterator MBBI,
+20a093e2bc310 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-25 10:50:02 +0000 1524) const DebugLoc &DL, bool NeedsWinCFI,
+20a093e2bc310 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-25 10:50:02 +0000 1525) bool NeedsUnwindInfo) {
+20a093e2bc310 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-25 10:50:02 +0000 1526) // Shadow call stack prolog: str x30, [x18], #8
+20a093e2bc310 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-25 10:50:02 +0000 1527) BuildMI(MBB, MBBI, DL, TII.get(AArch64::STRXpost))
+20a093e2bc310 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-25 10:50:02 +0000 1528) .addReg(AArch64::X18, RegState::Define)
+20a093e2bc310 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-25 10:50:02 +0000 1529) .addReg(AArch64::LR)
+20a093e2bc310 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-25 10:50:02 +0000 1530) .addReg(AArch64::X18)
+20a093e2bc310 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-25 10:50:02 +0000 1531) .addImm(8)
+20a093e2bc310 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-25 10:50:02 +0000 1532) .setMIFlag(MachineInstr::FrameSetup);
+20a093e2bc310 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-25 10:50:02 +0000 1533)
+20a093e2bc310 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-25 10:50:02 +0000 1534) // This instruction also makes x18 live-in to the entry block.
+20a093e2bc310 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-25 10:50:02 +0000 1535) MBB.addLiveIn(AArch64::X18);
+20a093e2bc310 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-25 10:50:02 +0000 1536)
+20a093e2bc310 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-25 10:50:02 +0000 1537) if (NeedsWinCFI)
+20a093e2bc310 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-25 10:50:02 +0000 1538) BuildMI(MBB, MBBI, DL, TII.get(AArch64::SEH_Nop))
+20a093e2bc310 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-25 10:50:02 +0000 1539) .setMIFlag(MachineInstr::FrameSetup);
+20a093e2bc310 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-25 10:50:02 +0000 1540)
+20a093e2bc310 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-25 10:50:02 +0000 1541) if (NeedsUnwindInfo) {
+20a093e2bc310 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-25 10:50:02 +0000 1542) // Emit a CFI instruction that causes 8 to be subtracted from the value of
+20a093e2bc310 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-25 10:50:02 +0000 1543) // x18 when unwinding past this frame.
+20a093e2bc310 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-25 10:50:02 +0000 1544) static const char CFIInst[] = {
+20a093e2bc310 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-25 10:50:02 +0000 1545) dwarf::DW_CFA_val_expression,
+20a093e2bc310 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-25 10:50:02 +0000 1546) 18, // register
+20a093e2bc310 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-25 10:50:02 +0000 1547) 2, // length
+20a093e2bc310 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-25 10:50:02 +0000 1548) static_cast<char>(unsigned(dwarf::DW_OP_breg18)),
+20a093e2bc310 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-25 10:50:02 +0000 1549) static_cast<char>(-8) & 0x7f, // addend (sleb128)
+20a093e2bc310 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-25 10:50:02 +0000 1550) };
+20a093e2bc310 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-25 10:50:02 +0000 1551) unsigned CFIIndex = MF.addFrameInst(MCCFIInstruction::createEscape(
+20a093e2bc310 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-25 10:50:02 +0000 1552) nullptr, StringRef(CFIInst, sizeof(CFIInst))));
+20a093e2bc310 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-25 10:50:02 +0000 1553) BuildMI(MBB, MBBI, DL, TII.get(AArch64::CFI_INSTRUCTION))
+20a093e2bc310 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-25 10:50:02 +0000 1554) .addCFIIndex(CFIIndex)
+20a093e2bc310 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-25 10:50:02 +0000 1555) .setMIFlag(MachineInstr::FrameSetup);
+20a093e2bc310 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-25 10:50:02 +0000 1556) }
+20a093e2bc310 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-25 10:50:02 +0000 1557) }
+20a093e2bc310 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-25 10:50:02 +0000 1558)
+20a093e2bc310 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-25 10:50:02 +0000 1559) static void emitShadowCallStackEpilogue(const TargetInstrInfo &TII,
+20a093e2bc310 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-25 10:50:02 +0000 1560) MachineFunction &MF,
+20a093e2bc310 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-25 10:50:02 +0000 1561) MachineBasicBlock &MBB,
+20a093e2bc310 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-25 10:50:02 +0000 1562) MachineBasicBlock::iterator MBBI,
+20a093e2bc310 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-25 10:50:02 +0000 1563) const DebugLoc &DL) {
+20a093e2bc310 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-25 10:50:02 +0000 1564) // Shadow call stack epilog: ldr x30, [x18, #-8]!
+20a093e2bc310 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-25 10:50:02 +0000 1565) BuildMI(MBB, MBBI, DL, TII.get(AArch64::LDRXpre))
+20a093e2bc310 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-25 10:50:02 +0000 1566) .addReg(AArch64::X18, RegState::Define)
+20a093e2bc310 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-25 10:50:02 +0000 1567) .addReg(AArch64::LR, RegState::Define)
+20a093e2bc310 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-25 10:50:02 +0000 1568) .addReg(AArch64::X18)
+20a093e2bc310 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-25 10:50:02 +0000 1569) .addImm(-8)
+20a093e2bc310 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-25 10:50:02 +0000 1570) .setMIFlag(MachineInstr::FrameDestroy);
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 1571)
+588ecc11b8959 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matt Arsenault 2022-12-16 12:13:47 -0500 1572) if (MF.getInfo<AArch64FunctionInfo>()->needsAsyncDwarfUnwindInfo(MF)) {
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 1573) unsigned CFIIndex =
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 1574) MF.addFrameInst(MCCFIInstruction::createRestore(nullptr, 18));
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 1575) BuildMI(MBB, MBBI, DL, TII.get(TargetOpcode::CFI_INSTRUCTION))
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 1576) .addCFIIndex(CFIIndex)
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 1577) .setMIFlags(MachineInstr::FrameDestroy);
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 1578) }
+20a093e2bc310 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-25 10:50:02 +0000 1579) }
+20a093e2bc310 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-25 10:50:02 +0000 1580)
+6e54fccede402 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Igor Kudrin 2023-07-01 14:45:59 -0700 1581) // Define the current CFA rule to use the provided FP.
+6e54fccede402 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Igor Kudrin 2023-07-01 14:45:59 -0700 1582) static void emitDefineCFAWithFP(MachineFunction &MF, MachineBasicBlock &MBB,
+6e54fccede402 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Igor Kudrin 2023-07-01 14:45:59 -0700 1583) MachineBasicBlock::iterator MBBI,
+6e54fccede402 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Igor Kudrin 2023-07-01 14:45:59 -0700 1584) const DebugLoc &DL, unsigned FixedObject) {
+6e54fccede402 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Igor Kudrin 2023-07-01 14:45:59 -0700 1585) const AArch64Subtarget &STI = MF.getSubtarget<AArch64Subtarget>();
+6e54fccede402 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Igor Kudrin 2023-07-01 14:45:59 -0700 1586) const AArch64RegisterInfo *TRI = STI.getRegisterInfo();
+6e54fccede402 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Igor Kudrin 2023-07-01 14:45:59 -0700 1587) const TargetInstrInfo *TII = STI.getInstrInfo();
+6e54fccede402 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Igor Kudrin 2023-07-01 14:45:59 -0700 1588) AArch64FunctionInfo *AFI = MF.getInfo<AArch64FunctionInfo>();
+6e54fccede402 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Igor Kudrin 2023-07-01 14:45:59 -0700 1589)
+6e54fccede402 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Igor Kudrin 2023-07-01 14:45:59 -0700 1590) const int OffsetToFirstCalleeSaveFromFP =
+6e54fccede402 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Igor Kudrin 2023-07-01 14:45:59 -0700 1591) AFI->getCalleeSaveBaseToFrameRecordOffset() -
+6e54fccede402 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Igor Kudrin 2023-07-01 14:45:59 -0700 1592) AFI->getCalleeSavedStackSize();
+6e54fccede402 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Igor Kudrin 2023-07-01 14:45:59 -0700 1593) Register FramePtr = TRI->getFrameRegister(MF);
+6e54fccede402 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Igor Kudrin 2023-07-01 14:45:59 -0700 1594) unsigned Reg = TRI->getDwarfRegNum(FramePtr, true);
+6e54fccede402 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Igor Kudrin 2023-07-01 14:45:59 -0700 1595) unsigned CFIIndex = MF.addFrameInst(MCCFIInstruction::cfiDefCfa(
+6e54fccede402 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Igor Kudrin 2023-07-01 14:45:59 -0700 1596) nullptr, Reg, FixedObject - OffsetToFirstCalleeSaveFromFP));
+6e54fccede402 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Igor Kudrin 2023-07-01 14:45:59 -0700 1597) BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
+6e54fccede402 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Igor Kudrin 2023-07-01 14:45:59 -0700 1598) .addCFIIndex(CFIIndex)
+6e54fccede402 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Igor Kudrin 2023-07-01 14:45:59 -0700 1599) .setMIFlags(MachineInstr::FrameSetup);
+6e54fccede402 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Igor Kudrin 2023-07-01 14:45:59 -0700 1600) }
+6e54fccede402 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Igor Kudrin 2023-07-01 14:45:59 -0700 1601)
+7cf26e0c6decf llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Jie Fu 2023-11-23 09:06:48 +0800 1602) #ifndef NDEBUG
+a842430c20f1d llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Hahn 2023-11-22 16:49:33 +0000 1603) /// Collect live registers from the end of \p MI's parent up to (including) \p
+a842430c20f1d llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Hahn 2023-11-22 16:49:33 +0000 1604) /// MI in \p LiveRegs.
+a842430c20f1d llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Hahn 2023-11-22 16:49:33 +0000 1605) static void getLivePhysRegsUpTo(MachineInstr &MI, const TargetRegisterInfo &TRI,
+7a0e222a17058 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Jay Foad 2024-03-07 08:16:52 +0000 1606) LivePhysRegs &LiveRegs) {
+a842430c20f1d llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Hahn 2023-11-22 16:49:33 +0000 1607)
+a842430c20f1d llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Hahn 2023-11-22 16:49:33 +0000 1608) MachineBasicBlock &MBB = *MI.getParent();
+a842430c20f1d llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Hahn 2023-11-22 16:49:33 +0000 1609) LiveRegs.addLiveOuts(MBB);
+a842430c20f1d llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Hahn 2023-11-22 16:49:33 +0000 1610) for (const MachineInstr &MI :
+a842430c20f1d llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Hahn 2023-11-22 16:49:33 +0000 1611) reverse(make_range(MI.getIterator(), MBB.instr_end())))
+a842430c20f1d llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Hahn 2023-11-22 16:49:33 +0000 1612) LiveRegs.stepBackward(MI);
+a842430c20f1d llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Hahn 2023-11-22 16:49:33 +0000 1613) }
+7cf26e0c6decf llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Jie Fu 2023-11-23 09:06:48 +0800 1614) #endif
+a842430c20f1d llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Hahn 2023-11-22 16:49:33 +0000 1615)
+61b305edfd861 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Quentin Colombet 2015-05-05 17:38:16 +0000 1616) void AArch64FrameLowering::emitPrologue(MachineFunction &MF,
+61b305edfd861 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Quentin Colombet 2015-05-05 17:38:16 +0000 1617) MachineBasicBlock &MBB) const {
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 1618) MachineBasicBlock::iterator MBBI = MBB.begin();
+941a705b7bf15 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2016-07-28 18:40:00 +0000 1619) const MachineFrameInfo &MFI = MF.getFrameInfo();
+f1caa2833f505 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2017-12-15 22:22:58 +0000 1620) const Function &F = MF.getFunction();
+66834ec6e19a7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Ahmed Bougacha 2015-12-16 22:54:06 +0000 1621) const AArch64Subtarget &Subtarget = MF.getSubtarget<AArch64Subtarget>();
+66834ec6e19a7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Ahmed Bougacha 2015-12-16 22:54:06 +0000 1622) const AArch64RegisterInfo *RegInfo = Subtarget.getRegisterInfo();
+66834ec6e19a7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Ahmed Bougacha 2015-12-16 22:54:06 +0000 1623) const TargetInstrInfo *TII = Subtarget.getInstrInfo();
+a842430c20f1d llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Hahn 2023-11-22 16:49:33 +0000 1624)
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 1625) MachineModuleInfo &MMI = MF.getMMI();
+775aaeb7656dc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2015-11-05 21:54:58 +0000 1626) AArch64FunctionInfo *AFI = MF.getInfo<AArch64FunctionInfo>();
+588ecc11b8959 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matt Arsenault 2022-12-16 12:13:47 -0500 1627) bool EmitCFI = AFI->needsDwarfUnwindInfo(MF);
+6e54fccede402 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Igor Kudrin 2023-07-01 14:45:59 -0700 1628) bool EmitAsyncCFI = AFI->needsAsyncDwarfUnwindInfo(MF);
+775aaeb7656dc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2015-11-05 21:54:58 +0000 1629) bool HasFP = hasFP(MF);
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 1630) bool NeedsWinCFI = needsWinCFI(MF);
+814435fe87412 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Mandeep Singh Grang 2019-05-15 21:23:41 +0000 1631) bool HasWinCFI = false;
+814435fe87412 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Mandeep Singh Grang 2019-05-15 21:23:41 +0000 1632) auto Cleanup = make_scope_exit([&]() { MF.setHasWinCFI(HasWinCFI); });
+814435fe87412 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Mandeep Singh Grang 2019-05-15 21:23:41 +0000 1633)
+a842430c20f1d llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Hahn 2023-11-22 16:49:33 +0000 1634) MachineBasicBlock::iterator End = MBB.end();
+a842430c20f1d llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Hahn 2023-11-22 16:49:33 +0000 1635) #ifndef NDEBUG
+1cd682f26bfe6 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (David Blaikie 2023-11-22 19:09:14 +0000 1636) const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
+a842430c20f1d llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Hahn 2023-11-22 16:49:33 +0000 1637) // Collect live register from the end of MBB up to the start of the existing
+a842430c20f1d llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Hahn 2023-11-22 16:49:33 +0000 1638) // frame setup instructions.
+a842430c20f1d llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Hahn 2023-11-22 16:49:33 +0000 1639) MachineBasicBlock::iterator NonFrameStart = MBB.begin();
+a842430c20f1d llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Hahn 2023-11-22 16:49:33 +0000 1640) while (NonFrameStart != End &&
+a842430c20f1d llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Hahn 2023-11-22 16:49:33 +0000 1641) NonFrameStart->getFlag(MachineInstr::FrameSetup))
+a842430c20f1d llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Hahn 2023-11-22 16:49:33 +0000 1642) ++NonFrameStart;
+a842430c20f1d llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Hahn 2023-11-22 16:49:33 +0000 1643)
+7a0e222a17058 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Jay Foad 2024-03-07 08:16:52 +0000 1644) LivePhysRegs LiveRegs(*TRI);
+a842430c20f1d llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Hahn 2023-11-22 16:49:33 +0000 1645) if (NonFrameStart != MBB.end()) {
+a842430c20f1d llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Hahn 2023-11-22 16:49:33 +0000 1646) getLivePhysRegsUpTo(*NonFrameStart, *TRI, LiveRegs);
+a842430c20f1d llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Hahn 2023-11-22 16:49:33 +0000 1647) // Ignore registers used for stack management for now.
+a842430c20f1d llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Hahn 2023-11-22 16:49:33 +0000 1648) LiveRegs.removeReg(AArch64::SP);
+a842430c20f1d llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Hahn 2023-11-22 16:49:33 +0000 1649) LiveRegs.removeReg(AArch64::X19);
+a842430c20f1d llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Hahn 2023-11-22 16:49:33 +0000 1650) LiveRegs.removeReg(AArch64::FP);
+a842430c20f1d llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Hahn 2023-11-22 16:49:33 +0000 1651) LiveRegs.removeReg(AArch64::LR);
+a842430c20f1d llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Hahn 2023-11-22 16:49:33 +0000 1652) }
+a842430c20f1d llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Hahn 2023-11-22 16:49:33 +0000 1653)
+a842430c20f1d llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Hahn 2023-11-22 16:49:33 +0000 1654) auto VerifyClobberOnExit = make_scope_exit([&]() {
+a842430c20f1d llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Hahn 2023-11-22 16:49:33 +0000 1655) if (NonFrameStart == MBB.end())
+a842430c20f1d llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Hahn 2023-11-22 16:49:33 +0000 1656) return;
+a842430c20f1d llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Hahn 2023-11-22 16:49:33 +0000 1657) // Check if any of the newly instructions clobber any of the live registers.
+a842430c20f1d llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Hahn 2023-11-22 16:49:33 +0000 1658) for (MachineInstr &MI :
+a842430c20f1d llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Hahn 2023-11-22 16:49:33 +0000 1659) make_range(MBB.instr_begin(), NonFrameStart->getIterator())) {
+a842430c20f1d llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Hahn 2023-11-22 16:49:33 +0000 1660) for (auto &Op : MI.operands())
+a842430c20f1d llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Hahn 2023-11-22 16:49:33 +0000 1661) if (Op.isReg() && Op.isDef())
+7a0e222a17058 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Jay Foad 2024-03-07 08:16:52 +0000 1662) assert(!LiveRegs.contains(Op.getReg()) &&
+a842430c20f1d llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Hahn 2023-11-22 16:49:33 +0000 1663) "live register clobbered by inserted prologue instructions");
+a842430c20f1d llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Hahn 2023-11-22 16:49:33 +0000 1664) }
+a842430c20f1d llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Hahn 2023-11-22 16:49:33 +0000 1665) });
+a842430c20f1d llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Hahn 2023-11-22 16:49:33 +0000 1666) #endif
+a842430c20f1d llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Hahn 2023-11-22 16:49:33 +0000 1667)
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 1668) bool IsFunclet = MBB.isEHFuncletEntry();
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 1669)
+8aa6cd5cb9990 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Jessica Paquette 2018-04-12 16:16:18 +0000 1670) // At this point, we're going to decide whether or not the function uses a
+8aa6cd5cb9990 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Jessica Paquette 2018-04-12 16:16:18 +0000 1671) // redzone. In most cases, the function doesn't have a redzone so let's
+8aa6cd5cb9990 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Jessica Paquette 2018-04-12 16:16:18 +0000 1672) // assume that's false and set it to true in the case that there's a redzone.
+8aa6cd5cb9990 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Jessica Paquette 2018-04-12 16:16:18 +0000 1673) AFI->setHasRedZone(false);
+8aa6cd5cb9990 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Jessica Paquette 2018-04-12 16:16:18 +0000 1674)
+775aaeb7656dc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2015-11-05 21:54:58 +0000 1675) // Debug location must be unknown since the first debug location is used
+775aaeb7656dc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2015-11-05 21:54:58 +0000 1676) // to determine the end of the prologue.
+775aaeb7656dc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2015-11-05 21:54:58 +0000 1677) DebugLoc DL;
+775aaeb7656dc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2015-11-05 21:54:58 +0000 1678)
+a88c722e687e6 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2020-09-25 11:45:22 +0100 1679) const auto &MFnI = *MF.getInfo<AArch64FunctionInfo>();
+1d2b558265bd9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Anatoly Trosinenko 2023-10-11 13:52:41 +0300 1680) if (MFnI.needsShadowCallStackPrologueEpilogue(MF))
+20a093e2bc310 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-25 10:50:02 +0000 1681) emitShadowCallStackPrologue(*TII, MF, MBB, MBBI, DL, NeedsWinCFI,
+588ecc11b8959 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matt Arsenault 2022-12-16 12:13:47 -0500 1682) MFnI.needsDwarfUnwindInfo(MF));
+20a093e2bc310 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-25 10:50:02 +0000 1683)
+eb02ee44d3253 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Anatoly Trosinenko 2023-09-22 12:27:00 +0300 1684) if (MFnI.shouldSignReturnAddress(MF)) {
+eb02ee44d3253 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Anatoly Trosinenko 2023-09-22 12:27:00 +0300 1685) BuildMI(MBB, MBBI, DL, TII->get(AArch64::PAUTH_PROLOGUE))
+eb02ee44d3253 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Anatoly Trosinenko 2023-09-22 12:27:00 +0300 1686) .setMIFlag(MachineInstr::FrameSetup);
+eb02ee44d3253 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Anatoly Trosinenko 2023-09-22 12:27:00 +0300 1687) if (NeedsWinCFI)
+eb02ee44d3253 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Anatoly Trosinenko 2023-09-22 12:27:00 +0300 1688) HasWinCFI = true; // AArch64PointerAuth pass will insert SEH_PACSignLR
+eb02ee44d3253 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Anatoly Trosinenko 2023-09-22 12:27:00 +0300 1689) }
+bd3ee371e9f0b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2023-01-17 16:17:03 -0800 1690)
+0593ce5f0bbb7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Mayer 2022-06-02 18:05:02 -0700 1691) if (EmitCFI && MFnI.isMTETagged()) {
+0593ce5f0bbb7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Mayer 2022-06-02 18:05:02 -0700 1692) BuildMI(MBB, MBBI, DL, TII->get(AArch64::EMITMTETAGGED))
+0593ce5f0bbb7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Mayer 2022-06-02 18:05:02 -0700 1693) .setMIFlag(MachineInstr::FrameSetup);
+0593ce5f0bbb7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Mayer 2022-06-02 18:05:02 -0700 1694) }
+64dcdec60cdc3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Luke Cheeseman 2018-08-17 12:53:22 +0000 1695)
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 1696) // We signal the presence of a Swift extended frame to external tools by
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 1697) // storing FP with 0b0001 in bits 63:60. In normal userland operation a simple
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 1698) // ORR is sufficient, it is assumed a Swift kernel would initialize the TBI
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 1699) // bits so that is still true.
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 1700) if (HasFP && AFI->hasSwiftAsyncContext()) {
+a773db7d76222 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Doug Gregor 2021-09-15 13:35:08 -0700 1701) switch (MF.getTarget().Options.SwiftAsyncFramePointer) {
+a773db7d76222 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Doug Gregor 2021-09-15 13:35:08 -0700 1702) case SwiftAsyncFramePointerMode::DeploymentBased:
+a773db7d76222 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Doug Gregor 2021-09-15 13:35:08 -0700 1703) if (Subtarget.swiftAsyncContextIsDynamicallySet()) {
+a773db7d76222 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Doug Gregor 2021-09-15 13:35:08 -0700 1704) // The special symbol below is absolute and has a *value* that can be
+a773db7d76222 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Doug Gregor 2021-09-15 13:35:08 -0700 1705) // combined with the frame pointer to signal an extended frame.
+a773db7d76222 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Doug Gregor 2021-09-15 13:35:08 -0700 1706) BuildMI(MBB, MBBI, DL, TII->get(AArch64::LOADgot), AArch64::X16)
+a773db7d76222 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Doug Gregor 2021-09-15 13:35:08 -0700 1707) .addExternalSymbol("swift_async_extendedFramePointerFlags",
+a773db7d76222 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Doug Gregor 2021-09-15 13:35:08 -0700 1708) AArch64II::MO_GOT);
+0ecd8846aedac llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hiroshi Yamauchi 2023-09-28 09:43:39 -0700 1709) if (NeedsWinCFI) {
+0ecd8846aedac llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hiroshi Yamauchi 2023-09-28 09:43:39 -0700 1710) BuildMI(MBB, MBBI, DL, TII->get(AArch64::SEH_Nop))
+0ecd8846aedac llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hiroshi Yamauchi 2023-09-28 09:43:39 -0700 1711) .setMIFlags(MachineInstr::FrameSetup);
+0ecd8846aedac llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hiroshi Yamauchi 2023-09-28 09:43:39 -0700 1712) HasWinCFI = true;
+0ecd8846aedac llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hiroshi Yamauchi 2023-09-28 09:43:39 -0700 1713) }
+a773db7d76222 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Doug Gregor 2021-09-15 13:35:08 -0700 1714) BuildMI(MBB, MBBI, DL, TII->get(AArch64::ORRXrs), AArch64::FP)
+a773db7d76222 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Doug Gregor 2021-09-15 13:35:08 -0700 1715) .addUse(AArch64::FP)
+a773db7d76222 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Doug Gregor 2021-09-15 13:35:08 -0700 1716) .addUse(AArch64::X16)
+a773db7d76222 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Doug Gregor 2021-09-15 13:35:08 -0700 1717) .addImm(Subtarget.isTargetILP32() ? 32 : 0);
+0ecd8846aedac llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hiroshi Yamauchi 2023-09-28 09:43:39 -0700 1718) if (NeedsWinCFI) {
+0ecd8846aedac llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hiroshi Yamauchi 2023-09-28 09:43:39 -0700 1719) BuildMI(MBB, MBBI, DL, TII->get(AArch64::SEH_Nop))
+0ecd8846aedac llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hiroshi Yamauchi 2023-09-28 09:43:39 -0700 1720) .setMIFlags(MachineInstr::FrameSetup);
+0ecd8846aedac llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hiroshi Yamauchi 2023-09-28 09:43:39 -0700 1721) HasWinCFI = true;
+0ecd8846aedac llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hiroshi Yamauchi 2023-09-28 09:43:39 -0700 1722) }
+a773db7d76222 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Doug Gregor 2021-09-15 13:35:08 -0700 1723) break;
+a773db7d76222 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Doug Gregor 2021-09-15 13:35:08 -0700 1724) }
+de9d80c1c579e llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Fangrui Song 2022-08-08 11:24:15 -0700 1725) [[fallthrough]];
+a773db7d76222 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Doug Gregor 2021-09-15 13:35:08 -0700 1726)
+a773db7d76222 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Doug Gregor 2021-09-15 13:35:08 -0700 1727) case SwiftAsyncFramePointerMode::Always:
+5d070c8259ac6 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-09-03 09:59:02 +0100 1728) // ORR x29, x29, #0x1000_0000_0000_0000
+5d070c8259ac6 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-09-03 09:59:02 +0100 1729) BuildMI(MBB, MBBI, DL, TII->get(AArch64::ORRXri), AArch64::FP)
+5d070c8259ac6 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-09-03 09:59:02 +0100 1730) .addUse(AArch64::FP)
+5d070c8259ac6 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-09-03 09:59:02 +0100 1731) .addImm(0x1100)
+5d070c8259ac6 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-09-03 09:59:02 +0100 1732) .setMIFlag(MachineInstr::FrameSetup);
+0ecd8846aedac llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hiroshi Yamauchi 2023-09-28 09:43:39 -0700 1733) if (NeedsWinCFI) {
+0ecd8846aedac llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hiroshi Yamauchi 2023-09-28 09:43:39 -0700 1734) BuildMI(MBB, MBBI, DL, TII->get(AArch64::SEH_Nop))
+0ecd8846aedac llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hiroshi Yamauchi 2023-09-28 09:43:39 -0700 1735) .setMIFlags(MachineInstr::FrameSetup);
+0ecd8846aedac llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hiroshi Yamauchi 2023-09-28 09:43:39 -0700 1736) HasWinCFI = true;
+0ecd8846aedac llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hiroshi Yamauchi 2023-09-28 09:43:39 -0700 1737) }
+a773db7d76222 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Doug Gregor 2021-09-15 13:35:08 -0700 1738) break;
+a773db7d76222 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Doug Gregor 2021-09-15 13:35:08 -0700 1739)
+a773db7d76222 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Doug Gregor 2021-09-15 13:35:08 -0700 1740) case SwiftAsyncFramePointerMode::Never:
+a773db7d76222 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Doug Gregor 2021-09-15 13:35:08 -0700 1741) break;
+5d070c8259ac6 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-09-03 09:59:02 +0100 1742) }
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 1743) }
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 1744)
+775aaeb7656dc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2015-11-05 21:54:58 +0000 1745) // All calls are tail calls in GHC calling conv, and functions have no
+775aaeb7656dc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2015-11-05 21:54:58 +0000 1746) // prologue/epilogue.
+f1caa2833f505 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2017-12-15 22:22:58 +0000 1747) if (MF.getFunction().getCallingConv() == CallingConv::GHC)
+fa78d08675df1 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Greg Fitzgerald 2015-01-19 17:40:05 +0000 1748) return;
+fa78d08675df1 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Greg Fitzgerald 2015-01-19 17:40:05 +0000 1749)
+2f63e57fa59e7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-04-10 15:34:11 -0700 1750) // Set tagged base pointer to the requested stack slot.
+d752f5e95309c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgeniy Stepanov 2019-07-17 19:24:02 +0000 1751) // Ideally it should match SP value after prologue.
+b0df70403d20e llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Fangrui Song 2022-12-04 22:43:14 +0000 1752) std::optional<int> TBPI = AFI->getTaggedBasePointerIndex();
+2f63e57fa59e7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-04-10 15:34:11 -0700 1753) if (TBPI)
+2f63e57fa59e7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-04-10 15:34:11 -0700 1754) AFI->setTaggedBasePointerOffset(-MFI.getObjectOffset(*TBPI));
+2f63e57fa59e7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-04-10 15:34:11 -0700 1755) else
+2f63e57fa59e7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-04-10 15:34:11 -0700 1756) AFI->setTaggedBasePointerOffset(MFI.getStackSize());
+d752f5e95309c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgeniy Stepanov 2019-07-17 19:24:02 +0000 1757)
+4f99b6f0fe425 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-03 11:33:50 +0000 1758) const StackOffset &SVEStackSize = getSVEStackSize(MF);
+4f99b6f0fe425 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-03 11:33:50 +0000 1759)
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 1760) // getStackSize() includes all the locals in its size calculation. We don't
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 1761) // include these locals when computing the stack size of a funclet, as they
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 1762) // are allocated in the parent's stack frame and accessed via the frame
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 1763) // pointer from the funclet. We only save the callee saved registers in the
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 1764) // funclet, which are really the callee saved registers of the parent
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 1765) // function, including the funclet.
+965ed1e974e80 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kiran Chandramohan 2019-11-20 12:45:26 +0000 1766) int64_t NumBytes = IsFunclet ? getWinEHFuncletFrameSize(MF)
+965ed1e974e80 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kiran Chandramohan 2019-11-20 12:45:26 +0000 1767) : MFI.getStackSize();
+f309f095e7c67 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2022-10-14 11:27:39 +0300 1768) if (!AFI->hasStackFrame() && !windowsRequiresStackProbe(MF, NumBytes)) {
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 1769) assert(!HasFP && "unexpected function without stack frame but with FP");
+4f99b6f0fe425 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-03 11:33:50 +0000 1770) assert(!SVEStackSize &&
+4f99b6f0fe425 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-03 11:33:50 +0000 1771) "unexpected function without stack frame but with SVE objects");
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 1772) // All of the stack allocation is for locals.
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 1773) AFI->setLocalStackSize(NumBytes);
+27c352d26d572 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Chad Rosier 2016-03-14 18:24:34 +0000 1774) if (!NumBytes)
+27c352d26d572 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Chad Rosier 2016-03-14 18:24:34 +0000 1775) return;
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 1776) // REDZONE: If the stack size is less than 128 bytes, we don't need
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 1777) // to actually allocate.
+642f6c61a3dcc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Jessica Paquette 2018-04-03 21:56:10 +0000 1778) if (canUseRedZone(MF)) {
+642f6c61a3dcc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Jessica Paquette 2018-04-03 21:56:10 +0000 1779) AFI->setHasRedZone(true);
+27c352d26d572 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Chad Rosier 2016-03-14 18:24:34 +0000 1780) ++NumRedZoneFunctions;
+642f6c61a3dcc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Jessica Paquette 2018-04-03 21:56:10 +0000 1781) } else {
+612b038966103 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-08-06 13:06:40 +0000 1782) emitFrameOffset(MBB, MBBI, DL, AArch64::SP, AArch64::SP,
+73b6cb67dcdad llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-11-03 16:44:20 +0000 1783) StackOffset::getFixed(-NumBytes), TII,
+73b6cb67dcdad llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-11-03 16:44:20 +0000 1784) MachineInstr::FrameSetup, false, NeedsWinCFI, &HasWinCFI);
+25e92920c9d13 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-24 17:36:19 +0000 1785) if (EmitCFI) {
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1786) // Label used to tie together the PROLOG_LABEL and the MachineMoves.
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1787) MCSymbol *FrameLabel = MMI.getContext().createTempSymbol();
+75434366cec16 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (David Tellenbach 2019-11-22 00:09:50 +0100 1788) // Encode the stack size of the leaf function.
+0840d725c4e7c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Fangrui Song 2020-05-22 15:51:24 -0700 1789) unsigned CFIIndex = MF.addFrameInst(
+0840d725c4e7c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Fangrui Song 2020-05-22 15:51:24 -0700 1790) MCCFIInstruction::cfiDefCfaOffset(FrameLabel, NumBytes));
+0840d725c4e7c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Fangrui Song 2020-05-22 15:51:24 -0700 1791) BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
+0840d725c4e7c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Fangrui Song 2020-05-22 15:51:24 -0700 1792) .addCFIIndex(CFIIndex)
+0840d725c4e7c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Fangrui Song 2020-05-22 15:51:24 -0700 1793) .setMIFlags(MachineInstr::FrameSetup);
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1794) }
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 1795) }
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1796)
+814435fe87412 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Mandeep Singh Grang 2019-05-15 21:23:41 +0000 1797) if (NeedsWinCFI) {
+814435fe87412 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Mandeep Singh Grang 2019-05-15 21:23:41 +0000 1798) HasWinCFI = true;
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1799) BuildMI(MBB, MBBI, DL, TII->get(AArch64::SEH_PrologEnd))
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1800) .setMIFlag(MachineInstr::FrameSetup);
+814435fe87412 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Mandeep Singh Grang 2019-05-15 21:23:41 +0000 1801) }
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1802)
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 1803) return;
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 1804) }
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 1805)
+eacf4e408bb6f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2017-08-01 21:13:54 +0000 1806) bool IsWin64 =
+f1caa2833f505 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2017-12-15 22:22:58 +0000 1807) Subtarget.isCallingConvWin64(MF.getFunction().getCallingConv());
+494abe139a9aa llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Daniel Frampton 2020-03-31 13:12:54 -0700 1808) unsigned FixedObject = getFixedObjectSize(MF, AFI, IsWin64, IsFunclet);
+eacf4e408bb6f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2017-08-01 21:13:54 +0000 1809)
+eacf4e408bb6f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2017-08-01 21:13:54 +0000 1810) auto PrologueSaveSize = AFI->getCalleeSavedStackSize() + FixedObject;
+27c352d26d572 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Chad Rosier 2016-03-14 18:24:34 +0000 1811) // All of the remaining stack allocations are for locals.
+eacf4e408bb6f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2017-08-01 21:13:54 +0000 1812) AFI->setLocalStackSize(NumBytes - PrologueSaveSize);
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1813) bool CombineSPBump = shouldCombineCSRLocalStackBump(MF, NumBytes);
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 1814) bool HomPrologEpilog = homogeneousPrologEpilog(MF);
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1815) if (CombineSPBump) {
+4f99b6f0fe425 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-03 11:33:50 +0000 1816) assert(!SVEStackSize && "Cannot combine SP bump with SVE");
+612b038966103 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-08-06 13:06:40 +0000 1817) emitFrameOffset(MBB, MBBI, DL, AArch64::SP, AArch64::SP,
+73b6cb67dcdad llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-11-03 16:44:20 +0000 1818) StackOffset::getFixed(-NumBytes), TII,
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 1819) MachineInstr::FrameSetup, false, NeedsWinCFI, &HasWinCFI,
+6e54fccede402 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Igor Kudrin 2023-07-01 14:45:59 -0700 1820) EmitAsyncCFI);
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1821) NumBytes = 0;
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 1822) } else if (HomPrologEpilog) {
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 1823) // Stack has been already adjusted.
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 1824) NumBytes -= PrologueSaveSize;
+eacf4e408bb6f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2017-08-01 21:13:54 +0000 1825) } else if (PrologueSaveSize != 0) {
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1826) MBBI = convertCalleeSaveRestoreToSPPrePostIncDec(
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 1827) MBB, MBBI, DL, TII, -PrologueSaveSize, NeedsWinCFI, &HasWinCFI,
+6e54fccede402 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Igor Kudrin 2023-07-01 14:45:59 -0700 1828) EmitAsyncCFI);
+eacf4e408bb6f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2017-08-01 21:13:54 +0000 1829) NumBytes -= PrologueSaveSize;
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1830) }
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1831) assert(NumBytes >= 0 && "Negative stack allocation size!?");
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 1832)
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1833) // Move past the saves of the callee-saved registers, fixing up the offsets
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1834) // and pre-inc if we decided to combine the callee-save and local stack
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1835) // pointer bump above.
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 1836) while (MBBI != End && MBBI->getFlag(MachineInstr::FrameSetup) &&
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 1837) !IsSVECalleeSave(MBBI)) {
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1838) if (CombineSPBump)
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1839) fixupCalleeSaveRestoreStackOffset(*MBBI, AFI->getLocalStackSize(),
+814435fe87412 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Mandeep Singh Grang 2019-05-15 21:23:41 +0000 1840) NeedsWinCFI, &HasWinCFI);
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 1841) ++MBBI;
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1842) }
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1843)
+522b4c4b88a56 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Daniel Frampton 2020-03-31 13:11:16 -0700 1844) // For funclets the FP belongs to the containing function.
+522b4c4b88a56 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Daniel Frampton 2020-03-31 13:11:16 -0700 1845) if (!IsFunclet && HasFP) {
+f28e1128d9efb llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-08-16 15:42:28 +0000 1846) // Only set up FP if we actually need to.
+5987da8764b71 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Owen Anderson 2020-09-01 19:25:30 +0000 1847) int64_t FPOffset = AFI->getCalleeSaveBaseToFrameRecordOffset();
+f28e1128d9efb llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-08-16 15:42:28 +0000 1848)
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1849) if (CombineSPBump)
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 1850) FPOffset += AFI->getLocalStackSize();
+27c352d26d572 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Chad Rosier 2016-03-14 18:24:34 +0000 1851)
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 1852) if (AFI->hasSwiftAsyncContext()) {
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 1853) // Before we update the live FP we have to ensure there's a valid (or
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 1854) // null) asynchronous context in its slot just before FP in the frame
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 1855) // record, so store it now.
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 1856) const auto &Attrs = MF.getFunction().getAttributes();
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 1857) bool HaveInitialContext = Attrs.hasAttrSomewhere(Attribute::SwiftAsync);
+769ced3d576be llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-05-17 11:34:16 +0100 1858) if (HaveInitialContext)
+769ced3d576be llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-05-17 11:34:16 +0100 1859) MBB.addLiveIn(AArch64::X22);
+0ecd8846aedac llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hiroshi Yamauchi 2023-09-28 09:43:39 -0700 1860) Register Reg = HaveInitialContext ? AArch64::X22 : AArch64::XZR;
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 1861) BuildMI(MBB, MBBI, DL, TII->get(AArch64::StoreSwiftAsyncContext))
+0ecd8846aedac llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hiroshi Yamauchi 2023-09-28 09:43:39 -0700 1862) .addUse(Reg)
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 1863) .addUse(AArch64::SP)
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 1864) .addImm(FPOffset - 8)
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 1865) .setMIFlags(MachineInstr::FrameSetup);
+0ecd8846aedac llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hiroshi Yamauchi 2023-09-28 09:43:39 -0700 1866) if (NeedsWinCFI) {
+0ecd8846aedac llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hiroshi Yamauchi 2023-09-28 09:43:39 -0700 1867) // WinCFI and arm64e, where StoreSwiftAsyncContext is expanded
+0ecd8846aedac llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hiroshi Yamauchi 2023-09-28 09:43:39 -0700 1868) // to multiple instructions, should be mutually-exclusive.
+0ecd8846aedac llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hiroshi Yamauchi 2023-09-28 09:43:39 -0700 1869) assert(Subtarget.getTargetTriple().getArchName() != "arm64e");
+0ecd8846aedac llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hiroshi Yamauchi 2023-09-28 09:43:39 -0700 1870) BuildMI(MBB, MBBI, DL, TII->get(AArch64::SEH_Nop))
+0ecd8846aedac llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hiroshi Yamauchi 2023-09-28 09:43:39 -0700 1871) .setMIFlags(MachineInstr::FrameSetup);
+0ecd8846aedac llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hiroshi Yamauchi 2023-09-28 09:43:39 -0700 1872) HasWinCFI = true;
+0ecd8846aedac llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hiroshi Yamauchi 2023-09-28 09:43:39 -0700 1873) }
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 1874) }
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 1875)
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 1876) if (HomPrologEpilog) {
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 1877) auto Prolog = MBBI;
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 1878) --Prolog;
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 1879) assert(Prolog->getOpcode() == AArch64::HOM_Prolog);
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 1880) Prolog->addOperand(MachineOperand::CreateImm(FPOffset));
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 1881) } else {
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 1882) // Issue sub fp, sp, FPOffset or
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 1883) // mov fp,sp when FPOffset is zero.
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 1884) // Note: All stores of callee-saved registers are marked as "FrameSetup".
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 1885) // This code marks the instruction(s) that set the FP also.
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 1886) emitFrameOffset(MBB, MBBI, DL, AArch64::FP, AArch64::SP,
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 1887) StackOffset::getFixed(FPOffset), TII,
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 1888) MachineInstr::FrameSetup, false, NeedsWinCFI, &HasWinCFI);
+a07787c9a50c0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2022-10-11 15:11:39 +0300 1889) if (NeedsWinCFI && HasWinCFI) {
+a07787c9a50c0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2022-10-11 15:11:39 +0300 1890) BuildMI(MBB, MBBI, DL, TII->get(AArch64::SEH_PrologEnd))
+a07787c9a50c0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2022-10-11 15:11:39 +0300 1891) .setMIFlag(MachineInstr::FrameSetup);
+a07787c9a50c0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2022-10-11 15:11:39 +0300 1892) // After setting up the FP, the rest of the prolog doesn't need to be
+a07787c9a50c0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2022-10-11 15:11:39 +0300 1893) // included in the SEH unwind info.
+a07787c9a50c0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2022-10-11 15:11:39 +0300 1894) NeedsWinCFI = false;
+a07787c9a50c0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2022-10-11 15:11:39 +0300 1895) }
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 1896) }
+6e54fccede402 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Igor Kudrin 2023-07-01 14:45:59 -0700 1897) if (EmitAsyncCFI)
+6e54fccede402 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Igor Kudrin 2023-07-01 14:45:59 -0700 1898) emitDefineCFAWithFP(MF, MBB, MBBI, DL, FixedObject);
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 1899) }
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 1900)
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 1901) // Now emit the moves for whatever callee saved regs we have (including FP,
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 1902) // LR if those are saved). Frame instructions for SVE register are emitted
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 1903) // later, after the instruction which actually save SVE regs.
+6e54fccede402 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Igor Kudrin 2023-07-01 14:45:59 -0700 1904) if (EmitAsyncCFI)
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 1905) emitCalleeSavedGPRLocations(MBB, MBBI);
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 1906)
+6eb205b257717 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2022-10-11 15:20:59 +0300 1907) // Alignment is required for the parent frame, not the funclet
+6eb205b257717 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2022-10-11 15:20:59 +0300 1908) const bool NeedsRealignment =
+6eb205b257717 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2022-10-11 15:20:59 +0300 1909) NumBytes && !IsFunclet && RegInfo->hasStackRealignment(MF);
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 1910) const int64_t RealignmentPadding =
+6eb205b257717 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2022-10-11 15:20:59 +0300 1911) (NeedsRealignment && MFI.getMaxAlign() > Align(16))
+6eb205b257717 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2022-10-11 15:20:59 +0300 1912) ? MFI.getMaxAlign().value() - 16
+6eb205b257717 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2022-10-11 15:20:59 +0300 1913) : 0;
+6eb205b257717 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2022-10-11 15:20:59 +0300 1914)
+6eb205b257717 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2022-10-11 15:20:59 +0300 1915) if (windowsRequiresStackProbe(MF, NumBytes + RealignmentPadding)) {
+6eb205b257717 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2022-10-11 15:20:59 +0300 1916) uint64_t NumWords = (NumBytes + RealignmentPadding) >> 4;
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1917) if (NeedsWinCFI) {
+814435fe87412 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Mandeep Singh Grang 2019-05-15 21:23:41 +0000 1918) HasWinCFI = true;
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1919) // alloc_l can hold at most 256MB, so assume that NumBytes doesn't
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1920) // exceed this amount. We need to move at most 2^24 - 1 into x15.
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1921) // This is at most two instructions, MOVZ follwed by MOVK.
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1922) // TODO: Fix to use multiple stack alloc unwind codes for stacks
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1923) // exceeding 256MB in size.
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1924) if (NumBytes >= (1 << 28))
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1925) report_fatal_error("Stack size cannot exceed 256MB for stack "
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1926) "unwinding purposes");
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1927)
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1928) uint32_t LowNumWords = NumWords & 0xFFFF;
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1929) BuildMI(MBB, MBBI, DL, TII->get(AArch64::MOVZXi), AArch64::X15)
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1930) .addImm(LowNumWords)
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1931) .addImm(AArch64_AM::getShifterImm(AArch64_AM::LSL, 0))
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1932) .setMIFlag(MachineInstr::FrameSetup);
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1933) BuildMI(MBB, MBBI, DL, TII->get(AArch64::SEH_Nop))
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1934) .setMIFlag(MachineInstr::FrameSetup);
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1935) if ((NumWords & 0xFFFF0000) != 0) {
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1936) BuildMI(MBB, MBBI, DL, TII->get(AArch64::MOVKXi), AArch64::X15)
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1937) .addReg(AArch64::X15)
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1938) .addImm((NumWords & 0xFFFF0000) >> 16) // High half
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1939) .addImm(AArch64_AM::getShifterImm(AArch64_AM::LSL, 16))
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1940) .setMIFlag(MachineInstr::FrameSetup);
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1941) BuildMI(MBB, MBBI, DL, TII->get(AArch64::SEH_Nop))
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1942) .setMIFlag(MachineInstr::FrameSetup);
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1943) }
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1944) } else {
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1945) BuildMI(MBB, MBBI, DL, TII->get(AArch64::MOVi64imm), AArch64::X15)
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1946) .addImm(NumWords)
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1947) .setMIFlags(MachineInstr::FrameSetup);
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1948) }
+2778fd0b59b64 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2017-12-20 06:51:45 +0000 1949)
+2b9cec6244fda llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2022-09-05 13:19:42 -0700 1950) const char* ChkStk = Subtarget.getChkStkName();
+2778fd0b59b64 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2017-12-20 06:51:45 +0000 1951) switch (MF.getTarget().getCodeModel()) {
+9dd1d451d9719 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (David Green 2018-08-22 11:31:39 +0000 1952) case CodeModel::Tiny:
+2778fd0b59b64 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2017-12-20 06:51:45 +0000 1953) case CodeModel::Small:
+2778fd0b59b64 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2017-12-20 06:51:45 +0000 1954) case CodeModel::Medium:
+2778fd0b59b64 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2017-12-20 06:51:45 +0000 1955) case CodeModel::Kernel:
+2778fd0b59b64 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2017-12-20 06:51:45 +0000 1956) BuildMI(MBB, MBBI, DL, TII->get(AArch64::BL))
+2b9cec6244fda llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2022-09-05 13:19:42 -0700 1957) .addExternalSymbol(ChkStk)
+2778fd0b59b64 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2017-12-20 06:51:45 +0000 1958) .addReg(AArch64::X15, RegState::Implicit)
+315357facab6e llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2018-10-31 08:14:09 +0000 1959) .addReg(AArch64::X16, RegState::Implicit | RegState::Define | RegState::Dead)
+315357facab6e llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2018-10-31 08:14:09 +0000 1960) .addReg(AArch64::X17, RegState::Implicit | RegState::Define | RegState::Dead)
+315357facab6e llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2018-10-31 08:14:09 +0000 1961) .addReg(AArch64::NZCV, RegState::Implicit | RegState::Define | RegState::Dead)
+2778fd0b59b64 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2017-12-20 06:51:45 +0000 1962) .setMIFlags(MachineInstr::FrameSetup);
+814435fe87412 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Mandeep Singh Grang 2019-05-15 21:23:41 +0000 1963) if (NeedsWinCFI) {
+814435fe87412 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Mandeep Singh Grang 2019-05-15 21:23:41 +0000 1964) HasWinCFI = true;
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1965) BuildMI(MBB, MBBI, DL, TII->get(AArch64::SEH_Nop))
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1966) .setMIFlag(MachineInstr::FrameSetup);
+814435fe87412 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Mandeep Singh Grang 2019-05-15 21:23:41 +0000 1967) }
+2778fd0b59b64 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2017-12-20 06:51:45 +0000 1968) break;
+2778fd0b59b64 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2017-12-20 06:51:45 +0000 1969) case CodeModel::Large:
+2778fd0b59b64 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2017-12-20 06:51:45 +0000 1970) BuildMI(MBB, MBBI, DL, TII->get(AArch64::MOVaddrEXT))
+2778fd0b59b64 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2017-12-20 06:51:45 +0000 1971) .addReg(AArch64::X16, RegState::Define)
+2b9cec6244fda llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2022-09-05 13:19:42 -0700 1972) .addExternalSymbol(ChkStk)
+2b9cec6244fda llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2022-09-05 13:19:42 -0700 1973) .addExternalSymbol(ChkStk)
+2778fd0b59b64 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2017-12-20 06:51:45 +0000 1974) .setMIFlags(MachineInstr::FrameSetup);
+814435fe87412 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Mandeep Singh Grang 2019-05-15 21:23:41 +0000 1975) if (NeedsWinCFI) {
+814435fe87412 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Mandeep Singh Grang 2019-05-15 21:23:41 +0000 1976) HasWinCFI = true;
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1977) BuildMI(MBB, MBBI, DL, TII->get(AArch64::SEH_Nop))
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1978) .setMIFlag(MachineInstr::FrameSetup);
+814435fe87412 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Mandeep Singh Grang 2019-05-15 21:23:41 +0000 1979) }
+2778fd0b59b64 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2017-12-20 06:51:45 +0000 1980)
+c35ed40f4f1bd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2020-06-11 09:23:15 +0100 1981) BuildMI(MBB, MBBI, DL, TII->get(getBLRCallOpcode(MF)))
+2778fd0b59b64 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2017-12-20 06:51:45 +0000 1982) .addReg(AArch64::X16, RegState::Kill)
+2778fd0b59b64 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2017-12-20 06:51:45 +0000 1983) .addReg(AArch64::X15, RegState::Implicit | RegState::Define)
+315357facab6e llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2018-10-31 08:14:09 +0000 1984) .addReg(AArch64::X16, RegState::Implicit | RegState::Define | RegState::Dead)
+315357facab6e llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2018-10-31 08:14:09 +0000 1985) .addReg(AArch64::X17, RegState::Implicit | RegState::Define | RegState::Dead)
+315357facab6e llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2018-10-31 08:14:09 +0000 1986) .addReg(AArch64::NZCV, RegState::Implicit | RegState::Define | RegState::Dead)
+2778fd0b59b64 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2017-12-20 06:51:45 +0000 1987) .setMIFlags(MachineInstr::FrameSetup);
+814435fe87412 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Mandeep Singh Grang 2019-05-15 21:23:41 +0000 1988) if (NeedsWinCFI) {
+814435fe87412 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Mandeep Singh Grang 2019-05-15 21:23:41 +0000 1989) HasWinCFI = true;
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1990) BuildMI(MBB, MBBI, DL, TII->get(AArch64::SEH_Nop))
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 1991) .setMIFlag(MachineInstr::FrameSetup);
+814435fe87412 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Mandeep Singh Grang 2019-05-15 21:23:41 +0000 1992) }
+2778fd0b59b64 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2017-12-20 06:51:45 +0000 1993) break;
+2778fd0b59b64 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2017-12-20 06:51:45 +0000 1994) }
+2778fd0b59b64 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2017-12-20 06:51:45 +0000 1995)
+2778fd0b59b64 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2017-12-20 06:51:45 +0000 1996) BuildMI(MBB, MBBI, DL, TII->get(AArch64::SUBXrx64), AArch64::SP)
+2778fd0b59b64 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2017-12-20 06:51:45 +0000 1997) .addReg(AArch64::SP, RegState::Kill)
+2778fd0b59b64 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2017-12-20 06:51:45 +0000 1998) .addReg(AArch64::X15, RegState::Kill)
+2778fd0b59b64 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2017-12-20 06:51:45 +0000 1999) .addImm(AArch64_AM::getArithExtendImm(AArch64_AM::UXTX, 4))
+2778fd0b59b64 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2017-12-20 06:51:45 +0000 2000) .setMIFlags(MachineInstr::FrameSetup);
+814435fe87412 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Mandeep Singh Grang 2019-05-15 21:23:41 +0000 2001) if (NeedsWinCFI) {
+814435fe87412 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Mandeep Singh Grang 2019-05-15 21:23:41 +0000 2002) HasWinCFI = true;
+814435fe87412 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Mandeep Singh Grang 2019-05-15 21:23:41 +0000 2003) BuildMI(MBB, MBBI, DL, TII->get(AArch64::SEH_StackAlloc))
+814435fe87412 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Mandeep Singh Grang 2019-05-15 21:23:41 +0000 2004) .addImm(NumBytes)
+814435fe87412 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Mandeep Singh Grang 2019-05-15 21:23:41 +0000 2005) .setMIFlag(MachineInstr::FrameSetup);
+814435fe87412 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Mandeep Singh Grang 2019-05-15 21:23:41 +0000 2006) }
+2778fd0b59b64 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2017-12-20 06:51:45 +0000 2007) NumBytes = 0;
+6eb205b257717 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2022-10-11 15:20:59 +0300 2008)
+6eb205b257717 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2022-10-11 15:20:59 +0300 2009) if (RealignmentPadding > 0) {
+20b758445515e llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2023-07-17 15:19:14 +0300 2010) if (RealignmentPadding >= 4096) {
+20b758445515e llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2023-07-17 15:19:14 +0300 2011) BuildMI(MBB, MBBI, DL, TII->get(AArch64::MOVi64imm))
+20b758445515e llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2023-07-17 15:19:14 +0300 2012) .addReg(AArch64::X16, RegState::Define)
+20b758445515e llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2023-07-17 15:19:14 +0300 2013) .addImm(RealignmentPadding)
+20b758445515e llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2023-07-17 15:19:14 +0300 2014) .setMIFlags(MachineInstr::FrameSetup);
+20b758445515e llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2023-07-17 15:19:14 +0300 2015) BuildMI(MBB, MBBI, DL, TII->get(AArch64::ADDXrx64), AArch64::X15)
+20b758445515e llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2023-07-17 15:19:14 +0300 2016) .addReg(AArch64::SP)
+20b758445515e llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2023-07-17 15:19:14 +0300 2017) .addReg(AArch64::X16, RegState::Kill)
+20b758445515e llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2023-07-17 15:19:14 +0300 2018) .addImm(AArch64_AM::getArithExtendImm(AArch64_AM::UXTX, 0))
+20b758445515e llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2023-07-17 15:19:14 +0300 2019) .setMIFlag(MachineInstr::FrameSetup);
+20b758445515e llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2023-07-17 15:19:14 +0300 2020) } else {
+20b758445515e llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2023-07-17 15:19:14 +0300 2021) BuildMI(MBB, MBBI, DL, TII->get(AArch64::ADDXri), AArch64::X15)
+20b758445515e llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2023-07-17 15:19:14 +0300 2022) .addReg(AArch64::SP)
+20b758445515e llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2023-07-17 15:19:14 +0300 2023) .addImm(RealignmentPadding)
+20b758445515e llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2023-07-17 15:19:14 +0300 2024) .addImm(0)
+20b758445515e llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2023-07-17 15:19:14 +0300 2025) .setMIFlag(MachineInstr::FrameSetup);
+20b758445515e llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2023-07-17 15:19:14 +0300 2026) }
+6eb205b257717 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2022-10-11 15:20:59 +0300 2027)
+6eb205b257717 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2022-10-11 15:20:59 +0300 2028) uint64_t AndMask = ~(MFI.getMaxAlign().value() - 1);
+6eb205b257717 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2022-10-11 15:20:59 +0300 2029) BuildMI(MBB, MBBI, DL, TII->get(AArch64::ANDXri), AArch64::SP)
+6eb205b257717 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2022-10-11 15:20:59 +0300 2030) .addReg(AArch64::X15, RegState::Kill)
+6eb205b257717 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2022-10-11 15:20:59 +0300 2031) .addImm(AArch64_AM::encodeLogicalImmediate(AndMask, 64));
+6eb205b257717 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2022-10-11 15:20:59 +0300 2032) AFI->setStackRealigned(true);
+6eb205b257717 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2022-10-11 15:20:59 +0300 2033)
+6eb205b257717 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2022-10-11 15:20:59 +0300 2034) // No need for SEH instructions here; if we're realigning the stack,
+6eb205b257717 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2022-10-11 15:20:59 +0300 2035) // we've set a frame pointer and already finished the SEH prologue.
+6eb205b257717 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2022-10-11 15:20:59 +0300 2036) assert(!NeedsWinCFI);
+6eb205b257717 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2022-10-11 15:20:59 +0300 2037) }
+2778fd0b59b64 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2017-12-20 06:51:45 +0000 2038) }
+2778fd0b59b64 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2017-12-20 06:51:45 +0000 2039)
+dedf2c6bb5193 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-15 09:27:01 +0000 2040) StackOffset SVECalleeSavesSize = {}, SVELocalsSize = SVEStackSize;
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2041) MachineBasicBlock::iterator CalleeSavesBegin = MBBI, CalleeSavesEnd = MBBI;
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2042)
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2043) // Process the SVE callee-saves to determine what space needs to be
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2044) // allocated.
+26b4ef3694973 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-07-27 14:16:55 +0100 2045) if (int64_t CalleeSavedSize = AFI->getSVECalleeSavedStackSize()) {
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 2046) LLVM_DEBUG(dbgs() << "SVECalleeSavedStackSize = " << CalleeSavedSize
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 2047) << "\n");
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2048) // Find callee save instructions in frame.
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2049) CalleeSavesBegin = MBBI;
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2050) assert(IsSVECalleeSave(CalleeSavesBegin) && "Unexpected instruction");
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2051) while (IsSVECalleeSave(MBBI) && MBBI != MBB.getFirstTerminator())
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2052) ++MBBI;
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2053) CalleeSavesEnd = MBBI;
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2054)
+dedf2c6bb5193 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-15 09:27:01 +0000 2055) SVECalleeSavesSize = StackOffset::getScalable(CalleeSavedSize);
+dedf2c6bb5193 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-15 09:27:01 +0000 2056) SVELocalsSize = SVEStackSize - SVECalleeSavesSize;
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2057) }
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2058)
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2059) // Allocate space for the callee saves (if any).
+dedf2c6bb5193 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-15 09:27:01 +0000 2060) StackOffset CFAOffset =
+dedf2c6bb5193 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-15 09:27:01 +0000 2061) StackOffset::getFixed((int64_t)MFI.getStackSize() - NumBytes);
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 2062) StackOffset LocalsSize = SVELocalsSize + StackOffset::getFixed(NumBytes);
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 2063) allocateStackSpace(MBB, CalleeSavesBegin, 0, SVECalleeSavesSize, false,
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 2064) nullptr, EmitAsyncCFI && !HasFP, CFAOffset,
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 2065) MFI.hasVarSizedObjects() || LocalsSize);
+dedf2c6bb5193 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-15 09:27:01 +0000 2066) CFAOffset += SVECalleeSavesSize;
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 2067)
+6e54fccede402 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Igor Kudrin 2023-07-01 14:45:59 -0700 2068) if (EmitAsyncCFI)
+50a97aacacf68 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-03-24 15:27:04 +0000 2069) emitCalleeSavedSVELocations(MBB, CalleeSavesEnd);
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2070)
+dedf2c6bb5193 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-15 09:27:01 +0000 2071) // Allocate space for the rest of the frame including SVE locals. Align the
+dedf2c6bb5193 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-15 09:27:01 +0000 2072) // stack as necessary.
+dedf2c6bb5193 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-15 09:27:01 +0000 2073) assert(!(canUseRedZone(MF) && NeedsRealignment) &&
+dedf2c6bb5193 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-15 09:27:01 +0000 2074) "Cannot use redzone with stack realignment");
+dedf2c6bb5193 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-15 09:27:01 +0000 2075) if (!canUseRedZone(MF)) {
+dedf2c6bb5193 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-15 09:27:01 +0000 2076) // FIXME: in the case of dynamic re-alignment, NumBytes doesn't have
+dedf2c6bb5193 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-15 09:27:01 +0000 2077) // the correct value here, as NumBytes also includes padding bytes,
+dedf2c6bb5193 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-15 09:27:01 +0000 2078) // which shouldn't be counted here.
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 2079) allocateStackSpace(MBB, CalleeSavesEnd, RealignmentPadding,
+dedf2c6bb5193 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-15 09:27:01 +0000 2080) SVELocalsSize + StackOffset::getFixed(NumBytes),
+dedf2c6bb5193 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-15 09:27:01 +0000 2081) NeedsWinCFI, &HasWinCFI, EmitAsyncCFI && !HasFP,
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 2082) CFAOffset, MFI.hasVarSizedObjects());
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2083) }
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2084)
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2085) // If we need a base pointer, set it up here. It's whatever the value of the
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2086) // stack pointer is at this point. Any variable size objects will be allocated
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2087) // after this, so we can still use the base pointer to reference locals.
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2088) //
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2089) // FIXME: Clarify FrameSetup flags here.
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2090) // Note: Use emitFrameOffset() like above for FP if the FrameSetup flag is
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2091) // needed.
+522b4c4b88a56 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Daniel Frampton 2020-03-31 13:11:16 -0700 2092) // For funclets the BP belongs to the containing function.
+522b4c4b88a56 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Daniel Frampton 2020-03-31 13:11:16 -0700 2093) if (!IsFunclet && RegInfo->hasBasePointer(MF)) {
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 2094) TII->copyPhysReg(MBB, MBBI, DL, RegInfo->getBaseRegister(), AArch64::SP,
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 2095) false);
+814435fe87412 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Mandeep Singh Grang 2019-05-15 21:23:41 +0000 2096) if (NeedsWinCFI) {
+814435fe87412 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Mandeep Singh Grang 2019-05-15 21:23:41 +0000 2097) HasWinCFI = true;
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 2098) BuildMI(MBB, MBBI, DL, TII->get(AArch64::SEH_Nop))
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 2099) .setMIFlag(MachineInstr::FrameSetup);
+814435fe87412 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Mandeep Singh Grang 2019-05-15 21:23:41 +0000 2100) }
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 2101) }
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2102)
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 2103) // The very last FrameSetup instruction indicates the end of prologue. Emit a
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 2104) // SEH opcode indicating the prologue end.
+814435fe87412 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Mandeep Singh Grang 2019-05-15 21:23:41 +0000 2105) if (NeedsWinCFI && HasWinCFI) {
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 2106) BuildMI(MBB, MBBI, DL, TII->get(AArch64::SEH_PrologEnd))
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 2107) .setMIFlag(MachineInstr::FrameSetup);
+814435fe87412 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Mandeep Singh Grang 2019-05-15 21:23:41 +0000 2108) }
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 2109)
+522b4c4b88a56 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Daniel Frampton 2020-03-31 13:11:16 -0700 2110) // SEH funclets are passed the frame pointer in X1. If the parent
+522b4c4b88a56 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Daniel Frampton 2020-03-31 13:11:16 -0700 2111) // function uses the base register, then the base register is used
+522b4c4b88a56 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Daniel Frampton 2020-03-31 13:11:16 -0700 2112) // directly, and is not retrieved from X1.
+522b4c4b88a56 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Daniel Frampton 2020-03-31 13:11:16 -0700 2113) if (IsFunclet && F.hasPersonalityFn()) {
+522b4c4b88a56 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Daniel Frampton 2020-03-31 13:11:16 -0700 2114) EHPersonality Per = classifyEHPersonality(F.getPersonalityFn());
+522b4c4b88a56 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Daniel Frampton 2020-03-31 13:11:16 -0700 2115) if (isAsynchronousEHPersonality(Per)) {
+522b4c4b88a56 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Daniel Frampton 2020-03-31 13:11:16 -0700 2116) BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::COPY), AArch64::FP)
+522b4c4b88a56 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Daniel Frampton 2020-03-31 13:11:16 -0700 2117) .addReg(AArch64::X1)
+522b4c4b88a56 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Daniel Frampton 2020-03-31 13:11:16 -0700 2118) .setMIFlag(MachineInstr::FrameSetup);
+522b4c4b88a56 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Daniel Frampton 2020-03-31 13:11:16 -0700 2119) MBB.addLiveIn(AArch64::X1);
+522b4c4b88a56 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Daniel Frampton 2020-03-31 13:11:16 -0700 2120) }
+522b4c4b88a56 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Daniel Frampton 2020-03-31 13:11:16 -0700 2121) }
+6e54fccede402 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Igor Kudrin 2023-07-01 14:45:59 -0700 2122)
+6e54fccede402 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Igor Kudrin 2023-07-01 14:45:59 -0700 2123) if (EmitCFI && !EmitAsyncCFI) {
+6e54fccede402 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Igor Kudrin 2023-07-01 14:45:59 -0700 2124) if (HasFP) {
+6e54fccede402 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Igor Kudrin 2023-07-01 14:45:59 -0700 2125) emitDefineCFAWithFP(MF, MBB, MBBI, DL, FixedObject);
+6e54fccede402 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Igor Kudrin 2023-07-01 14:45:59 -0700 2126) } else {
+6e54fccede402 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Igor Kudrin 2023-07-01 14:45:59 -0700 2127) StackOffset TotalSize =
+6e54fccede402 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Igor Kudrin 2023-07-01 14:45:59 -0700 2128) SVEStackSize + StackOffset::getFixed((int64_t)MFI.getStackSize());
+6e54fccede402 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Igor Kudrin 2023-07-01 14:45:59 -0700 2129) unsigned CFIIndex = MF.addFrameInst(createDefCFA(
+6e54fccede402 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Igor Kudrin 2023-07-01 14:45:59 -0700 2130) *RegInfo, /*FrameReg=*/AArch64::SP, /*Reg=*/AArch64::SP, TotalSize,
+6e54fccede402 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Igor Kudrin 2023-07-01 14:45:59 -0700 2131) /*LastAdjustmentWasScalable=*/false));
+6e54fccede402 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Igor Kudrin 2023-07-01 14:45:59 -0700 2132) BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
+6e54fccede402 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Igor Kudrin 2023-07-01 14:45:59 -0700 2133) .addCFIIndex(CFIIndex)
+6e54fccede402 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Igor Kudrin 2023-07-01 14:45:59 -0700 2134) .setMIFlags(MachineInstr::FrameSetup);
+6e54fccede402 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Igor Kudrin 2023-07-01 14:45:59 -0700 2135) }
+6e54fccede402 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Igor Kudrin 2023-07-01 14:45:59 -0700 2136) emitCalleeSavedGPRLocations(MBB, MBBI);
+6e54fccede402 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Igor Kudrin 2023-07-01 14:45:59 -0700 2137) emitCalleeSavedSVELocations(MBB, MBBI);
+6e54fccede402 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Igor Kudrin 2023-07-01 14:45:59 -0700 2138) }
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2139) }
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2140)
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 2141) static bool isFuncletReturnInstr(const MachineInstr &MI) {
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 2142) switch (MI.getOpcode()) {
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 2143) default:
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 2144) return false;
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 2145) case AArch64::CATCHRET:
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 2146) case AArch64::CLEANUPRET:
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 2147) return true;
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 2148) }
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 2149) }
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 2150)
+3b0846e8f7689 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2014-05-24 12:50:23 +0000 2151) void AArch64FrameLowering::emitEpilogue(MachineFunction &MF,
+3b0846e8f7689 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2014-05-24 12:50:23 +0000 2152) MachineBasicBlock &MBB) const {
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2153) MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
+941a705b7bf15 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2016-07-28 18:40:00 +0000 2154) MachineFrameInfo &MFI = MF.getFrameInfo();
+81300f75f4da8 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Anatoly Trosinenko 2023-08-11 13:07:54 +0300 2155) AArch64FunctionInfo *AFI = MF.getInfo<AArch64FunctionInfo>();
+66834ec6e19a7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Ahmed Bougacha 2015-12-16 22:54:06 +0000 2156) const AArch64Subtarget &Subtarget = MF.getSubtarget<AArch64Subtarget>();
+66834ec6e19a7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Ahmed Bougacha 2015-12-16 22:54:06 +0000 2157) const TargetInstrInfo *TII = Subtarget.getInstrInfo();
+61b305edfd861 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Quentin Colombet 2015-05-05 17:38:16 +0000 2158) DebugLoc DL;
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 2159) bool NeedsWinCFI = needsWinCFI(MF);
+81300f75f4da8 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Anatoly Trosinenko 2023-08-11 13:07:54 +0300 2160) bool EmitCFI = AFI->needsAsyncDwarfUnwindInfo(MF);
+814435fe87412 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Mandeep Singh Grang 2019-05-15 21:23:41 +0000 2161) bool HasWinCFI = false;
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 2162) bool IsFunclet = false;
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 2163)
+61b305edfd861 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Quentin Colombet 2015-05-05 17:38:16 +0000 2164) if (MBB.end() != MBBI) {
+61b305edfd861 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Quentin Colombet 2015-05-05 17:38:16 +0000 2165) DL = MBBI->getDebugLoc();
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 2166) IsFunclet = isFuncletReturnInstr(*MBBI);
+61b305edfd861 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Quentin Colombet 2015-05-05 17:38:16 +0000 2167) }
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 2168)
+8942d3047c684 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hiroshi Yamauchi 2023-08-30 15:36:47 -0700 2169) MachineBasicBlock::iterator EpilogStartI = MBB.end();
+8942d3047c684 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hiroshi Yamauchi 2023-08-30 15:36:47 -0700 2170)
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2171) auto FinishingTouches = make_scope_exit([&]() {
+eb02ee44d3253 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Anatoly Trosinenko 2023-09-22 12:27:00 +0300 2172) if (AFI->shouldSignReturnAddress(MF)) {
+eb02ee44d3253 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Anatoly Trosinenko 2023-09-22 12:27:00 +0300 2173) BuildMI(MBB, MBB.getFirstTerminator(), DL,
+eb02ee44d3253 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Anatoly Trosinenko 2023-09-22 12:27:00 +0300 2174) TII->get(AArch64::PAUTH_EPILOGUE))
+eb02ee44d3253 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Anatoly Trosinenko 2023-09-22 12:27:00 +0300 2175) .setMIFlag(MachineInstr::FrameDestroy);
+eb02ee44d3253 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Anatoly Trosinenko 2023-09-22 12:27:00 +0300 2176) if (NeedsWinCFI)
+eb02ee44d3253 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Anatoly Trosinenko 2023-09-22 12:27:00 +0300 2177) HasWinCFI = true; // AArch64PointerAuth pass will insert SEH_PACSignLR
+eb02ee44d3253 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Anatoly Trosinenko 2023-09-22 12:27:00 +0300 2178) }
+1d2b558265bd9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Anatoly Trosinenko 2023-10-11 13:52:41 +0300 2179) if (AFI->needsShadowCallStackPrologueEpilogue(MF))
+20a093e2bc310 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-25 10:50:02 +0000 2180) emitShadowCallStackEpilogue(*TII, MF, MBB, MBB.getFirstTerminator(), DL);
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2181) if (EmitCFI)
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2182) emitCalleeSavedGPRRestores(MBB, MBB.getFirstTerminator());
+8942d3047c684 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hiroshi Yamauchi 2023-08-30 15:36:47 -0700 2183) if (HasWinCFI) {
+bd3fa318878a5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2022-10-01 18:49:32 +0300 2184) BuildMI(MBB, MBB.getFirstTerminator(), DL,
+bd3fa318878a5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2022-10-01 18:49:32 +0300 2185) TII->get(AArch64::SEH_EpilogEnd))
+bd3fa318878a5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2022-10-01 18:49:32 +0300 2186) .setMIFlag(MachineInstr::FrameDestroy);
+8942d3047c684 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hiroshi Yamauchi 2023-08-30 15:36:47 -0700 2187) if (!MF.hasWinCFI())
+8942d3047c684 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hiroshi Yamauchi 2023-08-30 15:36:47 -0700 2188) MF.setHasWinCFI(true);
+8942d3047c684 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hiroshi Yamauchi 2023-08-30 15:36:47 -0700 2189) }
+8942d3047c684 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hiroshi Yamauchi 2023-08-30 15:36:47 -0700 2190) if (NeedsWinCFI) {
+8942d3047c684 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hiroshi Yamauchi 2023-08-30 15:36:47 -0700 2191) assert(EpilogStartI != MBB.end());
+8942d3047c684 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hiroshi Yamauchi 2023-08-30 15:36:47 -0700 2192) if (!HasWinCFI)
+8942d3047c684 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hiroshi Yamauchi 2023-08-30 15:36:47 -0700 2193) MBB.erase(EpilogStartI);
+8942d3047c684 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hiroshi Yamauchi 2023-08-30 15:36:47 -0700 2194) }
+20a093e2bc310 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-25 10:50:02 +0000 2195) });
+20a093e2bc310 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-25 10:50:02 +0000 2196)
+965ed1e974e80 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kiran Chandramohan 2019-11-20 12:45:26 +0000 2197) int64_t NumBytes = IsFunclet ? getWinEHFuncletFrameSize(MF)
+965ed1e974e80 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kiran Chandramohan 2019-11-20 12:45:26 +0000 2198) : MFI.getStackSize();
+09cc56431078f llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Jiangning Liu 2014-05-15 01:33:17 +0000 2199)
+fa78d08675df1 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Greg Fitzgerald 2015-01-19 17:40:05 +0000 2200) // All calls are tail calls in GHC calling conv, and functions have no
+fa78d08675df1 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Greg Fitzgerald 2015-01-19 17:40:05 +0000 2201) // prologue/epilogue.
+f1caa2833f505 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2017-12-15 22:22:58 +0000 2202) if (MF.getFunction().getCallingConv() == CallingConv::GHC)
+fa78d08675df1 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Greg Fitzgerald 2015-01-19 17:40:05 +0000 2203) return;
+fa78d08675df1 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Greg Fitzgerald 2015-01-19 17:40:05 +0000 2204)
+82a0e808bb2cd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2020-11-19 12:32:50 +0000 2205) // How much of the stack used by incoming arguments this function is expected
+82a0e808bb2cd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2020-11-19 12:32:50 +0000 2206) // to restore in this particular epilogue.
+82a0e808bb2cd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2020-11-19 12:32:50 +0000 2207) int64_t ArgumentStackToRestore = getArgumentStackToRestore(MF, MBB);
+eacf4e408bb6f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2017-08-01 21:13:54 +0000 2208) bool IsWin64 =
+f1caa2833f505 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2017-12-15 22:22:58 +0000 2209) Subtarget.isCallingConvWin64(MF.getFunction().getCallingConv());
+494abe139a9aa llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Daniel Frampton 2020-03-31 13:12:54 -0700 2210) unsigned FixedObject = getFixedObjectSize(MF, AFI, IsWin64, IsFunclet);
+eacf4e408bb6f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2017-08-01 21:13:54 +0000 2211)
+82a0e808bb2cd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2020-11-19 12:32:50 +0000 2212) int64_t AfterCSRPopSize = ArgumentStackToRestore;
+eacf4e408bb6f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2017-08-01 21:13:54 +0000 2213) auto PrologueSaveSize = AFI->getCalleeSavedStackSize() + FixedObject;
+dc6403d1331cc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-12-04 00:54:52 +0000 2214) // We cannot rely on the local stack size set in emitPrologue if the function
+dc6403d1331cc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-12-04 00:54:52 +0000 2215) // has funclets, as funclets have different local stack size requirements, and
+dc6403d1331cc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-12-04 00:54:52 +0000 2216) // the current value set in emitPrologue may be that of the containing
+dc6403d1331cc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-12-04 00:54:52 +0000 2217) // function.
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 2218) if (MF.hasEHFunclets())
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 2219) AFI->setLocalStackSize(NumBytes - PrologueSaveSize);
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 2220) if (homogeneousPrologEpilog(MF, &MBB)) {
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 2221) assert(!NeedsWinCFI);
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 2222) auto LastPopI = MBB.getFirstTerminator();
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 2223) if (LastPopI != MBB.begin()) {
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 2224) auto HomogeneousEpilog = std::prev(LastPopI);
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 2225) if (HomogeneousEpilog->getOpcode() == AArch64::HOM_Epilog)
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 2226) LastPopI = HomogeneousEpilog;
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 2227) }
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 2228)
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 2229) // Adjust local stack
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 2230) emitFrameOffset(MBB, LastPopI, DL, AArch64::SP, AArch64::SP,
+6530ea409506a llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-07-25 10:50:39 -0700 2231) StackOffset::getFixed(AFI->getLocalStackSize()), TII,
+8942d3047c684 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hiroshi Yamauchi 2023-08-30 15:36:47 -0700 2232) MachineInstr::FrameDestroy, false, NeedsWinCFI, &HasWinCFI);
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 2233)
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 2234) // SP has been already adjusted while restoring callee save regs.
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 2235) // We've bailed-out the case with adjusting SP for arguments.
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 2236) assert(AfterCSRPopSize == 0);
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 2237) return;
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 2238) }
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 2239) bool CombineSPBump = shouldCombineCSRLocalStackBumpInEpilogue(MBB, NumBytes);
+164560bd74652 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Francis Visoiu Mistrih 2018-03-14 20:34:03 +0000 2240) // Assume we can't combine the last pop with the sp restore.
+164560bd74652 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Francis Visoiu Mistrih 2018-03-14 20:34:03 +0000 2241)
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2242) bool CombineAfterCSRBump = false;
+164560bd74652 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Francis Visoiu Mistrih 2018-03-14 20:34:03 +0000 2243) if (!CombineSPBump && PrologueSaveSize != 0) {
+164560bd74652 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Francis Visoiu Mistrih 2018-03-14 20:34:03 +0000 2244) MachineBasicBlock::iterator Pop = std::prev(MBB.getFirstTerminator());
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2245) while (Pop->getOpcode() == TargetOpcode::CFI_INSTRUCTION ||
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2246) AArch64InstrInfo::isSEHInstruction(*Pop))
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 2247) Pop = std::prev(Pop);
+164560bd74652 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Francis Visoiu Mistrih 2018-03-14 20:34:03 +0000 2248) // Converting the last ldp to a post-index ldp is valid only if the last
+164560bd74652 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Francis Visoiu Mistrih 2018-03-14 20:34:03 +0000 2249) // ldp's offset is 0.
+164560bd74652 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Francis Visoiu Mistrih 2018-03-14 20:34:03 +0000 2250) const MachineOperand &OffsetOp = Pop->getOperand(Pop->getNumOperands() - 1);
+82a0e808bb2cd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2020-11-19 12:32:50 +0000 2251) // If the offset is 0 and the AfterCSR pop is not actually trying to
+82a0e808bb2cd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2020-11-19 12:32:50 +0000 2252) // allocate more stack for arguments (in space that an untimely interrupt
+82a0e808bb2cd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2020-11-19 12:32:50 +0000 2253) // may clobber), convert it to a post-index ldp.
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2254) if (OffsetOp.getImm() == 0 && AfterCSRPopSize >= 0) {
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2255) convertCalleeSaveRestoreToSPPrePostIncDec(
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2256) MBB, Pop, DL, TII, PrologueSaveSize, NeedsWinCFI, &HasWinCFI, EmitCFI,
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2257) MachineInstr::FrameDestroy, PrologueSaveSize);
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2258) } else {
+164560bd74652 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Francis Visoiu Mistrih 2018-03-14 20:34:03 +0000 2259) // If not, make sure to emit an add after the last ldp.
+164560bd74652 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Francis Visoiu Mistrih 2018-03-14 20:34:03 +0000 2260) // We're doing this by transfering the size to be restored from the
+164560bd74652 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Francis Visoiu Mistrih 2018-03-14 20:34:03 +0000 2261) // adjustment *before* the CSR pops to the adjustment *after* the CSR
+164560bd74652 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Francis Visoiu Mistrih 2018-03-14 20:34:03 +0000 2262) // pops.
+164560bd74652 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Francis Visoiu Mistrih 2018-03-14 20:34:03 +0000 2263) AfterCSRPopSize += PrologueSaveSize;
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2264) CombineAfterCSRBump = true;
+164560bd74652 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Francis Visoiu Mistrih 2018-03-14 20:34:03 +0000 2265) }
+164560bd74652 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Francis Visoiu Mistrih 2018-03-14 20:34:03 +0000 2266) }
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 2267)
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2268) // Move past the restores of the callee-saved registers.
+164560bd74652 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Francis Visoiu Mistrih 2018-03-14 20:34:03 +0000 2269) // If we plan on combining the sp bump of the local stack size and the callee
+164560bd74652 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Francis Visoiu Mistrih 2018-03-14 20:34:03 +0000 2270) // save stack size, we might need to adjust the CSR save and restore offsets.
+61b305edfd861 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Quentin Colombet 2015-05-05 17:38:16 +0000 2271) MachineBasicBlock::iterator LastPopI = MBB.getFirstTerminator();
+454192917b148 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2015-12-17 03:18:47 +0000 2272) MachineBasicBlock::iterator Begin = MBB.begin();
+454192917b148 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2015-12-17 03:18:47 +0000 2273) while (LastPopI != Begin) {
+454192917b148 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2015-12-17 03:18:47 +0000 2274) --LastPopI;
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2275) if (!LastPopI->getFlag(MachineInstr::FrameDestroy) ||
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2276) IsSVECalleeSave(LastPopI)) {
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2277) ++LastPopI;
+454192917b148 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2015-12-17 03:18:47 +0000 2278) break;
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 2279) } else if (CombineSPBump)
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 2280) fixupCalleeSaveRestoreStackOffset(*LastPopI, AFI->getLocalStackSize(),
+814435fe87412 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Mandeep Singh Grang 2019-05-15 21:23:41 +0000 2281) NeedsWinCFI, &HasWinCFI);
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2282) }
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 2283)
+8942d3047c684 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hiroshi Yamauchi 2023-08-30 15:36:47 -0700 2284) if (NeedsWinCFI) {
+8942d3047c684 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hiroshi Yamauchi 2023-08-30 15:36:47 -0700 2285) // Note that there are cases where we insert SEH opcodes in the
+8942d3047c684 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hiroshi Yamauchi 2023-08-30 15:36:47 -0700 2286) // epilogue when we had no SEH opcodes in the prologue. For
+8942d3047c684 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hiroshi Yamauchi 2023-08-30 15:36:47 -0700 2287) // example, when there is no stack frame but there are stack
+8942d3047c684 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hiroshi Yamauchi 2023-08-30 15:36:47 -0700 2288) // arguments. Insert the SEH_EpilogStart and remove it later if it
+8942d3047c684 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hiroshi Yamauchi 2023-08-30 15:36:47 -0700 2289) // we didn't emit any SEH opcodes to avoid generating WinCFI for
+8942d3047c684 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hiroshi Yamauchi 2023-08-30 15:36:47 -0700 2290) // functions that don't need it.
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 2291) BuildMI(MBB, LastPopI, DL, TII->get(AArch64::SEH_EpilogStart))
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 2292) .setMIFlag(MachineInstr::FrameDestroy);
+8942d3047c684 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hiroshi Yamauchi 2023-08-30 15:36:47 -0700 2293) EpilogStartI = LastPopI;
+8942d3047c684 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hiroshi Yamauchi 2023-08-30 15:36:47 -0700 2294) --EpilogStartI;
+814435fe87412 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Mandeep Singh Grang 2019-05-15 21:23:41 +0000 2295) }
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 2296)
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 2297) if (hasFP(MF) && AFI->hasSwiftAsyncContext()) {
+c31f0a00503a3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Saleem Abdulrasool 2022-03-08 20:12:59 -0800 2298) switch (MF.getTarget().Options.SwiftAsyncFramePointer) {
+c31f0a00503a3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Saleem Abdulrasool 2022-03-08 20:12:59 -0800 2299) case SwiftAsyncFramePointerMode::DeploymentBased:
+c31f0a00503a3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Saleem Abdulrasool 2022-03-08 20:12:59 -0800 2300) // Avoid the reload as it is GOT relative, and instead fall back to the
+c31f0a00503a3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Saleem Abdulrasool 2022-03-08 20:12:59 -0800 2301) // hardcoded value below. This allows a mismatch between the OS and
+c31f0a00503a3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Saleem Abdulrasool 2022-03-08 20:12:59 -0800 2302) // application without immediately terminating on the difference.
+de9d80c1c579e llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Fangrui Song 2022-08-08 11:24:15 -0700 2303) [[fallthrough]];
+c31f0a00503a3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Saleem Abdulrasool 2022-03-08 20:12:59 -0800 2304) case SwiftAsyncFramePointerMode::Always:
+c31f0a00503a3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Saleem Abdulrasool 2022-03-08 20:12:59 -0800 2305) // We need to reset FP to its untagged state on return. Bit 60 is
+c31f0a00503a3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Saleem Abdulrasool 2022-03-08 20:12:59 -0800 2306) // currently used to show the presence of an extended frame.
+c31f0a00503a3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Saleem Abdulrasool 2022-03-08 20:12:59 -0800 2307)
+c31f0a00503a3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Saleem Abdulrasool 2022-03-08 20:12:59 -0800 2308) // BIC x29, x29, #0x1000_0000_0000_0000
+c31f0a00503a3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Saleem Abdulrasool 2022-03-08 20:12:59 -0800 2309) BuildMI(MBB, MBB.getFirstTerminator(), DL, TII->get(AArch64::ANDXri),
+c31f0a00503a3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Saleem Abdulrasool 2022-03-08 20:12:59 -0800 2310) AArch64::FP)
+c31f0a00503a3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Saleem Abdulrasool 2022-03-08 20:12:59 -0800 2311) .addUse(AArch64::FP)
+c31f0a00503a3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Saleem Abdulrasool 2022-03-08 20:12:59 -0800 2312) .addImm(0x10fe)
+c31f0a00503a3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Saleem Abdulrasool 2022-03-08 20:12:59 -0800 2313) .setMIFlag(MachineInstr::FrameDestroy);
+0ecd8846aedac llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hiroshi Yamauchi 2023-09-28 09:43:39 -0700 2314) if (NeedsWinCFI) {
+0ecd8846aedac llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hiroshi Yamauchi 2023-09-28 09:43:39 -0700 2315) BuildMI(MBB, MBBI, DL, TII->get(AArch64::SEH_Nop))
+0ecd8846aedac llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hiroshi Yamauchi 2023-09-28 09:43:39 -0700 2316) .setMIFlags(MachineInstr::FrameDestroy);
+0ecd8846aedac llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hiroshi Yamauchi 2023-09-28 09:43:39 -0700 2317) HasWinCFI = true;
+0ecd8846aedac llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hiroshi Yamauchi 2023-09-28 09:43:39 -0700 2318) }
+c31f0a00503a3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Saleem Abdulrasool 2022-03-08 20:12:59 -0800 2319) break;
+c31f0a00503a3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Saleem Abdulrasool 2022-03-08 20:12:59 -0800 2320)
+c31f0a00503a3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Saleem Abdulrasool 2022-03-08 20:12:59 -0800 2321) case SwiftAsyncFramePointerMode::Never:
+c31f0a00503a3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Saleem Abdulrasool 2022-03-08 20:12:59 -0800 2322) break;
+c31f0a00503a3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Saleem Abdulrasool 2022-03-08 20:12:59 -0800 2323) }
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 2324) }
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 2325)
+4f99b6f0fe425 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-03 11:33:50 +0000 2326) const StackOffset &SVEStackSize = getSVEStackSize(MF);
+4f99b6f0fe425 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-03 11:33:50 +0000 2327)
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 2328) // If there is a single SP update, insert it before the ret and we're done.
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 2329) if (CombineSPBump) {
+4f99b6f0fe425 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-03 11:33:50 +0000 2330) assert(!SVEStackSize && "Cannot combine SP bump with SVE");
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2331)
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2332) // When we are about to restore the CSRs, the CFA register is SP again.
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2333) if (EmitCFI && hasFP(MF)) {
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2334) const AArch64RegisterInfo &RegInfo = *Subtarget.getRegisterInfo();
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2335) unsigned Reg = RegInfo.getDwarfRegNum(AArch64::SP, true);
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2336) unsigned CFIIndex =
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2337) MF.addFrameInst(MCCFIInstruction::cfiDefCfa(nullptr, Reg, NumBytes));
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2338) BuildMI(MBB, LastPopI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2339) .addCFIIndex(CFIIndex)
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2340) .setMIFlags(MachineInstr::FrameDestroy);
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2341) }
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2342)
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 2343) emitFrameOffset(MBB, MBB.getFirstTerminator(), DL, AArch64::SP, AArch64::SP,
+73b6cb67dcdad llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-11-03 16:44:20 +0000 2344) StackOffset::getFixed(NumBytes + (int64_t)AfterCSRPopSize),
+73b6cb67dcdad llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-11-03 16:44:20 +0000 2345) TII, MachineInstr::FrameDestroy, false, NeedsWinCFI,
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2346) &HasWinCFI, EmitCFI, StackOffset::getFixed(NumBytes));
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 2347) return;
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 2348) }
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 2349)
+eacf4e408bb6f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2017-08-01 21:13:54 +0000 2350) NumBytes -= PrologueSaveSize;
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2351) assert(NumBytes >= 0 && "Negative stack allocation size!?");
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2352)
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2353) // Process the SVE callee-saves to determine what space needs to be
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2354) // deallocated.
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2355) StackOffset DeallocateBefore = {}, DeallocateAfter = SVEStackSize;
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2356) MachineBasicBlock::iterator RestoreBegin = LastPopI, RestoreEnd = LastPopI;
+26b4ef3694973 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-07-27 14:16:55 +0100 2357) if (int64_t CalleeSavedSize = AFI->getSVECalleeSavedStackSize()) {
+5f47d4456d192 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-08-19 11:06:51 +0100 2358) RestoreBegin = std::prev(RestoreEnd);
+5f47d4456d192 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-08-19 11:06:51 +0100 2359) while (RestoreBegin != MBB.begin() &&
+5f47d4456d192 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-08-19 11:06:51 +0100 2360) IsSVECalleeSave(std::prev(RestoreBegin)))
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2361) --RestoreBegin;
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2362)
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2363) assert(IsSVECalleeSave(RestoreBegin) &&
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2364) IsSVECalleeSave(std::prev(RestoreEnd)) && "Unexpected instruction");
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2365)
+73b6cb67dcdad llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-11-03 16:44:20 +0000 2366) StackOffset CalleeSavedSizeAsOffset =
+73b6cb67dcdad llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-11-03 16:44:20 +0000 2367) StackOffset::getScalable(CalleeSavedSize);
+26b4ef3694973 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-07-27 14:16:55 +0100 2368) DeallocateBefore = SVEStackSize - CalleeSavedSizeAsOffset;
+26b4ef3694973 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-07-27 14:16:55 +0100 2369) DeallocateAfter = CalleeSavedSizeAsOffset;
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2370) }
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2371)
+4f99b6f0fe425 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-03 11:33:50 +0000 2372) // Deallocate the SVE area.
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2373) if (SVEStackSize) {
+8f623f4ab0ceb llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bradley Smith 2022-04-28 11:11:11 +0000 2374) // If we have stack realignment or variable sized objects on the stack,
+8f623f4ab0ceb llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bradley Smith 2022-04-28 11:11:11 +0000 2375) // restore the stack pointer from the frame pointer prior to SVE CSR
+8f623f4ab0ceb llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bradley Smith 2022-04-28 11:11:11 +0000 2376) // restoration.
+8f623f4ab0ceb llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bradley Smith 2022-04-28 11:11:11 +0000 2377) if (AFI->isStackRealigned() || MFI.hasVarSizedObjects()) {
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2378) if (int64_t CalleeSavedSize = AFI->getSVECalleeSavedStackSize()) {
+cda2eb3ad2bbe llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-07-28 12:11:09 +0100 2379) // Set SP to start of SVE callee-save area from which they can
+cda2eb3ad2bbe llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-07-28 12:11:09 +0100 2380) // be reloaded. The code below will deallocate the stack space
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2381) // space by moving FP -> SP.
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2382) emitFrameOffset(MBB, RestoreBegin, DL, AArch64::SP, AArch64::FP,
+73b6cb67dcdad llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-11-03 16:44:20 +0000 2383) StackOffset::getScalable(-CalleeSavedSize), TII,
+cda2eb3ad2bbe llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-07-28 12:11:09 +0100 2384) MachineInstr::FrameDestroy);
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2385) }
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2386) } else {
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2387) if (AFI->getSVECalleeSavedStackSize()) {
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2388) // Deallocate the non-SVE locals first before we can deallocate (and
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2389) // restore callee saves) from the SVE area.
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2390) emitFrameOffset(
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2391) MBB, RestoreBegin, DL, AArch64::SP, AArch64::SP,
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2392) StackOffset::getFixed(NumBytes), TII, MachineInstr::FrameDestroy,
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2393) false, false, nullptr, EmitCFI && !hasFP(MF),
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2394) SVEStackSize + StackOffset::getFixed(NumBytes + PrologueSaveSize));
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2395) NumBytes = 0;
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2396) }
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2397)
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2398) emitFrameOffset(MBB, RestoreBegin, DL, AArch64::SP, AArch64::SP,
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2399) DeallocateBefore, TII, MachineInstr::FrameDestroy, false,
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2400) false, nullptr, EmitCFI && !hasFP(MF),
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2401) SVEStackSize +
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2402) StackOffset::getFixed(NumBytes + PrologueSaveSize));
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2403)
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2404) emitFrameOffset(MBB, RestoreEnd, DL, AArch64::SP, AArch64::SP,
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2405) DeallocateAfter, TII, MachineInstr::FrameDestroy, false,
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2406) false, nullptr, EmitCFI && !hasFP(MF),
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2407) DeallocateAfter +
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2408) StackOffset::getFixed(NumBytes + PrologueSaveSize));
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2409) }
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2410) if (EmitCFI)
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2411) emitCalleeSavedSVERestores(MBB, RestoreEnd);
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2412) }
+4f99b6f0fe425 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-03 11:33:50 +0000 2413)
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2414) if (!hasFP(MF)) {
+a1c6269c91a09 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-23 16:54:36 +0000 2415) bool RedZone = canUseRedZone(MF);
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2416) // If this was a redzone leaf function, we don't need to restore the
+a1c6269c91a09 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-23 16:54:36 +0000 2417) // stack pointer (but we may need to pop stack args for fastcc).
+164560bd74652 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Francis Visoiu Mistrih 2018-03-14 20:34:03 +0000 2418) if (RedZone && AfterCSRPopSize == 0)
+a1c6269c91a09 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-23 16:54:36 +0000 2419) return;
+a1c6269c91a09 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-23 16:54:36 +0000 2420)
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2421) // Pop the local variables off the stack. If there are no callee-saved
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2422) // registers, it means we are actually positioned at the terminator and can
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2423) // combine stack increment for the locals and the stack increment for
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2424) // callee-popped arguments into (possibly) a single instruction and be done.
+eacf4e408bb6f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2017-08-01 21:13:54 +0000 2425) bool NoCalleeSaveRestore = PrologueSaveSize == 0;
+965ed1e974e80 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kiran Chandramohan 2019-11-20 12:45:26 +0000 2426) int64_t StackRestoreBytes = RedZone ? 0 : NumBytes;
+a1c6269c91a09 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-23 16:54:36 +0000 2427) if (NoCalleeSaveRestore)
+164560bd74652 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Francis Visoiu Mistrih 2018-03-14 20:34:03 +0000 2428) StackRestoreBytes += AfterCSRPopSize;
+c855e92ca9cf8 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Francis Visoiu Mistrih 2018-04-27 15:30:54 +0000 2429)
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2430) emitFrameOffset(
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2431) MBB, LastPopI, DL, AArch64::SP, AArch64::SP,
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2432) StackOffset::getFixed(StackRestoreBytes), TII,
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2433) MachineInstr::FrameDestroy, false, NeedsWinCFI, &HasWinCFI, EmitCFI,
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2434) StackOffset::getFixed((RedZone ? 0 : NumBytes) + PrologueSaveSize));
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2435)
+17e85cd4109ca llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-24 18:36:37 +0000 2436) // If we were able to combine the local stack pop with the argument pop,
+17e85cd4109ca llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-24 18:36:37 +0000 2437) // then we're done.
+17e85cd4109ca llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-24 18:36:37 +0000 2438) if (NoCalleeSaveRestore || AfterCSRPopSize == 0) {
+a1c6269c91a09 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-23 16:54:36 +0000 2439) return;
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 2440) }
+c855e92ca9cf8 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Francis Visoiu Mistrih 2018-04-27 15:30:54 +0000 2441)
+a1c6269c91a09 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-23 16:54:36 +0000 2442) NumBytes = 0;
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2443) }
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2444)
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2445) // Restore the original stack pointer.
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2446) // FIXME: Rather than doing the math here, we should instead just use
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2447) // non-post-indexed loads for the restores if we aren't actually going to
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2448) // be able to save any instructions.
+f28e1128d9efb llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-08-16 15:42:28 +0000 2449) if (!IsFunclet && (MFI.hasVarSizedObjects() || AFI->isStackRealigned())) {
+73b6cb67dcdad llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-11-03 16:44:20 +0000 2450) emitFrameOffset(
+73b6cb67dcdad llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-11-03 16:44:20 +0000 2451) MBB, LastPopI, DL, AArch64::SP, AArch64::FP,
+73b6cb67dcdad llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-11-03 16:44:20 +0000 2452) StackOffset::getFixed(-AFI->getCalleeSaveBaseToFrameRecordOffset()),
+8942d3047c684 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hiroshi Yamauchi 2023-08-30 15:36:47 -0700 2453) TII, MachineInstr::FrameDestroy, false, NeedsWinCFI, &HasWinCFI);
+f28e1128d9efb llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-08-16 15:42:28 +0000 2454) } else if (NumBytes)
+612b038966103 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-08-06 13:06:40 +0000 2455) emitFrameOffset(MBB, LastPopI, DL, AArch64::SP, AArch64::SP,
+73b6cb67dcdad llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-11-03 16:44:20 +0000 2456) StackOffset::getFixed(NumBytes), TII,
+8942d3047c684 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hiroshi Yamauchi 2023-08-30 15:36:47 -0700 2457) MachineInstr::FrameDestroy, false, NeedsWinCFI, &HasWinCFI);
+a1c6269c91a09 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-23 16:54:36 +0000 2458)
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2459) // When we are about to restore the CSRs, the CFA register is SP again.
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2460) if (EmitCFI && hasFP(MF)) {
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2461) const AArch64RegisterInfo &RegInfo = *Subtarget.getRegisterInfo();
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2462) unsigned Reg = RegInfo.getDwarfRegNum(AArch64::SP, true);
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2463) unsigned CFIIndex = MF.addFrameInst(
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2464) MCCFIInstruction::cfiDefCfa(nullptr, Reg, PrologueSaveSize));
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2465) BuildMI(MBB, LastPopI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2466) .addCFIIndex(CFIIndex)
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2467) .setMIFlags(MachineInstr::FrameDestroy);
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2468) }
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2469)
+a1c6269c91a09 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-23 16:54:36 +0000 2470) // This must be placed after the callee-save restore code because that code
+a1c6269c91a09 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-23 16:54:36 +0000 2471) // assumes the SP is at the same location as it was after the callee-save save
+a1c6269c91a09 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-23 16:54:36 +0000 2472) // code in the prologue.
+164560bd74652 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Francis Visoiu Mistrih 2018-03-14 20:34:03 +0000 2473) if (AfterCSRPopSize) {
+82a0e808bb2cd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2020-11-19 12:32:50 +0000 2474) assert(AfterCSRPopSize > 0 && "attempting to reallocate arg stack that an "
+82a0e808bb2cd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2020-11-19 12:32:50 +0000 2475) "interrupt may have clobbered");
+f11eb3ebe7772 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Peter Collingbourne 2018-04-04 21:55:44 +0000 2476)
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2477) emitFrameOffset(
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2478) MBB, MBB.getFirstTerminator(), DL, AArch64::SP, AArch64::SP,
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2479) StackOffset::getFixed(AfterCSRPopSize), TII, MachineInstr::FrameDestroy,
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2480) false, NeedsWinCFI, &HasWinCFI, EmitCFI,
+d0ea42a7c1bcd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-12 16:30:46 +0100 2481) StackOffset::getFixed(CombineAfterCSRBump ? PrologueSaveSize : 0));
+164560bd74652 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Francis Visoiu Mistrih 2018-03-14 20:34:03 +0000 2482) }
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2483) }
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2484)
+6e54fccede402 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Igor Kudrin 2023-07-01 14:45:59 -0700 2485) bool AArch64FrameLowering::enableCFIFixup(MachineFunction &MF) const {
+6e54fccede402 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Igor Kudrin 2023-07-01 14:45:59 -0700 2486) return TargetFrameLowering::enableCFIFixup(MF) &&
+6e54fccede402 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Igor Kudrin 2023-07-01 14:45:59 -0700 2487) MF.getInfo<AArch64FunctionInfo>()->needsAsyncDwarfUnwindInfo(MF);
+6e54fccede402 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Igor Kudrin 2023-07-01 14:45:59 -0700 2488) }
+6e54fccede402 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Igor Kudrin 2023-07-01 14:45:59 -0700 2489)
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2490) /// getFrameIndexReference - Provide a base+offset reference to an FI slot for
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2491) /// debug info. It's the same as what we use for resolving the code-gen
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2492) /// references for now. FIXME: This can go wrong when references are
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2493) /// SP-relative and simple call frames aren't used.
+d57bba7cf831a llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-11-04 08:56:54 +0000 2494) StackOffset
+d57bba7cf831a llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-11-04 08:56:54 +0000 2495) AArch64FrameLowering::getFrameIndexReference(const MachineFunction &MF, int FI,
+d57bba7cf831a llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-11-04 08:56:54 +0000 2496) Register &FrameReg) const {
+4608868d2f4c0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Peter Collingbourne 2019-06-22 00:06:51 +0000 2497) return resolveFrameIndexReference(
+d57bba7cf831a llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-11-04 08:56:54 +0000 2498) MF, FI, FrameReg,
+d57bba7cf831a llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-11-04 08:56:54 +0000 2499) /*PreferFP=*/
+d57bba7cf831a llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-11-04 08:56:54 +0000 2500) MF.getFunction().hasFnAttribute(Attribute::SanitizeHWAddress),
+d57bba7cf831a llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-11-04 08:56:54 +0000 2501) /*ForSimm=*/false);
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2502) }
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2503)
+d57bba7cf831a llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-11-04 08:56:54 +0000 2504) StackOffset
+d57bba7cf831a llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-11-04 08:56:54 +0000 2505) AArch64FrameLowering::getNonLocalFrameIndexReference(const MachineFunction &MF,
+d57bba7cf831a llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-11-04 08:56:54 +0000 2506) int FI) const {
+d57bba7cf831a llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-11-04 08:56:54 +0000 2507) return StackOffset::getFixed(getSEHFrameIndexOffset(MF, FI));
+70d484d94e3ec llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Mandeep Singh Grang 2019-02-01 21:41:33 +0000 2508) }
+70d484d94e3ec llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Mandeep Singh Grang 2019-02-01 21:41:33 +0000 2509)
+73b6cb67dcdad llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-11-03 16:44:20 +0000 2510) static StackOffset getFPOffset(const MachineFunction &MF,
+73b6cb67dcdad llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-11-03 16:44:20 +0000 2511) int64_t ObjectOffset) {
+70d484d94e3ec llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Mandeep Singh Grang 2019-02-01 21:41:33 +0000 2512) const auto *AFI = MF.getInfo<AArch64FunctionInfo>();
+70d484d94e3ec llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Mandeep Singh Grang 2019-02-01 21:41:33 +0000 2513) const auto &Subtarget = MF.getSubtarget<AArch64Subtarget>();
+70d484d94e3ec llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Mandeep Singh Grang 2019-02-01 21:41:33 +0000 2514) bool IsWin64 =
+70d484d94e3ec llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Mandeep Singh Grang 2019-02-01 21:41:33 +0000 2515) Subtarget.isCallingConvWin64(MF.getFunction().getCallingConv());
+494abe139a9aa llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Daniel Frampton 2020-03-31 13:12:54 -0700 2516) unsigned FixedObject =
+494abe139a9aa llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Daniel Frampton 2020-03-31 13:12:54 -0700 2517) getFixedObjectSize(MF, AFI, IsWin64, /*IsFunclet=*/false);
+5987da8764b71 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Owen Anderson 2020-09-01 19:25:30 +0000 2518) int64_t CalleeSaveSize = AFI->getCalleeSavedStackSize(MF.getFrameInfo());
+5987da8764b71 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Owen Anderson 2020-09-01 19:25:30 +0000 2519) int64_t FPAdjust =
+5987da8764b71 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Owen Anderson 2020-09-01 19:25:30 +0000 2520) CalleeSaveSize - AFI->getCalleeSaveBaseToFrameRecordOffset();
+73b6cb67dcdad llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-11-03 16:44:20 +0000 2521) return StackOffset::getFixed(ObjectOffset + FixedObject + FPAdjust);
+70d484d94e3ec llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Mandeep Singh Grang 2019-02-01 21:41:33 +0000 2522) }
+70d484d94e3ec llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Mandeep Singh Grang 2019-02-01 21:41:33 +0000 2523)
+73b6cb67dcdad llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-11-03 16:44:20 +0000 2524) static StackOffset getStackOffset(const MachineFunction &MF,
+73b6cb67dcdad llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-11-03 16:44:20 +0000 2525) int64_t ObjectOffset) {
+70d484d94e3ec llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Mandeep Singh Grang 2019-02-01 21:41:33 +0000 2526) const auto &MFI = MF.getFrameInfo();
+73b6cb67dcdad llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-11-03 16:44:20 +0000 2527) return StackOffset::getFixed(ObjectOffset + (int64_t)MFI.getStackSize());
+70d484d94e3ec llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Mandeep Singh Grang 2019-02-01 21:41:33 +0000 2528) }
+70d484d94e3ec llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Mandeep Singh Grang 2019-02-01 21:41:33 +0000 2529)
+d57bba7cf831a llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-11-04 08:56:54 +0000 2530) // TODO: This function currently does not work for scalable vectors.
+70d484d94e3ec llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Mandeep Singh Grang 2019-02-01 21:41:33 +0000 2531) int AArch64FrameLowering::getSEHFrameIndexOffset(const MachineFunction &MF,
+70d484d94e3ec llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Mandeep Singh Grang 2019-02-01 21:41:33 +0000 2532) int FI) const {
+70d484d94e3ec llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Mandeep Singh Grang 2019-02-01 21:41:33 +0000 2533) const auto *RegInfo = static_cast<const AArch64RegisterInfo *>(
+70d484d94e3ec llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Mandeep Singh Grang 2019-02-01 21:41:33 +0000 2534) MF.getSubtarget().getRegisterInfo());
+32452487ae999 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgeniy Stepanov 2019-07-12 21:13:55 +0000 2535) int ObjectOffset = MF.getFrameInfo().getObjectOffset(FI);
+32452487ae999 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgeniy Stepanov 2019-07-12 21:13:55 +0000 2536) return RegInfo->getLocalAddressRegister(MF) == AArch64::FP
+73b6cb67dcdad llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-11-03 16:44:20 +0000 2537) ? getFPOffset(MF, ObjectOffset).getFixed()
+73b6cb67dcdad llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-11-03 16:44:20 +0000 2538) : getStackOffset(MF, ObjectOffset).getFixed();
+70d484d94e3ec llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Mandeep Singh Grang 2019-02-01 21:41:33 +0000 2539) }
+70d484d94e3ec llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Mandeep Singh Grang 2019-02-01 21:41:33 +0000 2540)
+612b038966103 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-08-06 13:06:40 +0000 2541) StackOffset AArch64FrameLowering::resolveFrameIndexReference(
+2481f26ac3f22 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matt Arsenault 2020-04-07 16:33:58 -0400 2542) const MachineFunction &MF, int FI, Register &FrameReg, bool PreferFP,
+612b038966103 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-08-06 13:06:40 +0000 2543) bool ForSimm) const {
+70d484d94e3ec llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Mandeep Singh Grang 2019-02-01 21:41:33 +0000 2544) const auto &MFI = MF.getFrameInfo();
+965ed1e974e80 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kiran Chandramohan 2019-11-20 12:45:26 +0000 2545) int64_t ObjectOffset = MFI.getObjectOffset(FI);
+32452487ae999 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgeniy Stepanov 2019-07-12 21:13:55 +0000 2546) bool isFixed = MFI.isFixedObjectIndex(FI);
+914e2f5a02f4f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hsiangkai Wang 2021-01-12 16:19:37 +0800 2547) bool isSVE = MFI.getStackID(FI) == TargetStackID::ScalableVector;
+7774812965027 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-14 13:11:34 +0000 2548) return resolveFrameOffsetReference(MF, ObjectOffset, isFixed, isSVE, FrameReg,
+32452487ae999 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgeniy Stepanov 2019-07-12 21:13:55 +0000 2549) PreferFP, ForSimm);
+32452487ae999 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgeniy Stepanov 2019-07-12 21:13:55 +0000 2550) }
+32452487ae999 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgeniy Stepanov 2019-07-12 21:13:55 +0000 2551)
+612b038966103 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-08-06 13:06:40 +0000 2552) StackOffset AArch64FrameLowering::resolveFrameOffsetReference(
+965ed1e974e80 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kiran Chandramohan 2019-11-20 12:45:26 +0000 2553) const MachineFunction &MF, int64_t ObjectOffset, bool isFixed, bool isSVE,
+2481f26ac3f22 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matt Arsenault 2020-04-07 16:33:58 -0400 2554) Register &FrameReg, bool PreferFP, bool ForSimm) const {
+32452487ae999 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgeniy Stepanov 2019-07-12 21:13:55 +0000 2555) const auto &MFI = MF.getFrameInfo();
+70d484d94e3ec llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Mandeep Singh Grang 2019-02-01 21:41:33 +0000 2556) const auto *RegInfo = static_cast<const AArch64RegisterInfo *>(
+fc6de428c8ab1 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eric Christopher 2014-08-05 02:39:49 +0000 2557) MF.getSubtarget().getRegisterInfo());
+70d484d94e3ec llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Mandeep Singh Grang 2019-02-01 21:41:33 +0000 2558) const auto *AFI = MF.getInfo<AArch64FunctionInfo>();
+70d484d94e3ec llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Mandeep Singh Grang 2019-02-01 21:41:33 +0000 2559) const auto &Subtarget = MF.getSubtarget<AArch64Subtarget>();
+32452487ae999 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgeniy Stepanov 2019-07-12 21:13:55 +0000 2560)
+73b6cb67dcdad llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-11-03 16:44:20 +0000 2561) int64_t FPOffset = getFPOffset(MF, ObjectOffset).getFixed();
+73b6cb67dcdad llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-11-03 16:44:20 +0000 2562) int64_t Offset = getStackOffset(MF, ObjectOffset).getFixed();
+32452487ae999 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgeniy Stepanov 2019-07-12 21:13:55 +0000 2563) bool isCSR =
+d6a7da80aae62 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-29 12:49:34 +0000 2564) !isFixed && ObjectOffset >= -((int)AFI->getCalleeSavedStackSize(MFI));
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2565)
+4f99b6f0fe425 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-03 11:33:50 +0000 2566) const StackOffset &SVEStackSize = getSVEStackSize(MF);
+4f99b6f0fe425 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-03 11:33:50 +0000 2567)
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2568) // Use frame pointer to reference fixed objects. Use it for locals if
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 2569) // there are VLAs or a dynamically realigned SP (and thus the SP isn't
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 2570) // reliable as a base). Make sure useFPForScavengingIndex() does the
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 2571) // right thing for the emergency spill slot.
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2572) bool UseFP = false;
+7774812965027 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-14 13:11:34 +0000 2573) if (AFI->hasStackFrame() && !isSVE) {
+7c65d2288bfd0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2022-03-03 14:09:26 +0000 2574) // We shouldn't prefer using the FP to access fixed-sized stack objects when
+7c65d2288bfd0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2022-03-03 14:09:26 +0000 2575) // there are scalable (SVE) objects in between the FP and the fixed-sized
+7c65d2288bfd0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2022-03-03 14:09:26 +0000 2576) // objects.
+ea834c8365ca7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bradley Smith 2021-03-10 15:03:53 +0000 2577) PreferFP &= !SVEStackSize;
+ea834c8365ca7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Bradley Smith 2021-03-10 15:03:53 +0000 2578)
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2579) // Note: Keeping the following as multiple 'if' statements rather than
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2580) // merging to a single expression for readability.
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2581) //
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2582) // Argument access should always use the FP.
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2583) if (isFixed) {
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2584) UseFP = hasFP(MF);
+a9968c0a339ab llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tomas Matheson 2021-03-15 13:01:34 +0000 2585) } else if (isCSR && RegInfo->hasStackRealignment(MF)) {
+08ab8c9544122 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2018-04-26 18:50:45 +0000 2586) // References to the CSR area must use FP if we're re-aligning the stack
+08ab8c9544122 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2018-04-26 18:50:45 +0000 2587) // since the dynamically-sized alignment padding is between the SP/BP and
+08ab8c9544122 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2018-04-26 18:50:45 +0000 2588) // the CSR area.
+08ab8c9544122 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2018-04-26 18:50:45 +0000 2589) assert(hasFP(MF) && "Re-aligned stack must have frame pointer");
+08ab8c9544122 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2018-04-26 18:50:45 +0000 2590) UseFP = true;
+a9968c0a339ab llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tomas Matheson 2021-03-15 13:01:34 +0000 2591) } else if (hasFP(MF) && !RegInfo->hasStackRealignment(MF)) {
+4608868d2f4c0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Peter Collingbourne 2019-06-22 00:06:51 +0000 2592) // If the FPOffset is negative and we're producing a signed immediate, we
+4608868d2f4c0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Peter Collingbourne 2019-06-22 00:06:51 +0000 2593) // have to keep in mind that the available offset range for negative
+4608868d2f4c0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Peter Collingbourne 2019-06-22 00:06:51 +0000 2594) // offsets is smaller than for positive ones. If an offset is available
+4608868d2f4c0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Peter Collingbourne 2019-06-22 00:06:51 +0000 2595) // via the FP and the SP, use whichever is closest.
+4608868d2f4c0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Peter Collingbourne 2019-06-22 00:06:51 +0000 2596) bool FPOffsetFits = !ForSimm || FPOffset >= -256;
+7c65d2288bfd0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2022-03-03 14:09:26 +0000 2597) PreferFP |= Offset > -FPOffset && !SVEStackSize;
+f2c22050e8211 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Francis Visoiu Mistrih 2018-04-10 11:29:40 +0000 2598)
+f2c22050e8211 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Francis Visoiu Mistrih 2018-04-10 11:29:40 +0000 2599) if (MFI.hasVarSizedObjects()) {
+f2c22050e8211 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Francis Visoiu Mistrih 2018-04-10 11:29:40 +0000 2600) // If we have variable sized objects, we can use either FP or BP, as the
+f2c22050e8211 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Francis Visoiu Mistrih 2018-04-10 11:29:40 +0000 2601) // SP offset is unknown. We can use the base pointer if we have one and
+f2c22050e8211 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Francis Visoiu Mistrih 2018-04-10 11:29:40 +0000 2602) // FP is not preferred. If not, we're stuck with using FP.
+f2c22050e8211 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Francis Visoiu Mistrih 2018-04-10 11:29:40 +0000 2603) bool CanUseBP = RegInfo->hasBasePointer(MF);
+f2c22050e8211 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Francis Visoiu Mistrih 2018-04-10 11:29:40 +0000 2604) if (FPOffsetFits && CanUseBP) // Both are ok. Pick the best.
+f2c22050e8211 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Francis Visoiu Mistrih 2018-04-10 11:29:40 +0000 2605) UseFP = PreferFP;
+a8f4f85d84c17 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-07-13 17:19:04 +0100 2606) else if (!CanUseBP) // Can't use BP. Forced to use FP.
+f2c22050e8211 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Francis Visoiu Mistrih 2018-04-10 11:29:40 +0000 2607) UseFP = true;
+f2c22050e8211 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Francis Visoiu Mistrih 2018-04-10 11:29:40 +0000 2608) // else we can use BP and FP, but the offset from FP won't fit.
+f2c22050e8211 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Francis Visoiu Mistrih 2018-04-10 11:29:40 +0000 2609) // That will make us scavenge registers which we can probably avoid by
+f2c22050e8211 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Francis Visoiu Mistrih 2018-04-10 11:29:40 +0000 2610) // using BP. If it won't fit for BP either, we'll scavenge anyway.
+6463922e3a9e2 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Francis Visoiu Mistrih 2018-04-11 12:36:55 +0000 2611) } else if (FPOffset >= 0) {
+f2c22050e8211 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Francis Visoiu Mistrih 2018-04-10 11:29:40 +0000 2612) // Use SP or FP, whichever gives us the best chance of the offset
+f2c22050e8211 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Francis Visoiu Mistrih 2018-04-10 11:29:40 +0000 2613) // being in range for direct access. If the FPOffset is positive,
+f2c22050e8211 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Francis Visoiu Mistrih 2018-04-10 11:29:40 +0000 2614) // that'll always be best, as the SP will be even further away.
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2615) UseFP = true;
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 2616) } else if (MF.hasEHFunclets() && !RegInfo->hasBasePointer(MF)) {
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 2617) // Funclets access the locals contained in the parent's stack frame
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 2618) // via the frame pointer, so we have to use the FP in the parent
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 2619) // function.
+dc1e778369f14 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Mandeep Singh Grang 2019-02-01 23:42:34 +0000 2620) (void) Subtarget;
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 2621) assert(
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 2622) Subtarget.isCallingConvWin64(MF.getFunction().getCallingConv()) &&
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 2623) "Funclets should only be present on Win64");
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 2624) UseFP = true;
+f2c22050e8211 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Francis Visoiu Mistrih 2018-04-10 11:29:40 +0000 2625) } else {
+f2c22050e8211 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Francis Visoiu Mistrih 2018-04-10 11:29:40 +0000 2626) // We have the choice between FP and (SP or BP).
+f2c22050e8211 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Francis Visoiu Mistrih 2018-04-10 11:29:40 +0000 2627) if (FPOffsetFits && PreferFP) // If FP is the best fit, use it.
+f2c22050e8211 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Francis Visoiu Mistrih 2018-04-10 11:29:40 +0000 2628) UseFP = true;
+f2c22050e8211 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Francis Visoiu Mistrih 2018-04-10 11:29:40 +0000 2629) }
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2630) }
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2631) }
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2632)
+a9968c0a339ab llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tomas Matheson 2021-03-15 13:01:34 +0000 2633) assert(
+a9968c0a339ab llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tomas Matheson 2021-03-15 13:01:34 +0000 2634) ((isFixed || isCSR) || !RegInfo->hasStackRealignment(MF) || !UseFP) &&
+a9968c0a339ab llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tomas Matheson 2021-03-15 13:01:34 +0000 2635) "In the presence of dynamic stack pointer realignment, "
+a9968c0a339ab llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tomas Matheson 2021-03-15 13:01:34 +0000 2636) "non-argument/CSR objects cannot be accessed through the frame pointer");
+17cb8982f4ac4 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2015-04-09 08:49:47 +0000 2637)
+7774812965027 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-14 13:11:34 +0000 2638) if (isSVE) {
+73b6cb67dcdad llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-11-03 16:44:20 +0000 2639) StackOffset FPOffset =
+73b6cb67dcdad llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-11-03 16:44:20 +0000 2640) StackOffset::get(-AFI->getCalleeSaveBaseToFrameRecordOffset(), ObjectOffset);
+73b6cb67dcdad llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-11-03 16:44:20 +0000 2641) StackOffset SPOffset =
+73b6cb67dcdad llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-11-03 16:44:20 +0000 2642) SVEStackSize +
+73b6cb67dcdad llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-11-03 16:44:20 +0000 2643) StackOffset::get(MFI.getStackSize() - AFI->getCalleeSavedStackSize(),
+73b6cb67dcdad llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-11-03 16:44:20 +0000 2644) ObjectOffset);
+7774812965027 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-14 13:11:34 +0000 2645) // Always use the FP for SVE spills if available and beneficial.
+a9968c0a339ab llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tomas Matheson 2021-03-15 13:01:34 +0000 2646) if (hasFP(MF) && (SPOffset.getFixed() ||
+a9968c0a339ab llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tomas Matheson 2021-03-15 13:01:34 +0000 2647) FPOffset.getScalable() < SPOffset.getScalable() ||
+a9968c0a339ab llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tomas Matheson 2021-03-15 13:01:34 +0000 2648) RegInfo->hasStackRealignment(MF))) {
+7774812965027 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-14 13:11:34 +0000 2649) FrameReg = RegInfo->getFrameRegister(MF);
+7774812965027 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-14 13:11:34 +0000 2650) return FPOffset;
+7774812965027 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-14 13:11:34 +0000 2651) }
+7774812965027 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-14 13:11:34 +0000 2652)
+7774812965027 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-14 13:11:34 +0000 2653) FrameReg = RegInfo->hasBasePointer(MF) ? RegInfo->getBaseRegister()
+7774812965027 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-14 13:11:34 +0000 2654) : (unsigned)AArch64::SP;
+7774812965027 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-14 13:11:34 +0000 2655) return SPOffset;
+7774812965027 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-14 13:11:34 +0000 2656) }
+7774812965027 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-14 13:11:34 +0000 2657)
+7774812965027 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-14 13:11:34 +0000 2658) StackOffset ScalableOffset = {};
+7774812965027 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-14 13:11:34 +0000 2659) if (UseFP && !(isFixed || isCSR))
+7774812965027 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-14 13:11:34 +0000 2660) ScalableOffset = -SVEStackSize;
+7774812965027 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-14 13:11:34 +0000 2661) if (!UseFP && (isFixed || isCSR))
+7774812965027 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-14 13:11:34 +0000 2662) ScalableOffset = SVEStackSize;
+7774812965027 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-14 13:11:34 +0000 2663)
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2664) if (UseFP) {
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2665) FrameReg = RegInfo->getFrameRegister(MF);
+73b6cb67dcdad llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-11-03 16:44:20 +0000 2666) return StackOffset::getFixed(FPOffset) + ScalableOffset;
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2667) }
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2668)
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2669) // Use the base pointer if we have one.
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2670) if (RegInfo->hasBasePointer(MF))
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2671) FrameReg = RegInfo->getBaseRegister();
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2672) else {
+f2c22050e8211 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Francis Visoiu Mistrih 2018-04-10 11:29:40 +0000 2673) assert(!MFI.hasVarSizedObjects() &&
+f2c22050e8211 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Francis Visoiu Mistrih 2018-04-10 11:29:40 +0000 2674) "Can't use SP when we have var sized objects.");
+3b0846e8f7689 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2014-05-24 12:50:23 +0000 2675) FrameReg = AArch64::SP;
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2676) // If we're using the red zone for this function, the SP won't actually
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2677) // be adjusted, so the offsets will be negative. They're also all
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2678) // within range of the signed 9-bit immediate instructions.
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2679) if (canUseRedZone(MF))
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2680) Offset -= AFI->getLocalStackSize();
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2681) }
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2682)
+73b6cb67dcdad llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-11-03 16:44:20 +0000 2683) return StackOffset::getFixed(Offset) + ScalableOffset;
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2684) }
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2685)
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2686) static unsigned getPrologueDeath(MachineFunction &MF, unsigned Reg) {
+74a0bd319ad9a llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2016-04-13 21:43:16 +0000 2687) // Do not set a kill flag on values that are also marked as live-in. This
+74a0bd319ad9a llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2016-04-13 21:43:16 +0000 2688) // happens with the @llvm-returnaddress intrinsic and with arguments passed in
+74a0bd319ad9a llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2016-04-13 21:43:16 +0000 2689) // callee saved registers.
+74a0bd319ad9a llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2016-04-13 21:43:16 +0000 2690) // Omitting the kill flags is conservatively correct even if the live-in
+74a0bd319ad9a llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2016-04-13 21:43:16 +0000 2691) // is not used after all.
+74a0bd319ad9a llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2016-04-13 21:43:16 +0000 2692) bool IsLiveIn = MF.getRegInfo().isLiveIn(Reg);
+74a0bd319ad9a llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2016-04-13 21:43:16 +0000 2693) return getKillRegState(!IsLiveIn);
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2694) }
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2695)
+5751814edada5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Manman Ren 2016-04-11 21:08:06 +0000 2696) static bool produceCompactUnwindFrame(MachineFunction &MF) {
+5751814edada5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Manman Ren 2016-04-11 21:08:06 +0000 2697) const AArch64Subtarget &Subtarget = MF.getSubtarget<AArch64Subtarget>();
+f1caa2833f505 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2017-12-15 22:22:58 +0000 2698) AttributeList Attrs = MF.getFunction().getAttributes();
+5751814edada5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Manman Ren 2016-04-11 21:08:06 +0000 2699) return Subtarget.isTargetMachO() &&
+5751814edada5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Manman Ren 2016-04-11 21:08:06 +0000 2700) !(Subtarget.getTargetLowering()->supportSwiftError() &&
+82a0e808bb2cd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2020-11-19 12:32:50 +0000 2701) Attrs.hasAttrSomewhere(Attribute::SwiftError)) &&
+82a0e808bb2cd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2020-11-19 12:32:50 +0000 2702) MF.getFunction().getCallingConv() != CallingConv::SwiftTail;
+5751814edada5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Manman Ren 2016-04-11 21:08:06 +0000 2703) }
+5751814edada5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Manman Ren 2016-04-11 21:08:06 +0000 2704)
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 2705) static bool invalidateWindowsRegisterPairing(unsigned Reg1, unsigned Reg2,
+49510c50200cf llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (John Brawn 2021-11-05 10:11:00 +0000 2706) bool NeedsWinCFI, bool IsFirst,
+49510c50200cf llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (John Brawn 2021-11-05 10:11:00 +0000 2707) const TargetRegisterInfo *TRI) {
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 2708) // If we are generating register pairs for a Windows function that requires
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 2709) // EH support, then pair consecutive registers only. There are no unwind
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 2710) // opcodes for saves/restores of non-consectuve register pairs.
+890af2f003c83 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:26:45 +0300 2711) // The unwind opcodes are save_regp, save_regp_x, save_fregp, save_frepg_x,
+890af2f003c83 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:26:45 +0300 2712) // save_lrpair.
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 2713) // https://docs.microsoft.com/en-us/cpp/build/arm64-exception-handling
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 2714)
+1cc8fff420a76 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanne Wouda 2020-01-14 13:16:57 +0000 2715) if (Reg2 == AArch64::FP)
+1cc8fff420a76 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanne Wouda 2020-01-14 13:16:57 +0000 2716) return true;
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 2717) if (!NeedsWinCFI)
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 2718) return false;
+49510c50200cf llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (John Brawn 2021-11-05 10:11:00 +0000 2719) if (TRI->getEncodingValue(Reg2) == TRI->getEncodingValue(Reg1) + 1)
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 2720) return false;
+890af2f003c83 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:26:45 +0300 2721) // If pairing a GPR with LR, the pair can be described by the save_lrpair
+890af2f003c83 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:26:45 +0300 2722) // opcode. If this is the first register pair, it would end up with a
+890af2f003c83 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:26:45 +0300 2723) // predecrement, but there's no save_lrpair_x opcode, so we can only do this
+890af2f003c83 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:26:45 +0300 2724) // if LR is paired with something else than the first register.
+890af2f003c83 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:26:45 +0300 2725) // The save_lrpair opcode requires the first register to be an odd one.
+890af2f003c83 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:26:45 +0300 2726) if (Reg1 >= AArch64::X19 && Reg1 <= AArch64::X27 &&
+890af2f003c83 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:26:45 +0300 2727) (Reg1 - AArch64::X19) % 2 == 0 && Reg2 == AArch64::LR && !IsFirst)
+890af2f003c83 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:26:45 +0300 2728) return false;
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 2729) return true;
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 2730) }
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 2731)
+f28e1128d9efb llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-08-16 15:42:28 +0000 2732) /// Returns true if Reg1 and Reg2 cannot be paired using a ldp/stp instruction.
+f28e1128d9efb llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-08-16 15:42:28 +0000 2733) /// WindowsCFI requires that only consecutive registers can be paired.
+f28e1128d9efb llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-08-16 15:42:28 +0000 2734) /// LR and FP need to be allocated together when the frame needs to save
+f28e1128d9efb llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-08-16 15:42:28 +0000 2735) /// the frame-record. This means any other register pairing with LR is invalid.
+f28e1128d9efb llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-08-16 15:42:28 +0000 2736) static bool invalidateRegisterPairing(unsigned Reg1, unsigned Reg2,
+890af2f003c83 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:26:45 +0300 2737) bool UsesWinAAPCS, bool NeedsWinCFI,
+49510c50200cf llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (John Brawn 2021-11-05 10:11:00 +0000 2738) bool NeedsFrameRecord, bool IsFirst,
+49510c50200cf llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (John Brawn 2021-11-05 10:11:00 +0000 2739) const TargetRegisterInfo *TRI) {
+1cc8fff420a76 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanne Wouda 2020-01-14 13:16:57 +0000 2740) if (UsesWinAAPCS)
+49510c50200cf llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (John Brawn 2021-11-05 10:11:00 +0000 2741) return invalidateWindowsRegisterPairing(Reg1, Reg2, NeedsWinCFI, IsFirst,
+49510c50200cf llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (John Brawn 2021-11-05 10:11:00 +0000 2742) TRI);
+f28e1128d9efb llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-08-16 15:42:28 +0000 2743)
+f28e1128d9efb llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-08-16 15:42:28 +0000 2744) // If we need to store the frame record, don't pair any register
+f28e1128d9efb llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-08-16 15:42:28 +0000 2745) // with LR other than FP.
+f28e1128d9efb llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-08-16 15:42:28 +0000 2746) if (NeedsFrameRecord)
+f28e1128d9efb llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-08-16 15:42:28 +0000 2747) return Reg2 == AArch64::LR;
+f28e1128d9efb llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-08-16 15:42:28 +0000 2748)
+f28e1128d9efb llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-08-16 15:42:28 +0000 2749) return false;
+f28e1128d9efb llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-08-16 15:42:28 +0000 2750) }
+f28e1128d9efb llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-08-16 15:42:28 +0000 2751)
+b7d3311c77f57 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Benjamin Kramer 2016-08-06 11:13:10 +0000 2752) namespace {
+11f6907f408ac llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eugene Zelenko 2017-01-25 00:29:26 +0000 2753)
+29d4a695f45a7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-01 19:07:06 +0000 2754) struct RegPairInfo {
+11f6907f408ac llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eugene Zelenko 2017-01-25 00:29:26 +0000 2755) unsigned Reg1 = AArch64::NoRegister;
+11f6907f408ac llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eugene Zelenko 2017-01-25 00:29:26 +0000 2756) unsigned Reg2 = AArch64::NoRegister;
+29d4a695f45a7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-01 19:07:06 +0000 2757) int FrameIdx;
+29d4a695f45a7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-01 19:07:06 +0000 2758) int Offset;
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2759) enum RegType { GPR, FPR64, FPR128, PPR, ZPR } Type;
+11f6907f408ac llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eugene Zelenko 2017-01-25 00:29:26 +0000 2760)
+11f6907f408ac llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eugene Zelenko 2017-01-25 00:29:26 +0000 2761) RegPairInfo() = default;
+11f6907f408ac llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eugene Zelenko 2017-01-25 00:29:26 +0000 2762)
+c25d3bd23860c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-12 16:31:41 +0000 2763) bool isPaired() const { return Reg2 != AArch64::NoRegister; }
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2764)
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2765) unsigned getScale() const {
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2766) switch (Type) {
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2767) case PPR:
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2768) return 2;
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2769) case GPR:
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2770) case FPR64:
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2771) return 8;
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2772) case ZPR:
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2773) case FPR128:
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2774) return 16;
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2775) }
+b47c7cd4d6a13 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Simon Pilgrim 2019-11-11 11:18:44 +0000 2776) llvm_unreachable("Unsupported type");
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2777) }
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2778)
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2779) bool isScalable() const { return Type == PPR || Type == ZPR; }
+29d4a695f45a7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-01 19:07:06 +0000 2780) };
+11f6907f408ac llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eugene Zelenko 2017-01-25 00:29:26 +0000 2781)
+b7d3311c77f57 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Benjamin Kramer 2016-08-06 11:13:10 +0000 2782) } // end anonymous namespace
+29d4a695f45a7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-01 19:07:06 +0000 2783)
+c25d3bd23860c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-12 16:31:41 +0000 2784) static void computeCalleeSaveRegisterPairs(
+e4230a9f6c518 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Benjamin Kramer 2020-02-08 12:14:37 +0100 2785) MachineFunction &MF, ArrayRef<CalleeSavedInfo> CSI,
+f11eb3ebe7772 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Peter Collingbourne 2018-04-04 21:55:44 +0000 2786) const TargetRegisterInfo *TRI, SmallVectorImpl<RegPairInfo> &RegPairs,
+20a093e2bc310 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-25 10:50:02 +0000 2787) bool NeedsFrameRecord) {
+29d4a695f45a7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-01 19:07:06 +0000 2788)
+c25d3bd23860c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-12 16:31:41 +0000 2789) if (CSI.empty())
+c25d3bd23860c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-12 16:31:41 +0000 2790) return;
+775aaeb7656dc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2015-11-05 21:54:58 +0000 2791)
+1cc8fff420a76 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanne Wouda 2020-01-14 13:16:57 +0000 2792) bool IsWindows = isTargetWindows(MF);
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 2793) bool NeedsWinCFI = needsWinCFI(MF);
+c25d3bd23860c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-12 16:31:41 +0000 2794) AArch64FunctionInfo *AFI = MF.getInfo<AArch64FunctionInfo>();
+941a705b7bf15 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2016-07-28 18:40:00 +0000 2795) MachineFrameInfo &MFI = MF.getFrameInfo();
+f1caa2833f505 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2017-12-15 22:22:58 +0000 2796) CallingConv::ID CC = MF.getFunction().getCallingConv();
+c25d3bd23860c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-12 16:31:41 +0000 2797) unsigned Count = CSI.size();
+2792b3f02f13e llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Roman Levenstein 2016-03-10 04:35:09 +0000 2798) (void)CC;
+c25d3bd23860c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-12 16:31:41 +0000 2799) // MachO's compact unwind format relies on all registers being stored in
+c25d3bd23860c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-12 16:31:41 +0000 2800) // pairs.
+71aecbb75c7d8 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Vladislav Dzhidzhoev 2022-07-27 23:54:56 +0300 2801) assert((!produceCompactUnwindFrame(MF) || CC == CallingConv::PreserveMost ||
+d75e70d7ae1f8 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Daniel Kiss 2023-04-28 14:01:51 +0200 2802) CC == CallingConv::PreserveAll || CC == CallingConv::CXX_FAST_TLS ||
+d75e70d7ae1f8 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Daniel Kiss 2023-04-28 14:01:51 +0200 2803) CC == CallingConv::Win64 || (Count & 1) == 0) &&
+c25d3bd23860c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-12 16:31:41 +0000 2804) "Odd number of callee-saved regs to spill!");
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2805) int ByteOffset = AFI->getCalleeSavedStackSize();
+3780a4e568ac7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:14:05 +0300 2806) int StackFillDir = -1;
+3780a4e568ac7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:14:05 +0300 2807) int RegInc = 1;
+3780a4e568ac7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:14:05 +0300 2808) unsigned FirstReg = 0;
+3780a4e568ac7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:14:05 +0300 2809) if (NeedsWinCFI) {
+3780a4e568ac7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:14:05 +0300 2810) // For WinCFI, fill the stack from the bottom up.
+3780a4e568ac7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:14:05 +0300 2811) ByteOffset = 0;
+3780a4e568ac7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:14:05 +0300 2812) StackFillDir = 1;
+3780a4e568ac7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:14:05 +0300 2813) // As the CSI array is reversed to match PrologEpilogInserter, iterate
+3780a4e568ac7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:14:05 +0300 2814) // backwards, to pair up registers starting from lower numbered registers.
+3780a4e568ac7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:14:05 +0300 2815) RegInc = -1;
+3780a4e568ac7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:14:05 +0300 2816) FirstReg = Count - 1;
+3780a4e568ac7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:14:05 +0300 2817) }
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2818) int ScalableByteOffset = AFI->getSVECalleeSavedStackSize();
+82a0e808bb2cd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2020-11-19 12:32:50 +0000 2819) bool NeedGapToAlignStack = AFI->hasCalleeSaveStackFreeSpace();
+bb3344c7d8c27 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-08-04 11:10:32 +0100 2820)
+3780a4e568ac7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:14:05 +0300 2821) // When iterating backwards, the loop condition relies on unsigned wraparound.
+3780a4e568ac7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:14:05 +0300 2822) for (unsigned i = FirstReg; i < Count; i += RegInc) {
+29d4a695f45a7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-01 19:07:06 +0000 2823) RegPairInfo RPI;
+c25d3bd23860c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-12 16:31:41 +0000 2824) RPI.Reg1 = CSI[i].getReg();
+c25d3bd23860c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-12 16:31:41 +0000 2825)
+7140363cd0122 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 09:44:46 +0000 2826) if (AArch64::GPR64RegClass.contains(RPI.Reg1))
+7140363cd0122 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 09:44:46 +0000 2827) RPI.Type = RegPairInfo::GPR;
+7140363cd0122 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 09:44:46 +0000 2828) else if (AArch64::FPR64RegClass.contains(RPI.Reg1))
+7140363cd0122 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 09:44:46 +0000 2829) RPI.Type = RegPairInfo::FPR64;
+2d77e788f2fd5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 12:10:22 +0000 2830) else if (AArch64::FPR128RegClass.contains(RPI.Reg1))
+2d77e788f2fd5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 12:10:22 +0000 2831) RPI.Type = RegPairInfo::FPR128;
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2832) else if (AArch64::ZPRRegClass.contains(RPI.Reg1))
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2833) RPI.Type = RegPairInfo::ZPR;
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2834) else if (AArch64::PPRRegClass.contains(RPI.Reg1))
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2835) RPI.Type = RegPairInfo::PPR;
+7140363cd0122 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 09:44:46 +0000 2836) else
+7140363cd0122 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 09:44:46 +0000 2837) llvm_unreachable("Unsupported register class.");
+c25d3bd23860c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-12 16:31:41 +0000 2838)
+c25d3bd23860c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-12 16:31:41 +0000 2839) // Add the next reg to the pair if it is in the same register class.
+3780a4e568ac7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:14:05 +0300 2840) if (unsigned(i + RegInc) < Count) {
+d6b0734837124 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Jim Lin 2022-01-19 17:25:52 +0800 2841) Register NextReg = CSI[i + RegInc].getReg();
+890af2f003c83 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:26:45 +0300 2842) bool IsFirst = i == FirstReg;
+7140363cd0122 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 09:44:46 +0000 2843) switch (RPI.Type) {
+7140363cd0122 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 09:44:46 +0000 2844) case RegPairInfo::GPR:
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 2845) if (AArch64::GPR64RegClass.contains(NextReg) &&
+890af2f003c83 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:26:45 +0300 2846) !invalidateRegisterPairing(RPI.Reg1, NextReg, IsWindows,
+49510c50200cf llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (John Brawn 2021-11-05 10:11:00 +0000 2847) NeedsWinCFI, NeedsFrameRecord, IsFirst,
+49510c50200cf llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (John Brawn 2021-11-05 10:11:00 +0000 2848) TRI))
+7140363cd0122 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 09:44:46 +0000 2849) RPI.Reg2 = NextReg;
+7140363cd0122 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 09:44:46 +0000 2850) break;
+7140363cd0122 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 09:44:46 +0000 2851) case RegPairInfo::FPR64:
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 2852) if (AArch64::FPR64RegClass.contains(NextReg) &&
+890af2f003c83 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:26:45 +0300 2853) !invalidateWindowsRegisterPairing(RPI.Reg1, NextReg, NeedsWinCFI,
+49510c50200cf llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (John Brawn 2021-11-05 10:11:00 +0000 2854) IsFirst, TRI))
+7140363cd0122 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 09:44:46 +0000 2855) RPI.Reg2 = NextReg;
+7140363cd0122 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 09:44:46 +0000 2856) break;
+2d77e788f2fd5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 12:10:22 +0000 2857) case RegPairInfo::FPR128:
+2d77e788f2fd5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 12:10:22 +0000 2858) if (AArch64::FPR128RegClass.contains(NextReg))
+2d77e788f2fd5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 12:10:22 +0000 2859) RPI.Reg2 = NextReg;
+2d77e788f2fd5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 12:10:22 +0000 2860) break;
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2861) case RegPairInfo::PPR:
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2862) case RegPairInfo::ZPR:
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2863) break;
+7140363cd0122 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 09:44:46 +0000 2864) }
+c25d3bd23860c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-12 16:31:41 +0000 2865) }
+29d4a695f45a7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-01 19:07:06 +0000 2866)
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2867) // GPRs and FPRs are saved in pairs of 64-bit regs. We expect the CSI
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2868) // list to come in sorted by frame index so that we can issue the store
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2869) // pair instructions directly. Assert if we see anything otherwise.
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2870) //
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2871) // The order of the registers in the list is controlled by
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2872) // getCalleeSavedRegs(), so they will always be in-order, as well.
+c25d3bd23860c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-12 16:31:41 +0000 2873) assert((!RPI.isPaired() ||
+3780a4e568ac7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:14:05 +0300 2874) (CSI[i].getFrameIdx() + RegInc == CSI[i + RegInc].getFrameIdx())) &&
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 2875) "Out of order callee saved regs!");
+c25d3bd23860c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-12 16:31:41 +0000 2876)
+f28e1128d9efb llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-08-16 15:42:28 +0000 2877) assert((!RPI.isPaired() || !NeedsFrameRecord || RPI.Reg2 != AArch64::FP ||
+f28e1128d9efb llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-08-16 15:42:28 +0000 2878) RPI.Reg1 == AArch64::LR) &&
+f28e1128d9efb llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-08-16 15:42:28 +0000 2879) "FrameRecord must be allocated together with LR");
+f28e1128d9efb llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-08-16 15:42:28 +0000 2880)
+1cc8fff420a76 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanne Wouda 2020-01-14 13:16:57 +0000 2881) // Windows AAPCS has FP and LR reversed.
+1cc8fff420a76 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanne Wouda 2020-01-14 13:16:57 +0000 2882) assert((!RPI.isPaired() || !NeedsFrameRecord || RPI.Reg1 != AArch64::FP ||
+1cc8fff420a76 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanne Wouda 2020-01-14 13:16:57 +0000 2883) RPI.Reg2 == AArch64::LR) &&
+1cc8fff420a76 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanne Wouda 2020-01-14 13:16:57 +0000 2884) "FrameRecord must be allocated together with LR");
+1cc8fff420a76 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanne Wouda 2020-01-14 13:16:57 +0000 2885)
+c25d3bd23860c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-12 16:31:41 +0000 2886) // MachO's compact unwind format relies on all registers being stored in
+c25d3bd23860c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-12 16:31:41 +0000 2887) // adjacent register pairs.
+71aecbb75c7d8 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Vladislav Dzhidzhoev 2022-07-27 23:54:56 +0300 2888) assert((!produceCompactUnwindFrame(MF) || CC == CallingConv::PreserveMost ||
+d75e70d7ae1f8 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Daniel Kiss 2023-04-28 14:01:51 +0200 2889) CC == CallingConv::PreserveAll || CC == CallingConv::CXX_FAST_TLS ||
+d75e70d7ae1f8 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Daniel Kiss 2023-04-28 14:01:51 +0200 2890) CC == CallingConv::Win64 ||
+c25d3bd23860c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-12 16:31:41 +0000 2891) (RPI.isPaired() &&
+c25d3bd23860c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-12 16:31:41 +0000 2892) ((RPI.Reg1 == AArch64::LR && RPI.Reg2 == AArch64::FP) ||
+c25d3bd23860c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-12 16:31:41 +0000 2893) RPI.Reg1 + 1 == RPI.Reg2))) &&
+c25d3bd23860c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-12 16:31:41 +0000 2894) "Callee-save registers not saved as adjacent register pair!");
+c25d3bd23860c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-12 16:31:41 +0000 2895)
+c25d3bd23860c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-12 16:31:41 +0000 2896) RPI.FrameIdx = CSI[i].getFrameIdx();
+3780a4e568ac7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:14:05 +0300 2897) if (NeedsWinCFI &&
+3780a4e568ac7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:14:05 +0300 2898) RPI.isPaired()) // RPI.FrameIdx must be the lower index of the pair
+3780a4e568ac7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:14:05 +0300 2899) RPI.FrameIdx = CSI[i + RegInc].getFrameIdx();
+c25d3bd23860c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-12 16:31:41 +0000 2900)
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2901) int Scale = RPI.getScale();
+3780a4e568ac7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:14:05 +0300 2902)
+3780a4e568ac7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:14:05 +0300 2903) int OffsetPre = RPI.isScalable() ? ScalableByteOffset : ByteOffset;
+3780a4e568ac7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:14:05 +0300 2904) assert(OffsetPre % Scale == 0);
+3780a4e568ac7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:14:05 +0300 2905)
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2906) if (RPI.isScalable())
+3780a4e568ac7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:14:05 +0300 2907) ScalableByteOffset += StackFillDir * Scale;
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2908) else
+3780a4e568ac7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:14:05 +0300 2909) ByteOffset += StackFillDir * (RPI.isPaired() ? 2 * Scale : Scale);
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2910)
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 2911) // Swift's async context is directly before FP, so allocate an extra
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 2912) // 8 bytes for it.
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 2913) if (NeedsFrameRecord && AFI->hasSwiftAsyncContext() &&
+a90228b911d3c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hiroshi Yamauchi 2023-07-26 16:58:00 -0700 2914) ((!IsWindows && RPI.Reg2 == AArch64::FP) ||
+a90228b911d3c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hiroshi Yamauchi 2023-07-26 16:58:00 -0700 2915) (IsWindows && RPI.Reg2 == AArch64::LR)))
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 2916) ByteOffset += StackFillDir * 8;
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 2917)
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2918) assert(!(RPI.isScalable() && RPI.isPaired()) &&
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2919) "Paired spill/fill instructions don't exist for SVE vectors");
+2d77e788f2fd5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 12:10:22 +0000 2920)
+2d77e788f2fd5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 12:10:22 +0000 2921) // Round up size of non-pair to pair size if we need to pad the
+2d77e788f2fd5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 12:10:22 +0000 2922) // callee-save area to ensure 16-byte alignment.
+82a0e808bb2cd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2020-11-19 12:32:50 +0000 2923) if (NeedGapToAlignStack && !NeedsWinCFI &&
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2924) !RPI.isScalable() && RPI.Type != RegPairInfo::FPR128 &&
+82a0e808bb2cd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2020-11-19 12:32:50 +0000 2925) !RPI.isPaired() && ByteOffset % 16 != 0) {
+3780a4e568ac7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:14:05 +0300 2926) ByteOffset += 8 * StackFillDir;
+1dffa2550b535 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Guillaume Chatelet 2020-04-01 13:49:04 +0000 2927) assert(MFI.getObjectAlign(RPI.FrameIdx) <= Align(16));
+3780a4e568ac7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:14:05 +0300 2928) // A stack frame with a gap looks like this, bottom up:
+3780a4e568ac7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:14:05 +0300 2929) // d9, d8. x21, gap, x20, x19.
+82a0e808bb2cd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2020-11-19 12:32:50 +0000 2930) // Set extra alignment on the x21 object to create the gap above it.
+1dffa2550b535 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Guillaume Chatelet 2020-04-01 13:49:04 +0000 2931) MFI.setObjectAlignment(RPI.FrameIdx, Align(16));
+82a0e808bb2cd llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2020-11-19 12:32:50 +0000 2932) NeedGapToAlignStack = false;
+2d77e788f2fd5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 12:10:22 +0000 2933) }
+2d77e788f2fd5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 12:10:22 +0000 2934)
+3780a4e568ac7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:14:05 +0300 2935) int OffsetPost = RPI.isScalable() ? ScalableByteOffset : ByteOffset;
+3780a4e568ac7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:14:05 +0300 2936) assert(OffsetPost % Scale == 0);
+3780a4e568ac7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:14:05 +0300 2937) // If filling top down (default), we want the offset after incrementing it.
+cd09089549562 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2023-08-19 00:28:19 +0300 2938) // If filling bottom up (WinCFI) we need the original offset.
+3780a4e568ac7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:14:05 +0300 2939) int Offset = NeedsWinCFI ? OffsetPre : OffsetPost;
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 2940)
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 2941) // The FP, LR pair goes 8 bytes into our expanded 24-byte slot so that the
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 2942) // Swift context can directly precede FP.
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 2943) if (NeedsFrameRecord && AFI->hasSwiftAsyncContext() &&
+a90228b911d3c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hiroshi Yamauchi 2023-07-26 16:58:00 -0700 2944) ((!IsWindows && RPI.Reg2 == AArch64::FP) ||
+a90228b911d3c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hiroshi Yamauchi 2023-07-26 16:58:00 -0700 2945) (IsWindows && RPI.Reg2 == AArch64::LR)))
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 2946) Offset += 8;
+2d77e788f2fd5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 12:10:22 +0000 2947) RPI.Offset = Offset / Scale;
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2948)
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2949) assert(((!RPI.isScalable() && RPI.Offset >= -64 && RPI.Offset <= 63) ||
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 2950) (RPI.isScalable() && RPI.Offset >= -256 && RPI.Offset <= 255)) &&
+29d4a695f45a7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-01 19:07:06 +0000 2951) "Offset out of bounds for LDP/STP immediate");
+29d4a695f45a7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-01 19:07:06 +0000 2952)
+5987da8764b71 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Owen Anderson 2020-09-01 19:25:30 +0000 2953) // Save the offset to frame record so that the FP register can point to the
+5987da8764b71 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Owen Anderson 2020-09-01 19:25:30 +0000 2954) // innermost frame record (spilled FP and LR registers).
+5987da8764b71 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Owen Anderson 2020-09-01 19:25:30 +0000 2955) if (NeedsFrameRecord && ((!IsWindows && RPI.Reg1 == AArch64::LR &&
+5987da8764b71 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Owen Anderson 2020-09-01 19:25:30 +0000 2956) RPI.Reg2 == AArch64::FP) ||
+5987da8764b71 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Owen Anderson 2020-09-01 19:25:30 +0000 2957) (IsWindows && RPI.Reg1 == AArch64::FP &&
+5987da8764b71 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Owen Anderson 2020-09-01 19:25:30 +0000 2958) RPI.Reg2 == AArch64::LR)))
+5987da8764b71 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Owen Anderson 2020-09-01 19:25:30 +0000 2959) AFI->setCalleeSaveBaseToFrameRecordOffset(Offset);
+5987da8764b71 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Owen Anderson 2020-09-01 19:25:30 +0000 2960)
+29d4a695f45a7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-01 19:07:06 +0000 2961) RegPairs.push_back(RPI);
+c25d3bd23860c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-12 16:31:41 +0000 2962) if (RPI.isPaired())
+3780a4e568ac7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:14:05 +0300 2963) i += RegInc;
+3780a4e568ac7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:14:05 +0300 2964) }
+3780a4e568ac7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:14:05 +0300 2965) if (NeedsWinCFI) {
+3780a4e568ac7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:14:05 +0300 2966) // If we need an alignment gap in the stack, align the topmost stack
+3780a4e568ac7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:14:05 +0300 2967) // object. A stack frame with a gap looks like this, bottom up:
+3780a4e568ac7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:14:05 +0300 2968) // x19, d8. d9, gap.
+3780a4e568ac7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:14:05 +0300 2969) // Set extra alignment on the topmost stack object (the first element in
+3780a4e568ac7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:14:05 +0300 2970) // CSI, which goes top down), to create the gap above it.
+3780a4e568ac7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:14:05 +0300 2971) if (AFI->hasCalleeSaveStackFreeSpace())
+3780a4e568ac7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:14:05 +0300 2972) MFI.setObjectAlignment(CSI[0].getFrameIdx(), Align(16));
+3780a4e568ac7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:14:05 +0300 2973) // We iterated bottom up over the registers; flip RegPairs back to top
+3780a4e568ac7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:14:05 +0300 2974) // down order.
+3780a4e568ac7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:14:05 +0300 2975) std::reverse(RegPairs.begin(), RegPairs.end());
+29d4a695f45a7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-01 19:07:06 +0000 2976) }
+29d4a695f45a7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-01 19:07:06 +0000 2977) }
+29d4a695f45a7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-01 19:07:06 +0000 2978)
+29d4a695f45a7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-01 19:07:06 +0000 2979) bool AArch64FrameLowering::spillCalleeSavedRegisters(
+29d4a695f45a7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-01 19:07:06 +0000 2980) MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
+e4230a9f6c518 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Benjamin Kramer 2020-02-08 12:14:37 +0100 2981) ArrayRef<CalleeSavedInfo> CSI, const TargetRegisterInfo *TRI) const {
+29d4a695f45a7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-01 19:07:06 +0000 2982) MachineFunction &MF = *MBB.getParent();
+29d4a695f45a7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-01 19:07:06 +0000 2983) const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo();
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 2984) bool NeedsWinCFI = needsWinCFI(MF);
+29d4a695f45a7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-01 19:07:06 +0000 2985) DebugLoc DL;
+29d4a695f45a7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-01 19:07:06 +0000 2986) SmallVector<RegPairInfo, 8> RegPairs;
+29d4a695f45a7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-01 19:07:06 +0000 2987)
+20a093e2bc310 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-25 10:50:02 +0000 2988) computeCalleeSaveRegisterPairs(MF, CSI, TRI, RegPairs, hasFP(MF));
+f11eb3ebe7772 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Peter Collingbourne 2018-04-04 21:55:44 +0000 2989)
+20a093e2bc310 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-25 10:50:02 +0000 2990) const MachineRegisterInfo &MRI = MF.getRegInfo();
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 2991) if (homogeneousPrologEpilog(MF)) {
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 2992) auto MIB = BuildMI(MBB, MI, DL, TII.get(AArch64::HOM_Prolog))
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 2993) .setMIFlag(MachineInstr::FrameSetup);
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 2994)
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 2995) for (auto &RPI : RegPairs) {
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 2996) MIB.addReg(RPI.Reg1);
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 2997) MIB.addReg(RPI.Reg2);
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 2998)
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 2999) // Update register live in.
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 3000) if (!MRI.isReserved(RPI.Reg1))
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 3001) MBB.addLiveIn(RPI.Reg1);
+041a786c78fbc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Zhaoxuan Jiang 2023-10-17 14:34:04 +0800 3002) if (RPI.isPaired() && !MRI.isReserved(RPI.Reg2))
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 3003) MBB.addLiveIn(RPI.Reg2);
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 3004) }
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 3005) return true;
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 3006) }
+14d656b3d8057 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kazu Hirata 2021-11-06 13:08:21 -0700 3007) for (const RegPairInfo &RPI : llvm::reverse(RegPairs)) {
+29d4a695f45a7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-01 19:07:06 +0000 3008) unsigned Reg1 = RPI.Reg1;
+29d4a695f45a7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-01 19:07:06 +0000 3009) unsigned Reg2 = RPI.Reg2;
+29d4a695f45a7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-01 19:07:06 +0000 3010) unsigned StrOpc;
+29d4a695f45a7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-01 19:07:06 +0000 3011)
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 3012) // Issue sequence of spills for cs regs. The first spill may be converted
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 3013) // to a pre-decrement store later by emitPrologue if the callee-save stack
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 3014) // area allocation can't be combined with the local stack area allocation.
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 3015) // For example:
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 3016) // stp x22, x21, [sp, #0] // addImm(+0)
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 3017) // stp x20, x19, [sp, #16] // addImm(+2)
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 3018) // stp fp, lr, [sp, #32] // addImm(+4)
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 3019) // Rationale: This sequence saves uop updates compared to a sequence of
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 3020) // pre-increment spills like stp xi,xj,[sp,#-16]!
+29d4a695f45a7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-01 19:07:06 +0000 3021) // Note: Similar rationale and sequence for restores in epilog.
+998118c3d3bd6 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Guillaume Chatelet 2020-03-31 12:55:24 +0000 3022) unsigned Size;
+998118c3d3bd6 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Guillaume Chatelet 2020-03-31 12:55:24 +0000 3023) Align Alignment;
+7140363cd0122 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 09:44:46 +0000 3024) switch (RPI.Type) {
+7140363cd0122 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 09:44:46 +0000 3025) case RegPairInfo::GPR:
+7140363cd0122 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 09:44:46 +0000 3026) StrOpc = RPI.isPaired() ? AArch64::STPXi : AArch64::STRXui;
+7140363cd0122 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 09:44:46 +0000 3027) Size = 8;
+998118c3d3bd6 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Guillaume Chatelet 2020-03-31 12:55:24 +0000 3028) Alignment = Align(8);
+7140363cd0122 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 09:44:46 +0000 3029) break;
+7140363cd0122 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 09:44:46 +0000 3030) case RegPairInfo::FPR64:
+7140363cd0122 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 09:44:46 +0000 3031) StrOpc = RPI.isPaired() ? AArch64::STPDi : AArch64::STRDui;
+7140363cd0122 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 09:44:46 +0000 3032) Size = 8;
+998118c3d3bd6 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Guillaume Chatelet 2020-03-31 12:55:24 +0000 3033) Alignment = Align(8);
+7140363cd0122 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 09:44:46 +0000 3034) break;
+2d77e788f2fd5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 12:10:22 +0000 3035) case RegPairInfo::FPR128:
+2d77e788f2fd5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 12:10:22 +0000 3036) StrOpc = RPI.isPaired() ? AArch64::STPQi : AArch64::STRQui;
+2d77e788f2fd5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 12:10:22 +0000 3037) Size = 16;
+998118c3d3bd6 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Guillaume Chatelet 2020-03-31 12:55:24 +0000 3038) Alignment = Align(16);
+2d77e788f2fd5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 12:10:22 +0000 3039) break;
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3040) case RegPairInfo::ZPR:
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3041) StrOpc = AArch64::STR_ZXI;
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3042) Size = 16;
+998118c3d3bd6 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Guillaume Chatelet 2020-03-31 12:55:24 +0000 3043) Alignment = Align(16);
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3044) break;
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3045) case RegPairInfo::PPR:
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3046) StrOpc = AArch64::STR_PXI;
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3047) Size = 2;
+998118c3d3bd6 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Guillaume Chatelet 2020-03-31 12:55:24 +0000 3048) Alignment = Align(2);
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3049) break;
+7140363cd0122 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 09:44:46 +0000 3050) }
+d34e60ca85325 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Nicola Zaghen 2018-05-14 12:53:11 +0000 3051) LLVM_DEBUG(dbgs() << "CSR spill: (" << printReg(Reg1, TRI);
+d34e60ca85325 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Nicola Zaghen 2018-05-14 12:53:11 +0000 3052) if (RPI.isPaired()) dbgs() << ", " << printReg(Reg2, TRI);
+d34e60ca85325 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Nicola Zaghen 2018-05-14 12:53:11 +0000 3053) dbgs() << ") -> fi#(" << RPI.FrameIdx;
+d34e60ca85325 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Nicola Zaghen 2018-05-14 12:53:11 +0000 3054) if (RPI.isPaired()) dbgs() << ", " << RPI.FrameIdx + 1;
+d34e60ca85325 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Nicola Zaghen 2018-05-14 12:53:11 +0000 3055) dbgs() << ")\n");
+29d4a695f45a7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-01 19:07:06 +0000 3056)
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 3057) assert((!NeedsWinCFI || !(Reg1 == AArch64::LR && Reg2 == AArch64::FP)) &&
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 3058) "Windows unwdinding requires a consecutive (FP,LR) pair");
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 3059) // Windows unwind codes require consecutive registers if registers are
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 3060) // paired. Make the switch here, so that the code below will save (x,x+1)
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 3061) // and not (x+1,x).
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 3062) unsigned FrameIdxReg1 = RPI.FrameIdx;
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 3063) unsigned FrameIdxReg2 = RPI.FrameIdx + 1;
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 3064) if (NeedsWinCFI && RPI.isPaired()) {
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 3065) std::swap(Reg1, Reg2);
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 3066) std::swap(FrameIdxReg1, FrameIdxReg2);
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 3067) }
+4a3ab28ac73ae llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-05-22 11:56:20 +0000 3068) MachineInstrBuilder MIB = BuildMI(MBB, MI, DL, TII.get(StrOpc));
+88c8c9847dcf2 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2017-05-27 03:38:02 +0000 3069) if (!MRI.isReserved(Reg1))
+88c8c9847dcf2 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2017-05-27 03:38:02 +0000 3070) MBB.addLiveIn(Reg1);
+c25d3bd23860c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-12 16:31:41 +0000 3071) if (RPI.isPaired()) {
+88c8c9847dcf2 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2017-05-27 03:38:02 +0000 3072) if (!MRI.isReserved(Reg2))
+88c8c9847dcf2 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2017-05-27 03:38:02 +0000 3073) MBB.addLiveIn(Reg2);
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 3074) MIB.addReg(Reg2, getPrologueDeath(MF, Reg2));
+c376406669d40 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-04-15 15:16:19 +0000 3075) MIB.addMemOperand(MF.getMachineMemOperand(
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 3076) MachinePointerInfo::getFixedStack(MF, FrameIdxReg2),
+998118c3d3bd6 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Guillaume Chatelet 2020-03-31 12:55:24 +0000 3077) MachineMemOperand::MOStore, Size, Alignment));
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 3078) }
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 3079) MIB.addReg(Reg1, getPrologueDeath(MF, Reg1))
+c25d3bd23860c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-12 16:31:41 +0000 3080) .addReg(AArch64::SP)
+7140363cd0122 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 09:44:46 +0000 3081) .addImm(RPI.Offset) // [sp, #offset*scale],
+7140363cd0122 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 09:44:46 +0000 3082) // where factor*scale is implicit
+c25d3bd23860c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-12 16:31:41 +0000 3083) .setMIFlag(MachineInstr::FrameSetup);
+c376406669d40 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-04-15 15:16:19 +0000 3084) MIB.addMemOperand(MF.getMachineMemOperand(
+998118c3d3bd6 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Guillaume Chatelet 2020-03-31 12:55:24 +0000 3085) MachinePointerInfo::getFixedStack(MF, FrameIdxReg1),
+998118c3d3bd6 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Guillaume Chatelet 2020-03-31 12:55:24 +0000 3086) MachineMemOperand::MOStore, Size, Alignment));
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 3087) if (NeedsWinCFI)
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 3088) InsertSEH(MIB, TII, MachineInstr::FrameSetup);
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 3089)
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3090) // Update the StackIDs of the SVE stack slots.
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3091) MachineFrameInfo &MFI = MF.getFrameInfo();
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3092) if (RPI.Type == RegPairInfo::ZPR || RPI.Type == RegPairInfo::PPR)
+914e2f5a02f4f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hsiangkai Wang 2021-01-12 16:19:37 +0800 3093) MFI.setStackID(RPI.FrameIdx, TargetStackID::ScalableVector);
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3094)
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 3095) }
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 3096) return true;
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 3097) }
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 3098)
+3b0846e8f7689 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2014-05-24 12:50:23 +0000 3099) bool AArch64FrameLowering::restoreCalleeSavedRegisters(
+17e85cd4109ca llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-24 18:36:37 +0000 3100) MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
+186dd63182718 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Benjamin Kramer 2020-02-29 09:50:23 +0100 3101) MutableArrayRef<CalleeSavedInfo> CSI, const TargetRegisterInfo *TRI) const {
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 3102) MachineFunction &MF = *MBB.getParent();
+fc6de428c8ab1 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eric Christopher 2014-08-05 02:39:49 +0000 3103) const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo();
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 3104) DebugLoc DL;
+29d4a695f45a7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-01 19:07:06 +0000 3105) SmallVector<RegPairInfo, 8> RegPairs;
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 3106) bool NeedsWinCFI = needsWinCFI(MF);
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 3107)
+17e85cd4109ca llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-24 18:36:37 +0000 3108) if (MBBI != MBB.end())
+17e85cd4109ca llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-24 18:36:37 +0000 3109) DL = MBBI->getDebugLoc();
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 3110)
+20a093e2bc310 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-25 10:50:02 +0000 3111) computeCalleeSaveRegisterPairs(MF, CSI, TRI, RegPairs, hasFP(MF));
+29d4a695f45a7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-01 19:07:06 +0000 3112)
+1f99a450127c2 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2024-02-20 15:08:06 +0000 3113) if (homogeneousPrologEpilog(MF, &MBB)) {
+1f99a450127c2 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2024-02-20 15:08:06 +0000 3114) auto MIB = BuildMI(MBB, MBBI, DL, TII.get(AArch64::HOM_Epilog))
+1f99a450127c2 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2024-02-20 15:08:06 +0000 3115) .setMIFlag(MachineInstr::FrameDestroy);
+1f99a450127c2 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2024-02-20 15:08:06 +0000 3116) for (auto &RPI : RegPairs) {
+1f99a450127c2 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2024-02-20 15:08:06 +0000 3117) MIB.addReg(RPI.Reg1, RegState::Define);
+1f99a450127c2 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2024-02-20 15:08:06 +0000 3118) MIB.addReg(RPI.Reg2, RegState::Define);
+1f99a450127c2 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2024-02-20 15:08:06 +0000 3119) }
+1f99a450127c2 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2024-02-20 15:08:06 +0000 3120) return true;
+1f99a450127c2 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2024-02-20 15:08:06 +0000 3121) }
+1f99a450127c2 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2024-02-20 15:08:06 +0000 3122)
+1f99a450127c2 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2024-02-20 15:08:06 +0000 3123) // For performance reasons restore SVE register in increasing order
+1f99a450127c2 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2024-02-20 15:08:06 +0000 3124) auto IsPPR = [](const RegPairInfo &c) { return c.Type == RegPairInfo::PPR; };
+1f99a450127c2 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2024-02-20 15:08:06 +0000 3125) auto PPRBegin = std::find_if(RegPairs.begin(), RegPairs.end(), IsPPR);
+1f99a450127c2 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2024-02-20 15:08:06 +0000 3126) auto PPREnd = std::find_if_not(PPRBegin, RegPairs.end(), IsPPR);
+1f99a450127c2 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2024-02-20 15:08:06 +0000 3127) std::reverse(PPRBegin, PPREnd);
+1f99a450127c2 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2024-02-20 15:08:06 +0000 3128) auto IsZPR = [](const RegPairInfo &c) { return c.Type == RegPairInfo::ZPR; };
+1f99a450127c2 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2024-02-20 15:08:06 +0000 3129) auto ZPRBegin = std::find_if(RegPairs.begin(), RegPairs.end(), IsZPR);
+1f99a450127c2 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2024-02-20 15:08:06 +0000 3130) auto ZPREnd = std::find_if_not(ZPRBegin, RegPairs.end(), IsZPR);
+1f99a450127c2 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2024-02-20 15:08:06 +0000 3131) std::reverse(ZPRBegin, ZPREnd);
+1f99a450127c2 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2024-02-20 15:08:06 +0000 3132)
+1f99a450127c2 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2024-02-20 15:08:06 +0000 3133) for (const RegPairInfo &RPI : RegPairs) {
+29d4a695f45a7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-01 19:07:06 +0000 3134) unsigned Reg1 = RPI.Reg1;
+29d4a695f45a7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-01 19:07:06 +0000 3135) unsigned Reg2 = RPI.Reg2;
+29d4a695f45a7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-01 19:07:06 +0000 3136)
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 3137) // Issue sequence of restores for cs regs. The last restore may be converted
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 3138) // to a post-increment load later by emitEpilogue if the callee-save stack
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 3139) // area allocation can't be combined with the local stack area allocation.
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 3140) // For example:
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 3141) // ldp fp, lr, [sp, #32] // addImm(+4)
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 3142) // ldp x20, x19, [sp, #16] // addImm(+2)
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 3143) // ldp x22, x21, [sp, #0] // addImm(+0)
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 3144) // Note: see comment in spillCalleeSavedRegisters()
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 3145) unsigned LdrOpc;
+998118c3d3bd6 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Guillaume Chatelet 2020-03-31 12:55:24 +0000 3146) unsigned Size;
+998118c3d3bd6 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Guillaume Chatelet 2020-03-31 12:55:24 +0000 3147) Align Alignment;
+7140363cd0122 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 09:44:46 +0000 3148) switch (RPI.Type) {
+7140363cd0122 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 09:44:46 +0000 3149) case RegPairInfo::GPR:
+7140363cd0122 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 09:44:46 +0000 3150) LdrOpc = RPI.isPaired() ? AArch64::LDPXi : AArch64::LDRXui;
+7140363cd0122 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 09:44:46 +0000 3151) Size = 8;
+998118c3d3bd6 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Guillaume Chatelet 2020-03-31 12:55:24 +0000 3152) Alignment = Align(8);
+7140363cd0122 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 09:44:46 +0000 3153) break;
+7140363cd0122 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 09:44:46 +0000 3154) case RegPairInfo::FPR64:
+7140363cd0122 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 09:44:46 +0000 3155) LdrOpc = RPI.isPaired() ? AArch64::LDPDi : AArch64::LDRDui;
+7140363cd0122 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 09:44:46 +0000 3156) Size = 8;
+998118c3d3bd6 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Guillaume Chatelet 2020-03-31 12:55:24 +0000 3157) Alignment = Align(8);
+7140363cd0122 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 09:44:46 +0000 3158) break;
+2d77e788f2fd5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 12:10:22 +0000 3159) case RegPairInfo::FPR128:
+2d77e788f2fd5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 12:10:22 +0000 3160) LdrOpc = RPI.isPaired() ? AArch64::LDPQi : AArch64::LDRQui;
+2d77e788f2fd5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 12:10:22 +0000 3161) Size = 16;
+998118c3d3bd6 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Guillaume Chatelet 2020-03-31 12:55:24 +0000 3162) Alignment = Align(16);
+2d77e788f2fd5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 12:10:22 +0000 3163) break;
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3164) case RegPairInfo::ZPR:
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3165) LdrOpc = AArch64::LDR_ZXI;
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3166) Size = 16;
+998118c3d3bd6 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Guillaume Chatelet 2020-03-31 12:55:24 +0000 3167) Alignment = Align(16);
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3168) break;
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3169) case RegPairInfo::PPR:
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3170) LdrOpc = AArch64::LDR_PXI;
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3171) Size = 2;
+998118c3d3bd6 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Guillaume Chatelet 2020-03-31 12:55:24 +0000 3172) Alignment = Align(2);
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3173) break;
+7140363cd0122 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 09:44:46 +0000 3174) }
+d34e60ca85325 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Nicola Zaghen 2018-05-14 12:53:11 +0000 3175) LLVM_DEBUG(dbgs() << "CSR restore: (" << printReg(Reg1, TRI);
+d34e60ca85325 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Nicola Zaghen 2018-05-14 12:53:11 +0000 3176) if (RPI.isPaired()) dbgs() << ", " << printReg(Reg2, TRI);
+d34e60ca85325 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Nicola Zaghen 2018-05-14 12:53:11 +0000 3177) dbgs() << ") -> fi#(" << RPI.FrameIdx;
+d34e60ca85325 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Nicola Zaghen 2018-05-14 12:53:11 +0000 3178) if (RPI.isPaired()) dbgs() << ", " << RPI.FrameIdx + 1;
+d34e60ca85325 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Nicola Zaghen 2018-05-14 12:53:11 +0000 3179) dbgs() << ")\n");
+29d4a695f45a7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-01 19:07:06 +0000 3180)
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 3181) // Windows unwind codes require consecutive registers if registers are
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 3182) // paired. Make the switch here, so that the code below will save (x,x+1)
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 3183) // and not (x+1,x).
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 3184) unsigned FrameIdxReg1 = RPI.FrameIdx;
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 3185) unsigned FrameIdxReg2 = RPI.FrameIdx + 1;
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 3186) if (NeedsWinCFI && RPI.isPaired()) {
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 3187) std::swap(Reg1, Reg2);
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 3188) std::swap(FrameIdxReg1, FrameIdxReg2);
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 3189) }
+17e85cd4109ca llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-24 18:36:37 +0000 3190) MachineInstrBuilder MIB = BuildMI(MBB, MBBI, DL, TII.get(LdrOpc));
+c376406669d40 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-04-15 15:16:19 +0000 3191) if (RPI.isPaired()) {
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 3192) MIB.addReg(Reg2, getDefRegState(true));
+c376406669d40 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-04-15 15:16:19 +0000 3193) MIB.addMemOperand(MF.getMachineMemOperand(
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 3194) MachinePointerInfo::getFixedStack(MF, FrameIdxReg2),
+998118c3d3bd6 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Guillaume Chatelet 2020-03-31 12:55:24 +0000 3195) MachineMemOperand::MOLoad, Size, Alignment));
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 3196) }
+a5335647d5e89 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-06 16:34:59 +0000 3197) MIB.addReg(Reg1, getDefRegState(true))
+c25d3bd23860c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-12 16:31:41 +0000 3198) .addReg(AArch64::SP)
+7140363cd0122 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 09:44:46 +0000 3199) .addImm(RPI.Offset) // [sp, #offset*scale]
+7140363cd0122 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 09:44:46 +0000 3200) // where factor*scale is implicit
+c25d3bd23860c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-12 16:31:41 +0000 3201) .setMIFlag(MachineInstr::FrameDestroy);
+c376406669d40 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-04-15 15:16:19 +0000 3202) MIB.addMemOperand(MF.getMachineMemOperand(
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 3203) MachinePointerInfo::getFixedStack(MF, FrameIdxReg1),
+998118c3d3bd6 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Guillaume Chatelet 2020-03-31 12:55:24 +0000 3204) MachineMemOperand::MOLoad, Size, Alignment));
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 3205) if (NeedsWinCFI)
+fadebc8aaefb9 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sanjin Sijaric 2018-10-31 09:27:01 +0000 3206) InsertSEH(MIB, TII, MachineInstr::FrameDestroy);
+17e85cd4109ca llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-02-24 18:36:37 +0000 3207) }
+f11eb3ebe7772 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Peter Collingbourne 2018-04-04 21:55:44 +0000 3208)
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 3209) return true;
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 3210) }
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 3211)
+02564865328fc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2015-07-14 17:17:13 +0000 3212) void AArch64FrameLowering::determineCalleeSaves(MachineFunction &MF,
+02564865328fc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2015-07-14 17:17:13 +0000 3213) BitVector &SavedRegs,
+02564865328fc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2015-07-14 17:17:13 +0000 3214) RegScavenger *RS) const {
+02564865328fc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2015-07-14 17:17:13 +0000 3215) // All calls are tail calls in GHC calling conv, and functions have no
+02564865328fc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2015-07-14 17:17:13 +0000 3216) // prologue/epilogue.
+f1caa2833f505 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2017-12-15 22:22:58 +0000 3217) if (MF.getFunction().getCallingConv() == CallingConv::GHC)
+02564865328fc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2015-07-14 17:17:13 +0000 3218) return;
+02564865328fc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2015-07-14 17:17:13 +0000 3219)
+02564865328fc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2015-07-14 17:17:13 +0000 3220) TargetFrameLowering::determineCalleeSaves(MF, SavedRegs, RS);
+3b0846e8f7689 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2014-05-24 12:50:23 +0000 3221) const AArch64RegisterInfo *RegInfo = static_cast<const AArch64RegisterInfo *>(
+fc6de428c8ab1 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eric Christopher 2014-08-05 02:39:49 +0000 3222) MF.getSubtarget().getRegisterInfo());
+cf97e0ec42b80 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2019-04-30 11:50:09 +0300 3223) const AArch64Subtarget &Subtarget = MF.getSubtarget<AArch64Subtarget>();
+3b0846e8f7689 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2014-05-24 12:50:23 +0000 3224) AArch64FunctionInfo *AFI = MF.getInfo<AArch64FunctionInfo>();
+c25d3bd23860c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-12 16:31:41 +0000 3225) unsigned UnspilledCSGPR = AArch64::NoRegister;
+c25d3bd23860c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-12 16:31:41 +0000 3226) unsigned UnspilledCSGPRPaired = AArch64::NoRegister;
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 3227)
+2778fd0b59b64 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2017-12-20 06:51:45 +0000 3228) MachineFrameInfo &MFI = MF.getFrameInfo();
+6c47c62588573 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tri Vo 2018-09-22 22:17:50 +0000 3229) const MCPhysReg *CSRegs = MF.getRegInfo().getCalleeSavedRegs();
+2778fd0b59b64 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2017-12-20 06:51:45 +0000 3230)
+2778fd0b59b64 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2017-12-20 06:51:45 +0000 3231) unsigned BasePointerReg = RegInfo->hasBasePointer(MF)
+2778fd0b59b64 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2017-12-20 06:51:45 +0000 3232) ? RegInfo->getBaseRegister()
+2778fd0b59b64 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2017-12-20 06:51:45 +0000 3233) : (unsigned)AArch64::NoRegister;
+2778fd0b59b64 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2017-12-20 06:51:45 +0000 3234)
+d78597ec08b9f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2017-04-21 22:42:08 +0000 3235) unsigned ExtraCSSpill = 0;
+041a786c78fbc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Zhaoxuan Jiang 2023-10-17 14:34:04 +0800 3236) bool HasUnpairedGPR64 = false;
+c25d3bd23860c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-12 16:31:41 +0000 3237) // Figure out which callee-saved registers to save/restore.
+c25d3bd23860c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-12 16:31:41 +0000 3238) for (unsigned i = 0; CSRegs[i]; ++i) {
+c25d3bd23860c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-12 16:31:41 +0000 3239) const unsigned Reg = CSRegs[i];
+c25d3bd23860c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-12 16:31:41 +0000 3240)
+7e4ba3dc02dea llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-19 18:27:32 +0000 3241) // Add the base pointer register to SavedRegs if it is callee-save.
+7e4ba3dc02dea llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-19 18:27:32 +0000 3242) if (Reg == BasePointerReg)
+c25d3bd23860c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-12 16:31:41 +0000 3243) SavedRegs.set(Reg);
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 3244)
+c25d3bd23860c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-12 16:31:41 +0000 3245) bool RegUsed = SavedRegs.test(Reg);
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3246) unsigned PairedReg = AArch64::NoRegister;
+041a786c78fbc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Zhaoxuan Jiang 2023-10-17 14:34:04 +0800 3247) const bool RegIsGPR64 = AArch64::GPR64RegClass.contains(Reg);
+041a786c78fbc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Zhaoxuan Jiang 2023-10-17 14:34:04 +0800 3248) if (RegIsGPR64 || AArch64::FPR64RegClass.contains(Reg) ||
+041a786c78fbc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Zhaoxuan Jiang 2023-10-17 14:34:04 +0800 3249) AArch64::FPR128RegClass.contains(Reg)) {
+041a786c78fbc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Zhaoxuan Jiang 2023-10-17 14:34:04 +0800 3250) // Compensate for odd numbers of GP CSRs.
+041a786c78fbc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Zhaoxuan Jiang 2023-10-17 14:34:04 +0800 3251) // For now, all the known cases of odd number of CSRs are of GPRs.
+041a786c78fbc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Zhaoxuan Jiang 2023-10-17 14:34:04 +0800 3252) if (HasUnpairedGPR64)
+041a786c78fbc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Zhaoxuan Jiang 2023-10-17 14:34:04 +0800 3253) PairedReg = CSRegs[i % 2 == 0 ? i - 1 : i + 1];
+041a786c78fbc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Zhaoxuan Jiang 2023-10-17 14:34:04 +0800 3254) else
+041a786c78fbc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Zhaoxuan Jiang 2023-10-17 14:34:04 +0800 3255) PairedReg = CSRegs[i ^ 1];
+041a786c78fbc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Zhaoxuan Jiang 2023-10-17 14:34:04 +0800 3256) }
+041a786c78fbc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Zhaoxuan Jiang 2023-10-17 14:34:04 +0800 3257)
+041a786c78fbc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Zhaoxuan Jiang 2023-10-17 14:34:04 +0800 3258) // If the function requires all the GP registers to save (SavedRegs),
+041a786c78fbc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Zhaoxuan Jiang 2023-10-17 14:34:04 +0800 3259) // and there are an odd number of GP CSRs at the same time (CSRegs),
+041a786c78fbc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Zhaoxuan Jiang 2023-10-17 14:34:04 +0800 3260) // PairedReg could be in a different register class from Reg, which would
+041a786c78fbc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Zhaoxuan Jiang 2023-10-17 14:34:04 +0800 3261) // lead to a FPR (usually D8) accidentally being marked saved.
+041a786c78fbc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Zhaoxuan Jiang 2023-10-17 14:34:04 +0800 3262) if (RegIsGPR64 && !AArch64::GPR64RegClass.contains(PairedReg)) {
+041a786c78fbc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Zhaoxuan Jiang 2023-10-17 14:34:04 +0800 3263) PairedReg = AArch64::NoRegister;
+041a786c78fbc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Zhaoxuan Jiang 2023-10-17 14:34:04 +0800 3264) HasUnpairedGPR64 = true;
+041a786c78fbc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Zhaoxuan Jiang 2023-10-17 14:34:04 +0800 3265) }
+041a786c78fbc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Zhaoxuan Jiang 2023-10-17 14:34:04 +0800 3266) assert(PairedReg == AArch64::NoRegister ||
+041a786c78fbc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Zhaoxuan Jiang 2023-10-17 14:34:04 +0800 3267) AArch64::GPR64RegClass.contains(Reg, PairedReg) ||
+041a786c78fbc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Zhaoxuan Jiang 2023-10-17 14:34:04 +0800 3268) AArch64::FPR64RegClass.contains(Reg, PairedReg) ||
+041a786c78fbc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Zhaoxuan Jiang 2023-10-17 14:34:04 +0800 3269) AArch64::FPR128RegClass.contains(Reg, PairedReg));
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3270)
+c25d3bd23860c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-12 16:31:41 +0000 3271) if (!RegUsed) {
+c25d3bd23860c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-12 16:31:41 +0000 3272) if (AArch64::GPR64RegClass.contains(Reg) &&
+c25d3bd23860c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-12 16:31:41 +0000 3273) !RegInfo->isReservedReg(MF, Reg)) {
+c25d3bd23860c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-12 16:31:41 +0000 3274) UnspilledCSGPR = Reg;
+c25d3bd23860c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-12 16:31:41 +0000 3275) UnspilledCSGPRPaired = PairedReg;
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 3276) }
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 3277) continue;
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 3278) }
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 3279)
+c25d3bd23860c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-12 16:31:41 +0000 3280) // MachO's compact unwind format relies on all registers being stored in
+c25d3bd23860c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-12 16:31:41 +0000 3281) // pairs.
+c25d3bd23860c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-12 16:31:41 +0000 3282) // FIXME: the usual format is actually better if unwinding isn't needed.
+4f58b1bd29747 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kyungwoo Lee 2021-02-01 22:32:32 -0500 3283) if (producePairRegisters(MF) && PairedReg != AArch64::NoRegister &&
+2d77e788f2fd5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 12:10:22 +0000 3284) !SavedRegs.test(PairedReg)) {
+c25d3bd23860c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-12 16:31:41 +0000 3285) SavedRegs.set(PairedReg);
+74cb718ea963f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-16 20:52:28 +0000 3286) if (AArch64::GPR64RegClass.contains(PairedReg) &&
+74cb718ea963f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-05-16 20:52:28 +0000 3287) !RegInfo->isReservedReg(MF, PairedReg))
+d78597ec08b9f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2017-04-21 22:42:08 +0000 3288) ExtraCSSpill = PairedReg;
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 3289) }
+c25d3bd23860c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-12 16:31:41 +0000 3290) }
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 3291)
+cf97e0ec42b80 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2019-04-30 11:50:09 +0300 3292) if (MF.getFunction().getCallingConv() == CallingConv::Win64 &&
+cf97e0ec42b80 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2019-04-30 11:50:09 +0300 3293) !Subtarget.isTargetWindows()) {
+cf97e0ec42b80 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2019-04-30 11:50:09 +0300 3294) // For Windows calling convention on a non-windows OS, where X18 is treated
+cf97e0ec42b80 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2019-04-30 11:50:09 +0300 3295) // as reserved, back up X18 when entering non-windows code (marked with the
+cf97e0ec42b80 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2019-04-30 11:50:09 +0300 3296) // Windows calling convention) and restore when returning regardless of
+cf97e0ec42b80 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2019-04-30 11:50:09 +0300 3297) // whether the individual function uses it - it might call other functions
+cf97e0ec42b80 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2019-04-30 11:50:09 +0300 3298) // that clobber it.
+cf97e0ec42b80 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2019-04-30 11:50:09 +0300 3299) SavedRegs.set(AArch64::X18);
+cf97e0ec42b80 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2019-04-30 11:50:09 +0300 3300) }
+cf97e0ec42b80 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2019-04-30 11:50:09 +0300 3301)
+2d77e788f2fd5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 12:10:22 +0000 3302) // Calculates the callee saved stack size.
+2d77e788f2fd5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 12:10:22 +0000 3303) unsigned CSStackSize = 0;
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3304) unsigned SVECSStackSize = 0;
+2d77e788f2fd5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 12:10:22 +0000 3305) const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
+2d77e788f2fd5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 12:10:22 +0000 3306) const MachineRegisterInfo &MRI = MF.getRegInfo();
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3307) for (unsigned Reg : SavedRegs.set_bits()) {
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3308) auto RegSize = TRI->getRegSizeInBits(Reg, MRI) / 8;
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3309) if (AArch64::PPRRegClass.contains(Reg) ||
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3310) AArch64::ZPRRegClass.contains(Reg))
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3311) SVECSStackSize += RegSize;
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3312) else
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3313) CSStackSize += RegSize;
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3314) }
+2d77e788f2fd5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 12:10:22 +0000 3315)
+2d77e788f2fd5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 12:10:22 +0000 3316) // Save number of saved regs, so we can easily update CSStackSize later.
+2d77e788f2fd5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 12:10:22 +0000 3317) unsigned NumSavedRegs = SavedRegs.count();
+2d77e788f2fd5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 12:10:22 +0000 3318)
+2d77e788f2fd5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 12:10:22 +0000 3319) // The frame record needs to be created by saving the appropriate registers
+965ed1e974e80 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kiran Chandramohan 2019-11-20 12:45:26 +0000 3320) uint64_t EstimatedStackSize = MFI.estimateStackSize(MF);
+2d77e788f2fd5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 12:10:22 +0000 3321) if (hasFP(MF) ||
+2d77e788f2fd5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 12:10:22 +0000 3322) windowsRequiresStackProbe(MF, EstimatedStackSize + CSStackSize + 16)) {
+2d77e788f2fd5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 12:10:22 +0000 3323) SavedRegs.set(AArch64::FP);
+2d77e788f2fd5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 12:10:22 +0000 3324) SavedRegs.set(AArch64::LR);
+2d77e788f2fd5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 12:10:22 +0000 3325) }
+2d77e788f2fd5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 12:10:22 +0000 3326)
+7ebccfefb8ffa llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-08-01 10:53:45 +0000 3327) LLVM_DEBUG(dbgs() << "*** determineCalleeSaves\nSaved CSRs:";
+d34e60ca85325 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Nicola Zaghen 2018-05-14 12:53:11 +0000 3328) for (unsigned Reg
+d34e60ca85325 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Nicola Zaghen 2018-05-14 12:53:11 +0000 3329) : SavedRegs.set_bits()) dbgs()
+d34e60ca85325 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Nicola Zaghen 2018-05-14 12:53:11 +0000 3330) << ' ' << printReg(Reg, RegInfo);
+d34e60ca85325 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Nicola Zaghen 2018-05-14 12:53:11 +0000 3331) dbgs() << "\n";);
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 3332)
+c25d3bd23860c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-12 16:31:41 +0000 3333) // If any callee-saved registers are used, the frame cannot be eliminated.
+7774812965027 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-14 13:11:34 +0000 3334) int64_t SVEStackSize =
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3335) alignTo(SVECSStackSize + estimateSVEStackObjectOffsets(MFI), 16);
+7774812965027 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-14 13:11:34 +0000 3336) bool CanEliminateFrame = (SavedRegs.count() == 0) && !SVEStackSize;
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 3337)
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 3338) // The CSR spill slots have not been allocated yet, so estimateStackSize
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 3339) // won't include them.
+2af1e90eb2697 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kristof Beyls 2017-05-30 06:58:41 +0000 3340) unsigned EstimatedStackSizeLimit = estimateRSStackSizeLimit(MF);
+7774812965027 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-14 13:11:34 +0000 3341)
+2002c82278f6f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2023-01-27 13:18:59 +0000 3342) // We may address some of the stack above the canonical frame address, either
+2002c82278f6f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2023-01-27 13:18:59 +0000 3343) // for our own arguments or during a call. Include that in calculating whether
+2002c82278f6f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2023-01-27 13:18:59 +0000 3344) // we have complicated addressing concerns.
+2002c82278f6f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2023-01-27 13:18:59 +0000 3345) int64_t CalleeStackUsed = 0;
+2002c82278f6f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2023-01-27 13:18:59 +0000 3346) for (int I = MFI.getObjectIndexBegin(); I != 0; ++I) {
+2002c82278f6f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2023-01-27 13:18:59 +0000 3347) int64_t FixedOff = MFI.getObjectOffset(I);
+2002c82278f6f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2023-01-27 13:18:59 +0000 3348) if (FixedOff > CalleeStackUsed) CalleeStackUsed = FixedOff;
+2002c82278f6f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2023-01-27 13:18:59 +0000 3349) }
+2002c82278f6f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2023-01-27 13:18:59 +0000 3350)
+7774812965027 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-14 13:11:34 +0000 3351) // Conservatively always assume BigStack when there are SVE spills.
+2002c82278f6f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2023-01-27 13:18:59 +0000 3352) bool BigStack = SVEStackSize || (EstimatedStackSize + CSStackSize +
+2002c82278f6f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2023-01-27 13:18:59 +0000 3353) CalleeStackUsed) > EstimatedStackSizeLimit;
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 3354) if (BigStack || !CanEliminateFrame || RegInfo->cannotEliminateFrame(MF))
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 3355) AFI->setHasStackFrame(true);
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 3356)
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 3357) // Estimate if we might need to scavenge a register at some point in order
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 3358) // to materialize a stack offset. If so, either spill one additional
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 3359) // callee-saved register or reserve a special spill slot to facilitate
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 3360) // register scavenging. If we already spilled an extra callee-saved register
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 3361) // above to keep the number of spills even, we don't need to do anything else
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 3362) // here.
+d78597ec08b9f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2017-04-21 22:42:08 +0000 3363) if (BigStack) {
+d78597ec08b9f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2017-04-21 22:42:08 +0000 3364) if (!ExtraCSSpill && UnspilledCSGPR != AArch64::NoRegister) {
+d34e60ca85325 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Nicola Zaghen 2018-05-14 12:53:11 +0000 3365) LLVM_DEBUG(dbgs() << "Spilling " << printReg(UnspilledCSGPR, RegInfo)
+d34e60ca85325 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Nicola Zaghen 2018-05-14 12:53:11 +0000 3366) << " to get a scratch register.\n");
+c25d3bd23860c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-12 16:31:41 +0000 3367) SavedRegs.set(UnspilledCSGPR);
+041a786c78fbc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Zhaoxuan Jiang 2023-10-17 14:34:04 +0800 3368) ExtraCSSpill = UnspilledCSGPR;
+041a786c78fbc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Zhaoxuan Jiang 2023-10-17 14:34:04 +0800 3369)
+c25d3bd23860c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-12 16:31:41 +0000 3370) // MachO's compact unwind format relies on all registers being stored in
+c25d3bd23860c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-12 16:31:41 +0000 3371) // pairs, so if we need to spill one extra for BigStack, then we need to
+c25d3bd23860c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-12 16:31:41 +0000 3372) // store the pair.
+041a786c78fbc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Zhaoxuan Jiang 2023-10-17 14:34:04 +0800 3373) if (producePairRegisters(MF)) {
+041a786c78fbc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Zhaoxuan Jiang 2023-10-17 14:34:04 +0800 3374) if (UnspilledCSGPRPaired == AArch64::NoRegister) {
+041a786c78fbc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Zhaoxuan Jiang 2023-10-17 14:34:04 +0800 3375) // Failed to make a pair for compact unwind format, revert spilling.
+041a786c78fbc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Zhaoxuan Jiang 2023-10-17 14:34:04 +0800 3376) if (produceCompactUnwindFrame(MF)) {
+041a786c78fbc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Zhaoxuan Jiang 2023-10-17 14:34:04 +0800 3377) SavedRegs.reset(UnspilledCSGPR);
+041a786c78fbc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Zhaoxuan Jiang 2023-10-17 14:34:04 +0800 3378) ExtraCSSpill = AArch64::NoRegister;
+041a786c78fbc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Zhaoxuan Jiang 2023-10-17 14:34:04 +0800 3379) }
+041a786c78fbc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Zhaoxuan Jiang 2023-10-17 14:34:04 +0800 3380) } else
+041a786c78fbc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Zhaoxuan Jiang 2023-10-17 14:34:04 +0800 3381) SavedRegs.set(UnspilledCSGPRPaired);
+041a786c78fbc llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Zhaoxuan Jiang 2023-10-17 14:34:04 +0800 3382) }
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 3383) }
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 3384)
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 3385) // If we didn't find an extra callee-saved register to spill, create
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 3386) // an emergency spill slot.
+d78597ec08b9f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matthias Braun 2017-04-21 22:42:08 +0000 3387) if (!ExtraCSSpill || MF.getRegInfo().isPhysRegUsed(ExtraCSSpill)) {
+44e25f37ae242 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Krzysztof Parzyszek 2017-04-24 18:55:33 +0000 3388) const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
+44e25f37ae242 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Krzysztof Parzyszek 2017-04-24 18:55:33 +0000 3389) const TargetRegisterClass &RC = AArch64::GPR64RegClass;
+44e25f37ae242 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Krzysztof Parzyszek 2017-04-24 18:55:33 +0000 3390) unsigned Size = TRI->getSpillSize(RC);
+4f5133a4dcd0b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Guillaume Chatelet 2020-06-30 07:49:21 +0000 3391) Align Alignment = TRI->getSpillAlign(RC);
+4f5133a4dcd0b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Guillaume Chatelet 2020-06-30 07:49:21 +0000 3392) int FI = MFI.CreateStackObject(Size, Alignment, false);
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 3393) RS->addScavengingFrameIndex(FI);
+d34e60ca85325 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Nicola Zaghen 2018-05-14 12:53:11 +0000 3394) LLVM_DEBUG(dbgs() << "No available CS registers, allocated fi#" << FI
+d34e60ca85325 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Nicola Zaghen 2018-05-14 12:53:11 +0000 3395) << " as the emergency spill slot.\n");
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 3396) }
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 3397) }
+04bf91a8c1c6f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-01 16:29:19 +0000 3398)
+2d77e788f2fd5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 12:10:22 +0000 3399) // Adding the size of additional 64bit GPR saves.
+2d77e788f2fd5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 12:10:22 +0000 3400) CSStackSize += 8 * (SavedRegs.count() - NumSavedRegs);
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 3401)
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 3402) // A Swift asynchronous context extends the frame record with a pointer
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 3403) // directly before FP.
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 3404) if (hasFP(MF) && AFI->hasSwiftAsyncContext())
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 3405) CSStackSize += 8;
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 3406)
+965ed1e974e80 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kiran Chandramohan 2019-11-20 12:45:26 +0000 3407) uint64_t AlignedCSStackSize = alignTo(CSStackSize, 16);
+2d77e788f2fd5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 12:10:22 +0000 3408) LLVM_DEBUG(dbgs() << "Estimated stack frame size: "
+2d77e788f2fd5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 12:10:22 +0000 3409) << EstimatedStackSize + AlignedCSStackSize
+2d77e788f2fd5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 12:10:22 +0000 3410) << " bytes.\n");
+2d77e788f2fd5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 12:10:22 +0000 3411)
+d6a7da80aae62 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-29 12:49:34 +0000 3412) assert((!MFI.isCalleeSavedInfoValid() ||
+d6a7da80aae62 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-29 12:49:34 +0000 3413) AFI->getCalleeSavedStackSize() == AlignedCSStackSize) &&
+d6a7da80aae62 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-29 12:49:34 +0000 3414) "Should not invalidate callee saved info");
+d6a7da80aae62 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-29 12:49:34 +0000 3415)
+c25d3bd23860c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-12 16:31:41 +0000 3416) // Round up to register pair alignment to avoid additional SP adjustment
+c25d3bd23860c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-02-12 16:31:41 +0000 3417) // instructions.
+2d77e788f2fd5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 12:10:22 +0000 3418) AFI->setCalleeSavedStackSize(AlignedCSStackSize);
+2d77e788f2fd5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2018-09-12 12:10:22 +0000 3419) AFI->setCalleeSaveStackHasFreeSpace(AlignedCSStackSize != CSStackSize);
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3420) AFI->setSVECalleeSavedStackSize(alignTo(SVECSStackSize, 16));
+00ed9964c6596 llvm/lib/Target/ARM64/ARM64FrameLowering.cpp (Tim Northover 2014-03-29 10:18:08 +0000 3421) }
+66f6b65fed8e3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-06-02 16:22:07 +0000 3422)
+3780a4e568ac7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:14:05 +0300 3423) bool AArch64FrameLowering::assignCalleeSavedSpillSlots(
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 3424) MachineFunction &MF, const TargetRegisterInfo *RegInfo,
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 3425) std::vector<CalleeSavedInfo> &CSI, unsigned &MinCSFrameIndex,
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 3426) unsigned &MaxCSFrameIndex) const {
+3780a4e568ac7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:14:05 +0300 3427) bool NeedsWinCFI = needsWinCFI(MF);
+3780a4e568ac7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:14:05 +0300 3428) // To match the canonical windows frame layout, reverse the list of
+3780a4e568ac7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:14:05 +0300 3429) // callee saved registers to get them laid out by PrologEpilogInserter
+3780a4e568ac7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:14:05 +0300 3430) // in the right order. (PrologEpilogInserter allocates stack objects top
+3780a4e568ac7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:14:05 +0300 3431) // down. Windows canonical prologs store higher numbered registers at
+3780a4e568ac7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:14:05 +0300 3432) // the top, thus have the CSI array start from the highest registers.)
+3780a4e568ac7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:14:05 +0300 3433) if (NeedsWinCFI)
+3780a4e568ac7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:14:05 +0300 3434) std::reverse(CSI.begin(), CSI.end());
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 3435)
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 3436) if (CSI.empty())
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 3437) return true; // Early exit if no callee saved registers are modified!
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 3438)
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 3439) // Now that we know which registers need to be saved and restored, allocate
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 3440) // stack slots for them.
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 3441) MachineFrameInfo &MFI = MF.getFrameInfo();
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 3442) auto *AFI = MF.getInfo<AArch64FunctionInfo>();
+24ba1302b38bf llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Saleem Abdulrasool 2022-04-26 20:12:48 -0700 3443)
+24ba1302b38bf llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Saleem Abdulrasool 2022-04-26 20:12:48 -0700 3444) bool UsesWinAAPCS = isTargetWindows(MF);
+24ba1302b38bf llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Saleem Abdulrasool 2022-04-26 20:12:48 -0700 3445) if (UsesWinAAPCS && hasFP(MF) && AFI->hasSwiftAsyncContext()) {
+24ba1302b38bf llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Saleem Abdulrasool 2022-04-26 20:12:48 -0700 3446) int FrameIdx = MFI.CreateStackObject(8, Align(16), true);
+24ba1302b38bf llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Saleem Abdulrasool 2022-04-26 20:12:48 -0700 3447) AFI->setSwiftAsyncContextFrameIdx(FrameIdx);
+24ba1302b38bf llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Saleem Abdulrasool 2022-04-26 20:12:48 -0700 3448) if ((unsigned)FrameIdx < MinCSFrameIndex) MinCSFrameIndex = FrameIdx;
+24ba1302b38bf llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Saleem Abdulrasool 2022-04-26 20:12:48 -0700 3449) if ((unsigned)FrameIdx > MaxCSFrameIndex) MaxCSFrameIndex = FrameIdx;
+24ba1302b38bf llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Saleem Abdulrasool 2022-04-26 20:12:48 -0700 3450) }
+24ba1302b38bf llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Saleem Abdulrasool 2022-04-26 20:12:48 -0700 3451)
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 3452) for (auto &CS : CSI) {
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 3453) Register Reg = CS.getReg();
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 3454) const TargetRegisterClass *RC = RegInfo->getMinimalPhysRegClass(Reg);
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 3455)
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 3456) unsigned Size = RegInfo->getSpillSize(*RC);
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 3457) Align Alignment(RegInfo->getSpillAlign(*RC));
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 3458) int FrameIdx = MFI.CreateStackObject(Size, Alignment, true);
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 3459) CS.setFrameIdx(FrameIdx);
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 3460)
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 3461) if ((unsigned)FrameIdx < MinCSFrameIndex) MinCSFrameIndex = FrameIdx;
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 3462) if ((unsigned)FrameIdx > MaxCSFrameIndex) MaxCSFrameIndex = FrameIdx;
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 3463)
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 3464) // Grab 8 bytes below FP for the extended asynchronous frame info.
+24ba1302b38bf llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Saleem Abdulrasool 2022-04-26 20:12:48 -0700 3465) if (hasFP(MF) && AFI->hasSwiftAsyncContext() && !UsesWinAAPCS &&
+24ba1302b38bf llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Saleem Abdulrasool 2022-04-26 20:12:48 -0700 3466) Reg == AArch64::FP) {
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 3467) FrameIdx = MFI.CreateStackObject(8, Alignment, true);
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 3468) AFI->setSwiftAsyncContextFrameIdx(FrameIdx);
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 3469) if ((unsigned)FrameIdx < MinCSFrameIndex) MinCSFrameIndex = FrameIdx;
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 3470) if ((unsigned)FrameIdx > MaxCSFrameIndex) MaxCSFrameIndex = FrameIdx;
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 3471) }
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 3472) }
+ea0eec69f16e0 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Tim Northover 2021-01-20 10:14:03 +0000 3473) return true;
+3780a4e568ac7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:14:05 +0300 3474) }
+3780a4e568ac7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Martin Storsjö 2020-09-23 14:14:05 +0300 3475)
+66f6b65fed8e3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-06-02 16:22:07 +0000 3476) bool AArch64FrameLowering::enableStackSlotScavenging(
+66f6b65fed8e3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-06-02 16:22:07 +0000 3477) const MachineFunction &MF) const {
+66f6b65fed8e3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-06-02 16:22:07 +0000 3478) const AArch64FunctionInfo *AFI = MF.getInfo<AArch64FunctionInfo>();
+702c3f56d3868 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2023-09-01 14:34:13 +0000 3479) // If the function has streaming-mode changes, don't scavenge a
+702c3f56d3868 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2023-09-01 14:34:13 +0000 3480) // spillslot in the callee-save area, as that might require an
+702c3f56d3868 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2023-09-01 14:34:13 +0000 3481) // 'addvl' in the streaming-mode-changing call-sequence when the
+702c3f56d3868 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2023-09-01 14:34:13 +0000 3482) // function doesn't use a FP.
+702c3f56d3868 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2023-09-01 14:34:13 +0000 3483) if (AFI->hasStreamingModeChanges() && !hasFP(MF))
+702c3f56d3868 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2023-09-01 14:34:13 +0000 3484) return false;
+66f6b65fed8e3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-06-02 16:22:07 +0000 3485) return AFI->hasCalleeSaveStackFreeSpace();
+66f6b65fed8e3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Geoff Berry 2016-06-02 16:22:07 +0000 3486) }
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 3487)
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3488) /// returns true if there are any SVE callee saves.
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3489) static bool getSVECalleeSaveSlotRange(const MachineFrameInfo &MFI,
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3490) int &Min, int &Max) {
+9a1c243aa5ded llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-13 08:31:49 +0000 3491) Min = std::numeric_limits<int>::max();
+9a1c243aa5ded llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-13 08:31:49 +0000 3492) Max = std::numeric_limits<int>::min();
+9a1c243aa5ded llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-13 08:31:49 +0000 3493)
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3494) if (!MFI.isCalleeSavedInfoValid())
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3495) return false;
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3496)
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3497) const std::vector<CalleeSavedInfo> &CSI = MFI.getCalleeSavedInfo();
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3498) for (auto &CS : CSI) {
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3499) if (AArch64::ZPRRegClass.contains(CS.getReg()) ||
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3500) AArch64::PPRRegClass.contains(CS.getReg())) {
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3501) assert((Max == std::numeric_limits<int>::min() ||
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3502) Max + 1 == CS.getFrameIdx()) &&
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3503) "SVE CalleeSaves are not consecutive");
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3504)
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3505) Min = std::min(Min, CS.getFrameIdx());
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3506) Max = std::max(Max, CS.getFrameIdx());
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3507) }
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3508) }
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3509) return Min != std::numeric_limits<int>::max();
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3510) }
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3511)
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3512) // Process all the SVE stack objects and determine offsets for each
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3513) // object. If AssignOffsets is true, the offsets get assigned.
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3514) // Fills in the first and last callee-saved frame indices into
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3515) // Min/MaxCSFrameIndex, respectively.
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3516) // Returns the size of the stack.
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3517) static int64_t determineSVEStackObjectOffsets(MachineFrameInfo &MFI,
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3518) int &MinCSFrameIndex,
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3519) int &MaxCSFrameIndex,
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3520) bool AssignOffsets) {
+54492a5843a34 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-07-27 12:57:41 +0100 3521) #ifndef NDEBUG
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3522) // First process all fixed stack objects.
+7774812965027 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-14 13:11:34 +0000 3523) for (int I = MFI.getObjectIndexBegin(); I != 0; ++I)
+914e2f5a02f4f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hsiangkai Wang 2021-01-12 16:19:37 +0800 3524) assert(MFI.getStackID(I) != TargetStackID::ScalableVector &&
+54492a5843a34 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-07-27 12:57:41 +0100 3525) "SVE vectors should never be passed on the stack by value, only by "
+54492a5843a34 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-07-27 12:57:41 +0100 3526) "reference.");
+54492a5843a34 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-07-27 12:57:41 +0100 3527) #endif
+7774812965027 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-14 13:11:34 +0000 3528)
+9a1c243aa5ded llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-13 08:31:49 +0000 3529) auto Assign = [&MFI](int FI, int64_t Offset) {
+9a1c243aa5ded llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-13 08:31:49 +0000 3530) LLVM_DEBUG(dbgs() << "alloc FI(" << FI << ") at SP[" << Offset << "]\n");
+9a1c243aa5ded llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-13 08:31:49 +0000 3531) MFI.setObjectOffset(FI, Offset);
+9a1c243aa5ded llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-13 08:31:49 +0000 3532) };
+9a1c243aa5ded llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-13 08:31:49 +0000 3533)
+54492a5843a34 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-07-27 12:57:41 +0100 3534) int64_t Offset = 0;
+54492a5843a34 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-07-27 12:57:41 +0100 3535)
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3536) // Then process all callee saved slots.
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3537) if (getSVECalleeSaveSlotRange(MFI, MinCSFrameIndex, MaxCSFrameIndex)) {
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3538) // Assign offsets to the callee save slots.
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3539) for (int I = MinCSFrameIndex; I <= MaxCSFrameIndex; ++I) {
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3540) Offset += MFI.getObjectSize(I);
+1dffa2550b535 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Guillaume Chatelet 2020-04-01 13:49:04 +0000 3541) Offset = alignTo(Offset, MFI.getObjectAlign(I));
+9a1c243aa5ded llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-13 08:31:49 +0000 3542) if (AssignOffsets)
+9a1c243aa5ded llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-13 08:31:49 +0000 3543) Assign(I, -Offset);
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3544) }
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3545) }
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3546)
+26b4ef3694973 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-07-27 14:16:55 +0100 3547) // Ensure that the Callee-save area is aligned to 16bytes.
+26b4ef3694973 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-07-27 14:16:55 +0100 3548) Offset = alignTo(Offset, Align(16U));
+26b4ef3694973 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-07-27 14:16:55 +0100 3549)
+9a1c243aa5ded llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-13 08:31:49 +0000 3550) // Create a buffer of SVE objects to allocate and sort it.
+9a1c243aa5ded llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-13 08:31:49 +0000 3551) SmallVector<int, 8> ObjectsToAllocate;
+dc9f65be45554 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (John Brawn 2021-12-14 11:11:41 +0000 3552) // If we have a stack protector, and we've previously decided that we have SVE
+dc9f65be45554 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (John Brawn 2021-12-14 11:11:41 +0000 3553) // objects on the stack and thus need it to go in the SVE stack area, then it
+dc9f65be45554 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (John Brawn 2021-12-14 11:11:41 +0000 3554) // needs to go first.
+dc9f65be45554 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (John Brawn 2021-12-14 11:11:41 +0000 3555) int StackProtectorFI = -1;
+dc9f65be45554 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (John Brawn 2021-12-14 11:11:41 +0000 3556) if (MFI.hasStackProtectorIndex()) {
+dc9f65be45554 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (John Brawn 2021-12-14 11:11:41 +0000 3557) StackProtectorFI = MFI.getStackProtectorIndex();
+dc9f65be45554 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (John Brawn 2021-12-14 11:11:41 +0000 3558) if (MFI.getStackID(StackProtectorFI) == TargetStackID::ScalableVector)
+dc9f65be45554 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (John Brawn 2021-12-14 11:11:41 +0000 3559) ObjectsToAllocate.push_back(StackProtectorFI);
+dc9f65be45554 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (John Brawn 2021-12-14 11:11:41 +0000 3560) }
+9a1c243aa5ded llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-13 08:31:49 +0000 3561) for (int I = 0, E = MFI.getObjectIndexEnd(); I != E; ++I) {
+9a1c243aa5ded llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-13 08:31:49 +0000 3562) unsigned StackID = MFI.getStackID(I);
+914e2f5a02f4f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hsiangkai Wang 2021-01-12 16:19:37 +0800 3563) if (StackID != TargetStackID::ScalableVector)
+9a1c243aa5ded llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-13 08:31:49 +0000 3564) continue;
+dc9f65be45554 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (John Brawn 2021-12-14 11:11:41 +0000 3565) if (I == StackProtectorFI)
+dc9f65be45554 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (John Brawn 2021-12-14 11:11:41 +0000 3566) continue;
+9a1c243aa5ded llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-13 08:31:49 +0000 3567) if (MaxCSFrameIndex >= I && I >= MinCSFrameIndex)
+9a1c243aa5ded llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-13 08:31:49 +0000 3568) continue;
+9a1c243aa5ded llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-13 08:31:49 +0000 3569) if (MFI.isDeadObjectIndex(I))
+9a1c243aa5ded llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-13 08:31:49 +0000 3570) continue;
+9a1c243aa5ded llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-13 08:31:49 +0000 3571)
+9a1c243aa5ded llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-13 08:31:49 +0000 3572) ObjectsToAllocate.push_back(I);
+9a1c243aa5ded llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-13 08:31:49 +0000 3573) }
+9a1c243aa5ded llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-13 08:31:49 +0000 3574)
+9a1c243aa5ded llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-13 08:31:49 +0000 3575) // Allocate all SVE locals and spills
+9a1c243aa5ded llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-13 08:31:49 +0000 3576) for (unsigned FI : ObjectsToAllocate) {
+1dffa2550b535 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Guillaume Chatelet 2020-04-01 13:49:04 +0000 3577) Align Alignment = MFI.getObjectAlign(FI);
+9a1c243aa5ded llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-13 08:31:49 +0000 3578) // FIXME: Given that the length of SVE vectors is not necessarily a power of
+9a1c243aa5ded llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-13 08:31:49 +0000 3579) // two, we'd need to align every object dynamically at runtime if the
+9a1c243aa5ded llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-13 08:31:49 +0000 3580) // alignment is larger than 16. This is not yet supported.
+1dffa2550b535 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Guillaume Chatelet 2020-04-01 13:49:04 +0000 3581) if (Alignment > Align(16))
+9a1c243aa5ded llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-13 08:31:49 +0000 3582) report_fatal_error(
+9a1c243aa5ded llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-13 08:31:49 +0000 3583) "Alignment of scalable vectors > 16 bytes is not yet supported");
+9a1c243aa5ded llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-13 08:31:49 +0000 3584)
+1dffa2550b535 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Guillaume Chatelet 2020-04-01 13:49:04 +0000 3585) Offset = alignTo(Offset + MFI.getObjectSize(FI), Alignment);
+9a1c243aa5ded llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-13 08:31:49 +0000 3586) if (AssignOffsets)
+9a1c243aa5ded llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-13 08:31:49 +0000 3587) Assign(FI, -Offset);
+9a1c243aa5ded llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-13 08:31:49 +0000 3588) }
+9a1c243aa5ded llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-13 08:31:49 +0000 3589)
+7774812965027 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-14 13:11:34 +0000 3590) return Offset;
+7774812965027 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-14 13:11:34 +0000 3591) }
+7774812965027 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-14 13:11:34 +0000 3592)
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3593) int64_t AArch64FrameLowering::estimateSVEStackObjectOffsets(
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3594) MachineFrameInfo &MFI) const {
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3595) int MinCSFrameIndex, MaxCSFrameIndex;
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3596) return determineSVEStackObjectOffsets(MFI, MinCSFrameIndex, MaxCSFrameIndex, false);
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3597) }
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3598)
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3599) int64_t AArch64FrameLowering::assignSVEStackObjectOffsets(
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3600) MachineFrameInfo &MFI, int &MinCSFrameIndex, int &MaxCSFrameIndex) const {
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3601) return determineSVEStackObjectOffsets(MFI, MinCSFrameIndex, MaxCSFrameIndex,
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3602) true);
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3603) }
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3604)
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 3605) void AArch64FrameLowering::processFunctionBeforeFrameFinalized(
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 3606) MachineFunction &MF, RegScavenger *RS) const {
+4f99b6f0fe425 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-03 11:33:50 +0000 3607) MachineFrameInfo &MFI = MF.getFrameInfo();
+4f99b6f0fe425 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-03 11:33:50 +0000 3608)
+4f99b6f0fe425 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-03 11:33:50 +0000 3609) assert(getStackGrowthDirection() == TargetFrameLowering::StackGrowsDown &&
+4f99b6f0fe425 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-03 11:33:50 +0000 3610) "Upwards growing stack unsupported");
+4f99b6f0fe425 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-03 11:33:50 +0000 3611)
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3612) int MinCSFrameIndex, MaxCSFrameIndex;
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3613) int64_t SVEStackSize =
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3614) assignSVEStackObjectOffsets(MFI, MinCSFrameIndex, MaxCSFrameIndex);
+4f99b6f0fe425 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-03 11:33:50 +0000 3615)
+4f99b6f0fe425 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-03 11:33:50 +0000 3616) AArch64FunctionInfo *AFI = MF.getInfo<AArch64FunctionInfo>();
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3617) AFI->setStackSizeSVE(alignTo(SVEStackSize, 16U));
+84a0c8e3ae928 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-11-05 16:54:54 +0000 3618) AFI->setMinMaxSVECSFrameIndex(MinCSFrameIndex, MaxCSFrameIndex);
+4f99b6f0fe425 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2019-10-03 11:33:50 +0000 3619)
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 3620) // If this function isn't doing Win64-style C++ EH, we don't need to do
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 3621) // anything.
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 3622) if (!MF.hasEHFunclets())
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 3623) return;
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 3624) const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo();
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 3625) WinEHFuncInfo &EHInfo = *MF.getWinEHFuncInfo();
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 3626)
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 3627) MachineBasicBlock &MBB = MF.front();
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 3628) auto MBBI = MBB.begin();
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 3629) while (MBBI != MBB.end() && MBBI->getFlag(MachineInstr::FrameSetup))
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 3630) ++MBBI;
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 3631)
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 3632) // Create an UnwindHelp object.
+494abe139a9aa llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Daniel Frampton 2020-03-31 13:12:54 -0700 3633) // The UnwindHelp object is allocated at the start of the fixed object area
+494abe139a9aa llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Daniel Frampton 2020-03-31 13:12:54 -0700 3634) int64_t FixedObject =
+494abe139a9aa llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Daniel Frampton 2020-03-31 13:12:54 -0700 3635) getFixedObjectSize(MF, AFI, /*IsWin64*/ true, /*IsFunclet*/ false);
+494abe139a9aa llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Daniel Frampton 2020-03-31 13:12:54 -0700 3636) int UnwindHelpFI = MFI.CreateFixedObject(/*Size*/ 8,
+494abe139a9aa llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Daniel Frampton 2020-03-31 13:12:54 -0700 3637) /*SPOffset*/ -FixedObject,
+494abe139a9aa llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Daniel Frampton 2020-03-31 13:12:54 -0700 3638) /*IsImmutable=*/false);
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 3639) EHInfo.UnwindHelpFrameIdx = UnwindHelpFI;
+494abe139a9aa llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Daniel Frampton 2020-03-31 13:12:54 -0700 3640)
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 3641) // We need to store -2 into the UnwindHelp object at the start of the
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 3642) // function.
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 3643) DebugLoc DL;
+d19a7060c6bd5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2019-02-28 20:38:45 +0000 3644) RS->enterBasicBlockEnd(MBB);
+d5f3b3b3b188d llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Jay Foad 2023-11-08 09:49:07 +0000 3645) RS->backward(MBBI);
+d6b0734837124 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Jim Lin 2022-01-19 17:25:52 +0800 3646) Register DstReg = RS->FindUnusedReg(&AArch64::GPR64commonRegClass);
+d19a7060c6bd5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2019-02-28 20:38:45 +0000 3647) assert(DstReg && "There must be a free register after frame setup");
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 3648) BuildMI(MBB, MBBI, DL, TII.get(AArch64::MOVi64imm), DstReg).addImm(-2);
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 3649) BuildMI(MBB, MBBI, DL, TII.get(AArch64::STURXi))
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 3650) .addReg(DstReg, getKillRegState(true))
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 3651) .addFrameIndex(UnwindHelpFI)
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 3652) .addImm(0);
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 3653) }
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 3654)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3655) namespace {
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3656) struct TagStoreInstr {
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3657) MachineInstr *MI;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3658) int64_t Offset, Size;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3659) explicit TagStoreInstr(MachineInstr *MI, int64_t Offset, int64_t Size)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3660) : MI(MI), Offset(Offset), Size(Size) {}
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3661) };
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3662)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3663) class TagStoreEdit {
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3664) MachineFunction *MF;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3665) MachineBasicBlock *MBB;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3666) MachineRegisterInfo *MRI;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3667) // Tag store instructions that are being replaced.
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3668) SmallVector<TagStoreInstr, 8> TagStores;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3669) // Combined memref arguments of the above instructions.
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3670) SmallVector<MachineMemOperand *, 8> CombinedMemRefs;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3671)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3672) // Replace allocation tags in [FrameReg + FrameRegOffset, FrameReg +
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3673) // FrameRegOffset + Size) with the address tag of SP.
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3674) Register FrameReg;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3675) StackOffset FrameRegOffset;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3676) int64_t Size;
+1ca0cb717a095 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kazu Hirata 2023-04-25 23:53:32 -0700 3677) // If not std::nullopt, move FrameReg to (FrameReg + FrameRegUpdate) at the
+1ca0cb717a095 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kazu Hirata 2023-04-25 23:53:32 -0700 3678) // end.
+4f7e5930abf3f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kazu Hirata 2022-11-25 21:57:21 -0800 3679) std::optional<int64_t> FrameRegUpdate;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3680) // MIFlags for any FrameReg updating instructions.
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3681) unsigned FrameRegUpdateFlags;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3682)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3683) // Use zeroing instruction variants.
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3684) bool ZeroData;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3685) DebugLoc DL;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3686)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3687) void emitUnrolled(MachineBasicBlock::iterator InsertI);
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3688) void emitLoop(MachineBasicBlock::iterator InsertI);
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3689)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3690) public:
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3691) TagStoreEdit(MachineBasicBlock *MBB, bool ZeroData)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3692) : MBB(MBB), ZeroData(ZeroData) {
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3693) MF = MBB->getParent();
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3694) MRI = &MF->getRegInfo();
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3695) }
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3696) // Add an instruction to be replaced. Instructions must be added in the
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3697) // ascending order of Offset, and have to be adjacent.
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3698) void addInstruction(TagStoreInstr I) {
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3699) assert((TagStores.empty() ||
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3700) TagStores.back().Offset + TagStores.back().Size == I.Offset) &&
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3701) "Non-adjacent tag store instructions.");
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3702) TagStores.push_back(I);
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3703) }
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3704) void clear() { TagStores.clear(); }
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3705) // Emit equivalent code at the given location, and erase the current set of
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3706) // instructions. May skip if the replacement is not profitable. May invalidate
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3707) // the input iterator and replace it with a valid one.
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3708) void emitCode(MachineBasicBlock::iterator &InsertI,
+24c84bd2363a7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-15 12:19:02 +0100 3709) const AArch64FrameLowering *TFI, bool TryMergeSPUpdate);
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3710) };
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3711)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3712) void TagStoreEdit::emitUnrolled(MachineBasicBlock::iterator InsertI) {
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3713) const AArch64InstrInfo *TII =
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3714) MF->getSubtarget<AArch64Subtarget>().getInstrInfo();
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3715)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3716) const int64_t kMinOffset = -256 * 16;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3717) const int64_t kMaxOffset = 255 * 16;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3718)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3719) Register BaseReg = FrameReg;
+73b6cb67dcdad llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-11-03 16:44:20 +0000 3720) int64_t BaseRegOffsetBytes = FrameRegOffset.getFixed();
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3721) if (BaseRegOffsetBytes < kMinOffset ||
+a4ab294bc01c8 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Mayer 2023-02-07 18:03:43 -0800 3722) BaseRegOffsetBytes + (Size - Size % 32) > kMaxOffset ||
+a4ab294bc01c8 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Mayer 2023-02-07 18:03:43 -0800 3723) // BaseReg can be FP, which is not necessarily aligned to 16-bytes. In
+a4ab294bc01c8 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Mayer 2023-02-07 18:03:43 -0800 3724) // that case, BaseRegOffsetBytes will not be aligned to 16 bytes, which
+a4ab294bc01c8 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Mayer 2023-02-07 18:03:43 -0800 3725) // is required for the offset of ST2G.
+a4ab294bc01c8 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Mayer 2023-02-07 18:03:43 -0800 3726) BaseRegOffsetBytes % 16 != 0) {
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3727) Register ScratchReg = MRI->createVirtualRegister(&AArch64::GPR64RegClass);
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3728) emitFrameOffset(*MBB, InsertI, DL, ScratchReg, BaseReg,
+73b6cb67dcdad llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-11-03 16:44:20 +0000 3729) StackOffset::getFixed(BaseRegOffsetBytes), TII);
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3730) BaseReg = ScratchReg;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3731) BaseRegOffsetBytes = 0;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3732) }
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3733)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3734) MachineInstr *LastI = nullptr;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3735) while (Size) {
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3736) int64_t InstrSize = (Size > 16) ? 32 : 16;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3737) unsigned Opcode =
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3738) InstrSize == 16
+0847cc06a6c4f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hsiangkai Wang 2023-01-16 04:21:51 +0000 3739) ? (ZeroData ? AArch64::STZGi : AArch64::STGi)
+0847cc06a6c4f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hsiangkai Wang 2023-01-16 04:21:51 +0000 3740) : (ZeroData ? AArch64::STZ2Gi : AArch64::ST2Gi);
+a4ab294bc01c8 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Florian Mayer 2023-02-07 18:03:43 -0800 3741) assert(BaseRegOffsetBytes % 16 == 0);
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3742) MachineInstr *I = BuildMI(*MBB, InsertI, DL, TII->get(Opcode))
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3743) .addReg(AArch64::SP)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3744) .addReg(BaseReg)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3745) .addImm(BaseRegOffsetBytes / 16)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3746) .setMemRefs(CombinedMemRefs);
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3747) // A store to [BaseReg, #0] should go last for an opportunity to fold the
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3748) // final SP adjustment in the epilogue.
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3749) if (BaseRegOffsetBytes == 0)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3750) LastI = I;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3751) BaseRegOffsetBytes += InstrSize;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3752) Size -= InstrSize;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3753) }
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3754)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3755) if (LastI)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3756) MBB->splice(InsertI, MBB, LastI);
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3757) }
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3758)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3759) void TagStoreEdit::emitLoop(MachineBasicBlock::iterator InsertI) {
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3760) const AArch64InstrInfo *TII =
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3761) MF->getSubtarget<AArch64Subtarget>().getInstrInfo();
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3762)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3763) Register BaseReg = FrameRegUpdate
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3764) ? FrameReg
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3765) : MRI->createVirtualRegister(&AArch64::GPR64RegClass);
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3766) Register SizeReg = MRI->createVirtualRegister(&AArch64::GPR64RegClass);
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3767)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3768) emitFrameOffset(*MBB, InsertI, DL, BaseReg, FrameReg, FrameRegOffset, TII);
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3769)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3770) int64_t LoopSize = Size;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3771) // If the loop size is not a multiple of 32, split off one 16-byte store at
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3772) // the end to fold BaseReg update into.
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3773) if (FrameRegUpdate && *FrameRegUpdate)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3774) LoopSize -= LoopSize % 32;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3775) MachineInstr *LoopI = BuildMI(*MBB, InsertI, DL,
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3776) TII->get(ZeroData ? AArch64::STZGloop_wback
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3777) : AArch64::STGloop_wback))
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3778) .addDef(SizeReg)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3779) .addDef(BaseReg)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3780) .addImm(LoopSize)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3781) .addReg(BaseReg)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3782) .setMemRefs(CombinedMemRefs);
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3783) if (FrameRegUpdate)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3784) LoopI->setFlags(FrameRegUpdateFlags);
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3785)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3786) int64_t ExtraBaseRegUpdate =
+73b6cb67dcdad llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-11-03 16:44:20 +0000 3787) FrameRegUpdate ? (*FrameRegUpdate - FrameRegOffset.getFixed() - Size) : 0;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3788) if (LoopSize < Size) {
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3789) assert(FrameRegUpdate);
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3790) assert(Size - LoopSize == 16);
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3791) // Tag 16 more bytes at BaseReg and update BaseReg.
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3792) BuildMI(*MBB, InsertI, DL,
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3793) TII->get(ZeroData ? AArch64::STZGPostIndex : AArch64::STGPostIndex))
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3794) .addDef(BaseReg)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3795) .addReg(BaseReg)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3796) .addReg(BaseReg)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3797) .addImm(1 + ExtraBaseRegUpdate / 16)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3798) .setMemRefs(CombinedMemRefs)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3799) .setMIFlags(FrameRegUpdateFlags);
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3800) } else if (ExtraBaseRegUpdate) {
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3801) // Update BaseReg.
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3802) BuildMI(
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3803) *MBB, InsertI, DL,
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3804) TII->get(ExtraBaseRegUpdate > 0 ? AArch64::ADDXri : AArch64::SUBXri))
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3805) .addDef(BaseReg)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3806) .addReg(BaseReg)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3807) .addImm(std::abs(ExtraBaseRegUpdate))
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3808) .addImm(0)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3809) .setMIFlags(FrameRegUpdateFlags);
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3810) }
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3811) }
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3812)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3813) // Check if *II is a register update that can be merged into STGloop that ends
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3814) // at (Reg + Size). RemainingOffset is the required adjustment to Reg after the
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3815) // end of the loop.
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3816) bool canMergeRegUpdate(MachineBasicBlock::iterator II, unsigned Reg,
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3817) int64_t Size, int64_t *TotalOffset) {
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3818) MachineInstr &MI = *II;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3819) if ((MI.getOpcode() == AArch64::ADDXri ||
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3820) MI.getOpcode() == AArch64::SUBXri) &&
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3821) MI.getOperand(0).getReg() == Reg && MI.getOperand(1).getReg() == Reg) {
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3822) unsigned Shift = AArch64_AM::getShiftValue(MI.getOperand(3).getImm());
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3823) int64_t Offset = MI.getOperand(2).getImm() << Shift;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3824) if (MI.getOpcode() == AArch64::SUBXri)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3825) Offset = -Offset;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3826) int64_t AbsPostOffset = std::abs(Offset - Size);
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3827) const int64_t kMaxOffset =
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3828) 0xFFF; // Max encoding for unshifted ADDXri / SUBXri
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3829) if (AbsPostOffset <= kMaxOffset && AbsPostOffset % 16 == 0) {
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3830) *TotalOffset = Offset;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3831) return true;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3832) }
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3833) }
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3834) return false;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3835) }
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3836)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3837) void mergeMemRefs(const SmallVectorImpl<TagStoreInstr> &TSE,
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3838) SmallVectorImpl<MachineMemOperand *> &MemRefs) {
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3839) MemRefs.clear();
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3840) for (auto &TS : TSE) {
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3841) MachineInstr *MI = TS.MI;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3842) // An instruction without memory operands may access anything. Be
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3843) // conservative and return an empty list.
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3844) if (MI->memoperands_empty()) {
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3845) MemRefs.clear();
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3846) return;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3847) }
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3848) MemRefs.append(MI->memoperands_begin(), MI->memoperands_end());
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3849) }
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3850) }
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3851)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3852) void TagStoreEdit::emitCode(MachineBasicBlock::iterator &InsertI,
+24c84bd2363a7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-15 12:19:02 +0100 3853) const AArch64FrameLowering *TFI,
+24c84bd2363a7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-15 12:19:02 +0100 3854) bool TryMergeSPUpdate) {
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3855) if (TagStores.empty())
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3856) return;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3857) TagStoreInstr &FirstTagStore = TagStores[0];
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3858) TagStoreInstr &LastTagStore = TagStores[TagStores.size() - 1];
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3859) Size = LastTagStore.Offset - FirstTagStore.Offset + LastTagStore.Size;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3860) DL = TagStores[0].MI->getDebugLoc();
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3861)
+2481f26ac3f22 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matt Arsenault 2020-04-07 16:33:58 -0400 3862) Register Reg;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3863) FrameRegOffset = TFI->resolveFrameOffsetReference(
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3864) *MF, FirstTagStore.Offset, false /*isFixed*/, false /*isSVE*/, Reg,
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3865) /*PreferFP=*/false, /*ForSimm=*/true);
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3866) FrameReg = Reg;
+20cde15415d2b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kazu Hirata 2022-12-02 20:36:06 -0800 3867) FrameRegUpdate = std::nullopt;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3868)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3869) mergeMemRefs(TagStores, CombinedMemRefs);
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3870)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3871) LLVM_DEBUG(dbgs() << "Replacing adjacent STG instructions:\n";
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3872) for (const auto &Instr
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3873) : TagStores) { dbgs() << " " << *Instr.MI; });
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3874)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3875) // Size threshold where a loop becomes shorter than a linear sequence of
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3876) // tagging instructions.
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3877) const int kSetTagLoopThreshold = 176;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3878) if (Size < kSetTagLoopThreshold) {
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3879) if (TagStores.size() < 2)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3880) return;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3881) emitUnrolled(InsertI);
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3882) } else {
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3883) MachineInstr *UpdateInstr = nullptr;
+24c84bd2363a7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-15 12:19:02 +0100 3884) int64_t TotalOffset = 0;
+24c84bd2363a7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-15 12:19:02 +0100 3885) if (TryMergeSPUpdate) {
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3886) // See if we can merge base register update into the STGloop.
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3887) // This is done in AArch64LoadStoreOptimizer for "normal" stores,
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3888) // but STGloop is way too unusual for that, and also it only
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3889) // realistically happens in function epilogue. Also, STGloop is expanded
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3890) // before that pass.
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3891) if (InsertI != MBB->end() &&
+73b6cb67dcdad llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-11-03 16:44:20 +0000 3892) canMergeRegUpdate(InsertI, FrameReg, FrameRegOffset.getFixed() + Size,
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3893) &TotalOffset)) {
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3894) UpdateInstr = &*InsertI++;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3895) LLVM_DEBUG(dbgs() << "Folding SP update into loop:\n "
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3896) << *UpdateInstr);
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3897) }
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3898) }
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3899)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3900) if (!UpdateInstr && TagStores.size() < 2)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3901) return;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3902)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3903) if (UpdateInstr) {
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3904) FrameRegUpdate = TotalOffset;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3905) FrameRegUpdateFlags = UpdateInstr->getFlags();
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3906) }
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3907) emitLoop(InsertI);
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3908) if (UpdateInstr)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3909) UpdateInstr->eraseFromParent();
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3910) }
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3911)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3912) for (auto &TS : TagStores)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3913) TS.MI->eraseFromParent();
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3914) }
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3915)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3916) bool isMergeableStackTaggingInstruction(MachineInstr &MI, int64_t &Offset,
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3917) int64_t &Size, bool &ZeroData) {
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3918) MachineFunction &MF = *MI.getParent()->getParent();
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3919) const MachineFrameInfo &MFI = MF.getFrameInfo();
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3920)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3921) unsigned Opcode = MI.getOpcode();
+0847cc06a6c4f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hsiangkai Wang 2023-01-16 04:21:51 +0000 3922) ZeroData = (Opcode == AArch64::STZGloop || Opcode == AArch64::STZGi ||
+0847cc06a6c4f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hsiangkai Wang 2023-01-16 04:21:51 +0000 3923) Opcode == AArch64::STZ2Gi);
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3924)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3925) if (Opcode == AArch64::STGloop || Opcode == AArch64::STZGloop) {
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3926) if (!MI.getOperand(0).isDead() || !MI.getOperand(1).isDead())
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3927) return false;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3928) if (!MI.getOperand(2).isImm() || !MI.getOperand(3).isFI())
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3929) return false;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3930) Offset = MFI.getObjectOffset(MI.getOperand(3).getIndex());
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3931) Size = MI.getOperand(2).getImm();
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3932) return true;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3933) }
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3934)
+0847cc06a6c4f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hsiangkai Wang 2023-01-16 04:21:51 +0000 3935) if (Opcode == AArch64::STGi || Opcode == AArch64::STZGi)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3936) Size = 16;
+0847cc06a6c4f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hsiangkai Wang 2023-01-16 04:21:51 +0000 3937) else if (Opcode == AArch64::ST2Gi || Opcode == AArch64::STZ2Gi)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3938) Size = 32;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3939) else
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3940) return false;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3941)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3942) if (MI.getOperand(0).getReg() != AArch64::SP || !MI.getOperand(1).isFI())
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3943) return false;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3944)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3945) Offset = MFI.getObjectOffset(MI.getOperand(1).getIndex()) +
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3946) 16 * MI.getOperand(2).getImm();
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3947) return true;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3948) }
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3949)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3950) // Detect a run of memory tagging instructions for adjacent stack frame slots,
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3951) // and replace them with a shorter instruction sequence:
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3952) // * replace STG + STG with ST2G
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3953) // * replace STGloop + STGloop with STGloop
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3954) // This code needs to run when stack slot offsets are already known, but before
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3955) // FrameIndex operands in STG instructions are eliminated.
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3956) MachineBasicBlock::iterator tryMergeAdjacentSTG(MachineBasicBlock::iterator II,
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3957) const AArch64FrameLowering *TFI,
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3958) RegScavenger *RS) {
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3959) bool FirstZeroData;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3960) int64_t Size, Offset;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3961) MachineInstr &MI = *II;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3962) MachineBasicBlock *MBB = MI.getParent();
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3963) MachineBasicBlock::iterator NextI = ++II;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3964) if (&MI == &MBB->instr_back())
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3965) return II;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3966) if (!isMergeableStackTaggingInstruction(MI, Offset, Size, FirstZeroData))
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3967) return II;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3968)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3969) SmallVector<TagStoreInstr, 4> Instrs;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3970) Instrs.emplace_back(&MI, Offset, Size);
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3971)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3972) constexpr int kScanLimit = 10;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3973) int Count = 0;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3974) for (MachineBasicBlock::iterator E = MBB->end();
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3975) NextI != E && Count < kScanLimit; ++NextI) {
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3976) MachineInstr &MI = *NextI;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3977) bool ZeroData;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3978) int64_t Size, Offset;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3979) // Collect instructions that update memory tags with a FrameIndex operand
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3980) // and (when applicable) constant size, and whose output registers are dead
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3981) // (the latter is almost always the case in practice). Since these
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3982) // instructions effectively have no inputs or outputs, we are free to skip
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3983) // any non-aliasing instructions in between without tracking used registers.
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3984) if (isMergeableStackTaggingInstruction(MI, Offset, Size, ZeroData)) {
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3985) if (ZeroData != FirstZeroData)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3986) break;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3987) Instrs.emplace_back(&MI, Offset, Size);
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3988) continue;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3989) }
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3990)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3991) // Only count non-transient, non-tagging instructions toward the scan
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3992) // limit.
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3993) if (!MI.isTransient())
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3994) ++Count;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3995)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3996) // Just in case, stop before the epilogue code starts.
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3997) if (MI.getFlag(MachineInstr::FrameSetup) ||
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3998) MI.getFlag(MachineInstr::FrameDestroy))
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 3999) break;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 4000)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 4001) // Reject anything that may alias the collected instructions.
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 4002) if (MI.mayLoadOrStore() || MI.hasUnmodeledSideEffects())
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 4003) break;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 4004) }
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 4005)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 4006) // New code will be inserted after the last tagging instruction we've found.
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 4007) MachineBasicBlock::iterator InsertI = Instrs.back().MI;
+6726c99f8893c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Karthika Devi C 2023-11-15 04:13:33 +0530 4008)
+6726c99f8893c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Karthika Devi C 2023-11-15 04:13:33 +0530 4009) // All the gathered stack tag instructions are merged and placed after
+6726c99f8893c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Karthika Devi C 2023-11-15 04:13:33 +0530 4010) // last tag store in the list. The check should be made if the nzcv
+6726c99f8893c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Karthika Devi C 2023-11-15 04:13:33 +0530 4011) // flag is live at the point where we are trying to insert. Otherwise
+6726c99f8893c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Karthika Devi C 2023-11-15 04:13:33 +0530 4012) // the nzcv flag might get clobbered if any stg loops are present.
+6726c99f8893c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Karthika Devi C 2023-11-15 04:13:33 +0530 4013)
+6726c99f8893c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Karthika Devi C 2023-11-15 04:13:33 +0530 4014) // FIXME : This approach of bailing out from merge is conservative in
+6726c99f8893c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Karthika Devi C 2023-11-15 04:13:33 +0530 4015) // some ways like even if stg loops are not present after merge the
+6726c99f8893c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Karthika Devi C 2023-11-15 04:13:33 +0530 4016) // insert list, this liveness check is done (which is not needed).
+7a0e222a17058 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Jay Foad 2024-03-07 08:16:52 +0000 4017) LivePhysRegs LiveRegs(*(MBB->getParent()->getSubtarget().getRegisterInfo()));
+6726c99f8893c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Karthika Devi C 2023-11-15 04:13:33 +0530 4018) LiveRegs.addLiveOuts(*MBB);
+6726c99f8893c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Karthika Devi C 2023-11-15 04:13:33 +0530 4019) for (auto I = MBB->rbegin();; ++I) {
+6726c99f8893c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Karthika Devi C 2023-11-15 04:13:33 +0530 4020) MachineInstr &MI = *I;
+6726c99f8893c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Karthika Devi C 2023-11-15 04:13:33 +0530 4021) if (MI == InsertI)
+6726c99f8893c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Karthika Devi C 2023-11-15 04:13:33 +0530 4022) break;
+6726c99f8893c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Karthika Devi C 2023-11-15 04:13:33 +0530 4023) LiveRegs.stepBackward(*I);
+6726c99f8893c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Karthika Devi C 2023-11-15 04:13:33 +0530 4024) }
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 4025) InsertI++;
+7a0e222a17058 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Jay Foad 2024-03-07 08:16:52 +0000 4026) if (LiveRegs.contains(AArch64::NZCV))
+6726c99f8893c llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Karthika Devi C 2023-11-15 04:13:33 +0530 4027) return InsertI;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 4028)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 4029) llvm::stable_sort(Instrs,
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 4030) [](const TagStoreInstr &Left, const TagStoreInstr &Right) {
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 4031) return Left.Offset < Right.Offset;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 4032) });
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 4033)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 4034) // Make sure that we don't have any overlapping stores.
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 4035) int64_t CurOffset = Instrs[0].Offset;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 4036) for (auto &Instr : Instrs) {
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 4037) if (CurOffset > Instr.Offset)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 4038) return NextI;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 4039) CurOffset = Instr.Offset + Instr.Size;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 4040) }
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 4041)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 4042) // Find contiguous runs of tagged memory and emit shorter instruction
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 4043) // sequencies for them when possible.
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 4044) TagStoreEdit TSE(MBB, FirstZeroData);
+4f7e5930abf3f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Kazu Hirata 2022-11-25 21:57:21 -0800 4045) std::optional<int64_t> EndOffset;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 4046) for (auto &Instr : Instrs) {
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 4047) if (EndOffset && *EndOffset != Instr.Offset) {
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 4048) // Found a gap.
+24c84bd2363a7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-15 12:19:02 +0100 4049) TSE.emitCode(InsertI, TFI, /*TryMergeSPUpdate = */ false);
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 4050) TSE.clear();
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 4051) }
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 4052)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 4053) TSE.addInstruction(Instr);
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 4054) EndOffset = Instr.Offset + Instr.Size;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 4055) }
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 4056)
+588ecc11b8959 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matt Arsenault 2022-12-16 12:13:47 -0500 4057) const MachineFunction *MF = MBB->getParent();
+24c84bd2363a7 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2022-04-15 12:19:02 +0100 4058) // Multiple FP/SP updates in a loop cannot be described by CFI instructions.
+588ecc11b8959 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matt Arsenault 2022-12-16 12:13:47 -0500 4059) TSE.emitCode(
+588ecc11b8959 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matt Arsenault 2022-12-16 12:13:47 -0500 4060) InsertI, TFI, /*TryMergeSPUpdate = */
+588ecc11b8959 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matt Arsenault 2022-12-16 12:13:47 -0500 4061) !MF->getInfo<AArch64FunctionInfo>()->needsAsyncDwarfUnwindInfo(*MF));
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 4062)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 4063) return InsertI;
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 4064) }
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 4065) } // namespace
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 4066)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 4067) void AArch64FrameLowering::processFunctionBeforeFrameIndicesReplaced(
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 4068) MachineFunction &MF, RegScavenger *RS = nullptr) const {
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 4069) if (StackTaggingMergeSetTag)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 4070) for (auto &BB : MF)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 4071) for (MachineBasicBlock::iterator II = BB.begin(); II != BB.end();)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 4072) II = tryMergeAdjacentSTG(II, this, RS);
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 4073) }
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 4074)
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 4075) /// For Win64 AArch64 EH, the offset to the Unwind object is from the SP
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 4076) /// before the update. This is easily retrieved as it is exactly the offset
+d081962dead08 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-01-08 14:48:37 -0800 4077) /// that is set in processFunctionBeforeFrameFinalized.
+d57bba7cf831a llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-11-04 08:56:54 +0000 4078) StackOffset AArch64FrameLowering::getFrameIndexReferencePreferSP(
+2481f26ac3f22 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Matt Arsenault 2020-04-07 16:33:58 -0400 4079) const MachineFunction &MF, int FI, Register &FrameReg,
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 4080) bool IgnoreSPUpdates) const {
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 4081) const MachineFrameInfo &MFI = MF.getFrameInfo();
+494abe139a9aa llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Daniel Frampton 2020-03-31 13:12:54 -0700 4082) if (IgnoreSPUpdates) {
+494abe139a9aa llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Daniel Frampton 2020-03-31 13:12:54 -0700 4083) LLVM_DEBUG(dbgs() << "Offset from the SP for " << FI << " is "
+494abe139a9aa llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Daniel Frampton 2020-03-31 13:12:54 -0700 4084) << MFI.getObjectOffset(FI) << "\n");
+494abe139a9aa llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Daniel Frampton 2020-03-31 13:12:54 -0700 4085) FrameReg = AArch64::SP;
+d57bba7cf831a llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Sander de Smalen 2020-11-04 08:56:54 +0000 4086) return StackOffset::getFixed(MFI.getObjectOffset(FI));
+494abe139a9aa llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Daniel Frampton 2020-03-31 13:12:54 -0700 4087) }
+494abe139a9aa llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Daniel Frampton 2020-03-31 13:12:54 -0700 4088)
+3557f493534bb llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Serguei Katkov 2021-10-05 13:28:23 +0700 4089) // Go to common code if we cannot provide sp + offset.
+3557f493534bb llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Serguei Katkov 2021-10-05 13:28:23 +0700 4090) if (MFI.hasVarSizedObjects() ||
+3557f493534bb llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Serguei Katkov 2021-10-05 13:28:23 +0700 4091) MF.getInfo<AArch64FunctionInfo>()->getStackSizeSVE() ||
+3557f493534bb llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Serguei Katkov 2021-10-05 13:28:23 +0700 4092) MF.getSubtarget().getRegisterInfo()->hasStackRealignment(MF))
+3557f493534bb llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Serguei Katkov 2021-10-05 13:28:23 +0700 4093) return getFrameIndexReference(MF, FI, FrameReg);
+3557f493534bb llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Serguei Katkov 2021-10-05 13:28:23 +0700 4094)
+3557f493534bb llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Serguei Katkov 2021-10-05 13:28:23 +0700 4095) FrameReg = AArch64::SP;
+3557f493534bb llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Serguei Katkov 2021-10-05 13:28:23 +0700 4096) return getStackOffset(MF, MFI.getObjectOffset(FI));
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 4097) }
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 4098)
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 4099) /// The parent frame offset (aka dispFrame) is only used on X86_64 to retrieve
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 4100) /// the parent's frame pointer
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 4101) unsigned AArch64FrameLowering::getWinEHParentFrameOffset(
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 4102) const MachineFunction &MF) const {
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 4103) return 0;
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 4104) }
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 4105)
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 4106) /// Funclets only need to account for space for the callee saved registers,
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 4107) /// as the locals are accounted for in the parent's stack frame.
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 4108) unsigned AArch64FrameLowering::getWinEHFuncletFrameSize(
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 4109) const MachineFunction &MF) const {
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 4110) // This is the size of the pushed CSRs.
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 4111) unsigned CSSize =
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 4112) MF.getInfo<AArch64FunctionInfo>()->getCalleeSavedStackSize();
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 4113) // This is the amount of stack a funclet needs to allocate.
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 4114) return alignTo(CSSize + MF.getFrameInfo().getMaxCallFrameSize(),
+b727aabcb8c67 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Guillaume Chatelet 2020-03-26 17:51:25 +0000 4115) getStackAlign());
+ad1151cf6a75f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Eli Friedman 2018-11-09 23:33:30 +0000 4116) }
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4117)
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4118) namespace {
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4119) struct FrameObject {
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4120) bool IsValid = false;
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4121) // Index of the object in MFI.
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4122) int ObjectIndex = 0;
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4123) // Group ID this object belongs to.
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4124) int GroupIndex = -1;
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4125) // This object should be placed first (closest to SP).
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4126) bool ObjectFirst = false;
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4127) // This object's group (which always contains the object with
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4128) // ObjectFirst==true) should be placed first.
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4129) bool GroupFirst = false;
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4130) };
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4131)
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4132) class GroupBuilder {
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4133) SmallVector<int, 8> CurrentMembers;
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4134) int NextGroupIndex = 0;
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4135) std::vector<FrameObject> &Objects;
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4136)
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4137) public:
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4138) GroupBuilder(std::vector<FrameObject> &Objects) : Objects(Objects) {}
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4139) void AddMember(int Index) { CurrentMembers.push_back(Index); }
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4140) void EndCurrentGroup() {
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4141) if (CurrentMembers.size() > 1) {
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4142) // Create a new group with the current member list. This might remove them
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4143) // from their pre-existing groups. That's OK, dealing with overlapping
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4144) // groups is too hard and unlikely to make a difference.
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4145) LLVM_DEBUG(dbgs() << "group:");
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4146) for (int Index : CurrentMembers) {
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4147) Objects[Index].GroupIndex = NextGroupIndex;
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4148) LLVM_DEBUG(dbgs() << " " << Index);
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4149) }
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4150) LLVM_DEBUG(dbgs() << "\n");
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4151) NextGroupIndex++;
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4152) }
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4153) CurrentMembers.clear();
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4154) }
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4155) };
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4156)
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4157) bool FrameObjectCompare(const FrameObject &A, const FrameObject &B) {
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4158) // Objects at a lower index are closer to FP; objects at a higher index are
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4159) // closer to SP.
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4160) //
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4161) // For consistency in our comparison, all invalid objects are placed
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4162) // at the end. This also allows us to stop walking when we hit the
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4163) // first invalid item after it's all sorted.
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4164) //
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4165) // The "first" object goes first (closest to SP), followed by the members of
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4166) // the "first" group.
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4167) //
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4168) // The rest are sorted by the group index to keep the groups together.
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4169) // Higher numbered groups are more likely to be around longer (i.e. untagged
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4170) // in the function epilogue and not at some earlier point). Place them closer
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4171) // to SP.
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4172) //
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4173) // If all else equal, sort by the object index to keep the objects in the
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4174) // original order.
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4175) return std::make_tuple(!A.IsValid, A.ObjectFirst, A.GroupFirst, A.GroupIndex,
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4176) A.ObjectIndex) <
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4177) std::make_tuple(!B.IsValid, B.ObjectFirst, B.GroupFirst, B.GroupIndex,
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4178) B.ObjectIndex);
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4179) }
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4180) } // namespace
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4181)
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4182) void AArch64FrameLowering::orderFrameObjects(
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4183) const MachineFunction &MF, SmallVectorImpl<int> &ObjectsToAllocate) const {
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4184) if (!OrderFrameObjects || ObjectsToAllocate.empty())
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4185) return;
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4186)
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4187) const MachineFrameInfo &MFI = MF.getFrameInfo();
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4188) std::vector<FrameObject> FrameObjects(MFI.getObjectIndexEnd());
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4189) for (auto &Obj : ObjectsToAllocate) {
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4190) FrameObjects[Obj].IsValid = true;
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4191) FrameObjects[Obj].ObjectIndex = Obj;
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4192) }
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4193)
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4194) // Identify stack slots that are tagged at the same time.
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4195) GroupBuilder GB(FrameObjects);
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4196) for (auto &MBB : MF) {
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4197) for (auto &MI : MBB) {
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4198) if (MI.isDebugInstr())
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4199) continue;
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4200) int OpIndex;
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4201) switch (MI.getOpcode()) {
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4202) case AArch64::STGloop:
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4203) case AArch64::STZGloop:
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4204) OpIndex = 3;
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4205) break;
+0847cc06a6c4f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hsiangkai Wang 2023-01-16 04:21:51 +0000 4206) case AArch64::STGi:
+0847cc06a6c4f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hsiangkai Wang 2023-01-16 04:21:51 +0000 4207) case AArch64::STZGi:
+0847cc06a6c4f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hsiangkai Wang 2023-01-16 04:21:51 +0000 4208) case AArch64::ST2Gi:
+0847cc06a6c4f llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Hsiangkai Wang 2023-01-16 04:21:51 +0000 4209) case AArch64::STZ2Gi:
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4210) OpIndex = 1;
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4211) break;
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4212) default:
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4213) OpIndex = -1;
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4214) }
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4215)
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4216) int TaggedFI = -1;
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4217) if (OpIndex >= 0) {
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4218) const MachineOperand &MO = MI.getOperand(OpIndex);
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4219) if (MO.isFI()) {
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4220) int FI = MO.getIndex();
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4221) if (FI >= 0 && FI < MFI.getObjectIndexEnd() &&
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4222) FrameObjects[FI].IsValid)
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4223) TaggedFI = FI;
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4224) }
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4225) }
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4226)
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4227) // If this is a stack tagging instruction for a slot that is not part of a
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4228) // group yet, either start a new group or add it to the current one.
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4229) if (TaggedFI >= 0)
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4230) GB.AddMember(TaggedFI);
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4231) else
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4232) GB.EndCurrentGroup();
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4233) }
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4234) // Groups should never span multiple basic blocks.
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4235) GB.EndCurrentGroup();
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4236) }
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4237)
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4238) // If the function's tagged base pointer is pinned to a stack slot, we want to
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4239) // put that slot first when possible. This will likely place it at SP + 0,
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4240) // and save one instruction when generating the base pointer because IRG does
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4241) // not allow an immediate offset.
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4242) const AArch64FunctionInfo &AFI = *MF.getInfo<AArch64FunctionInfo>();
+b0df70403d20e llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Fangrui Song 2022-12-04 22:43:14 +0000 4243) std::optional<int> TBPI = AFI.getTaggedBasePointerIndex();
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4244) if (TBPI) {
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4245) FrameObjects[*TBPI].ObjectFirst = true;
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4246) FrameObjects[*TBPI].GroupFirst = true;
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4247) int FirstGroupIndex = FrameObjects[*TBPI].GroupIndex;
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4248) if (FirstGroupIndex >= 0)
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4249) for (FrameObject &Object : FrameObjects)
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4250) if (Object.GroupIndex == FirstGroupIndex)
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4251) Object.GroupFirst = true;
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4252) }
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4253)
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4254) llvm::stable_sort(FrameObjects, FrameObjectCompare);
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4255)
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4256) int i = 0;
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4257) for (auto &Obj : FrameObjects) {
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4258) // All invalid items are sorted at the end, so it's safe to stop.
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4259) if (!Obj.IsValid)
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4260) break;
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4261) ObjectsToAllocate[i++] = Obj.ObjectIndex;
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4262) }
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4263)
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4264) LLVM_DEBUG(dbgs() << "Final frame order:\n"; for (auto &Obj
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4265) : FrameObjects) {
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4266) if (!Obj.IsValid)
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4267) break;
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4268) dbgs() << " " << Obj.ObjectIndex << ": group " << Obj.GroupIndex;
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4269) if (Obj.ObjectFirst)
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4270) dbgs() << ", first";
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4271) if (Obj.GroupFirst)
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4272) dbgs() << ", group-first";
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4273) dbgs() << "\n";
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4274) });
+2e794a46b58c5 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Evgenii Stepanov 2020-10-02 13:09:13 -0700 4275) }
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4276)
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4277) /// Emit a loop to decrement SP until it is equal to TargetReg, with probes at
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4278) /// least every ProbeSize bytes. Returns an iterator of the first instruction
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4279) /// after the loop. The difference between SP and TargetReg must be an exact
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4280) /// multiple of ProbeSize.
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4281) MachineBasicBlock::iterator
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4282) AArch64FrameLowering::inlineStackProbeLoopExactMultiple(
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4283) MachineBasicBlock::iterator MBBI, int64_t ProbeSize,
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4284) Register TargetReg) const {
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4285) MachineBasicBlock &MBB = *MBBI->getParent();
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4286) MachineFunction &MF = *MBB.getParent();
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4287) const AArch64InstrInfo *TII =
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4288) MF.getSubtarget<AArch64Subtarget>().getInstrInfo();
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4289) DebugLoc DL = MBB.findDebugLoc(MBBI);
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4290)
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4291) MachineFunction::iterator MBBInsertPoint = std::next(MBB.getIterator());
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4292) MachineBasicBlock *LoopMBB = MF.CreateMachineBasicBlock(MBB.getBasicBlock());
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4293) MF.insert(MBBInsertPoint, LoopMBB);
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4294) MachineBasicBlock *ExitMBB = MF.CreateMachineBasicBlock(MBB.getBasicBlock());
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4295) MF.insert(MBBInsertPoint, ExitMBB);
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4296)
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4297) // SUB SP, SP, #ProbeSize (or equivalent if ProbeSize is not encodable
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4298) // in SUB).
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4299) emitFrameOffset(*LoopMBB, LoopMBB->end(), DL, AArch64::SP, AArch64::SP,
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4300) StackOffset::getFixed(-ProbeSize), TII,
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4301) MachineInstr::FrameSetup);
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4302) // STR XZR, [SP]
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4303) BuildMI(*LoopMBB, LoopMBB->end(), DL, TII->get(AArch64::STRXui))
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4304) .addReg(AArch64::XZR)
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4305) .addReg(AArch64::SP)
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4306) .addImm(0)
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4307) .setMIFlags(MachineInstr::FrameSetup);
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4308) // CMP SP, TargetReg
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4309) BuildMI(*LoopMBB, LoopMBB->end(), DL, TII->get(AArch64::SUBSXrx64),
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4310) AArch64::XZR)
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4311) .addReg(AArch64::SP)
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4312) .addReg(TargetReg)
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4313) .addImm(AArch64_AM::getArithExtendImm(AArch64_AM::UXTX, 0))
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4314) .setMIFlags(MachineInstr::FrameSetup);
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4315) // B.CC Loop
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4316) BuildMI(*LoopMBB, LoopMBB->end(), DL, TII->get(AArch64::Bcc))
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4317) .addImm(AArch64CC::NE)
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4318) .addMBB(LoopMBB)
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4319) .setMIFlags(MachineInstr::FrameSetup);
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4320)
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4321) LoopMBB->addSuccessor(ExitMBB);
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4322) LoopMBB->addSuccessor(LoopMBB);
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4323) // Synthesize the exit MBB.
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4324) ExitMBB->splice(ExitMBB->end(), &MBB, MBBI, MBB.end());
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4325) ExitMBB->transferSuccessorsAndUpdatePHIs(&MBB);
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4326) MBB.addSuccessor(LoopMBB);
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4327) // Update liveins.
+ff4636a4ab00b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Oskar Wirga 2024-01-30 19:33:04 -0800 4328) bool anyChange = false;
+ff4636a4ab00b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Oskar Wirga 2024-01-30 19:33:04 -0800 4329) do {
+ff4636a4ab00b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Oskar Wirga 2024-01-30 19:33:04 -0800 4330) anyChange = recomputeLiveIns(*ExitMBB) || recomputeLiveIns(*LoopMBB);
+ff4636a4ab00b llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Oskar Wirga 2024-01-30 19:33:04 -0800 4331) } while (anyChange);
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4332)
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4333) return ExitMBB->begin();
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4334) }
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4335)
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4336) void AArch64FrameLowering::inlineStackProbeFixed(
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4337) MachineBasicBlock::iterator MBBI, Register ScratchReg, int64_t FrameSize,
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4338) StackOffset CFAOffset) const {
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4339) MachineBasicBlock *MBB = MBBI->getParent();
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4340) MachineFunction &MF = *MBB->getParent();
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4341) const AArch64InstrInfo *TII =
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4342) MF.getSubtarget<AArch64Subtarget>().getInstrInfo();
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4343) AArch64FunctionInfo *AFI = MF.getInfo<AArch64FunctionInfo>();
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4344) bool EmitAsyncCFI = AFI->needsAsyncDwarfUnwindInfo(MF);
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4345) bool HasFP = hasFP(MF);
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4346)
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4347) DebugLoc DL;
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4348) int64_t ProbeSize = MF.getInfo<AArch64FunctionInfo>()->getStackProbeSize();
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4349) int64_t NumBlocks = FrameSize / ProbeSize;
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4350) int64_t ResidualSize = FrameSize % ProbeSize;
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4351)
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4352) LLVM_DEBUG(dbgs() << "Stack probing: total " << FrameSize << " bytes, "
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4353) << NumBlocks << " blocks of " << ProbeSize
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4354) << " bytes, plus " << ResidualSize << " bytes\n");
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4355)
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4356) // Decrement SP by NumBlock * ProbeSize bytes, with either unrolled or
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4357) // ordinary loop.
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4358) if (NumBlocks <= AArch64::StackProbeMaxLoopUnroll) {
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4359) for (int i = 0; i < NumBlocks; ++i) {
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4360) // SUB SP, SP, #ProbeSize (or equivalent if ProbeSize is not
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4361) // encodable in a SUB).
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4362) emitFrameOffset(*MBB, MBBI, DL, AArch64::SP, AArch64::SP,
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4363) StackOffset::getFixed(-ProbeSize), TII,
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4364) MachineInstr::FrameSetup, false, false, nullptr,
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4365) EmitAsyncCFI && !HasFP, CFAOffset);
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4366) CFAOffset += StackOffset::getFixed(ProbeSize);
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4367) // STR XZR, [SP]
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4368) BuildMI(*MBB, MBBI, DL, TII->get(AArch64::STRXui))
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4369) .addReg(AArch64::XZR)
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4370) .addReg(AArch64::SP)
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4371) .addImm(0)
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4372) .setMIFlags(MachineInstr::FrameSetup);
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4373) }
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4374) } else if (NumBlocks != 0) {
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4375) // SUB ScratchReg, SP, #FrameSize (or equivalent if FrameSize is not
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4376) // encodable in ADD). ScrathReg may temporarily become the CFA register.
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4377) emitFrameOffset(*MBB, MBBI, DL, ScratchReg, AArch64::SP,
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4378) StackOffset::getFixed(-ProbeSize * NumBlocks), TII,
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4379) MachineInstr::FrameSetup, false, false, nullptr,
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4380) EmitAsyncCFI && !HasFP, CFAOffset);
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4381) CFAOffset += StackOffset::getFixed(ProbeSize * NumBlocks);
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4382) MBBI = inlineStackProbeLoopExactMultiple(MBBI, ProbeSize, ScratchReg);
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4383) MBB = MBBI->getParent();
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4384) if (EmitAsyncCFI && !HasFP) {
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4385) // Set the CFA register back to SP.
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4386) const AArch64RegisterInfo &RegInfo =
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4387) *MF.getSubtarget<AArch64Subtarget>().getRegisterInfo();
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4388) unsigned Reg = RegInfo.getDwarfRegNum(AArch64::SP, true);
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4389) unsigned CFIIndex =
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4390) MF.addFrameInst(MCCFIInstruction::createDefCfaRegister(nullptr, Reg));
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4391) BuildMI(*MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4392) .addCFIIndex(CFIIndex)
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4393) .setMIFlags(MachineInstr::FrameSetup);
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4394) }
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4395) }
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4396)
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4397) if (ResidualSize != 0) {
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4398) // SUB SP, SP, #ResidualSize (or equivalent if ResidualSize is not encodable
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4399) // in SUB).
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4400) emitFrameOffset(*MBB, MBBI, DL, AArch64::SP, AArch64::SP,
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4401) StackOffset::getFixed(-ResidualSize), TII,
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4402) MachineInstr::FrameSetup, false, false, nullptr,
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4403) EmitAsyncCFI && !HasFP, CFAOffset);
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4404) if (ResidualSize > AArch64::StackProbeMaxUnprobedStack) {
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4405) // STR XZR, [SP]
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4406) BuildMI(*MBB, MBBI, DL, TII->get(AArch64::STRXui))
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4407) .addReg(AArch64::XZR)
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4408) .addReg(AArch64::SP)
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4409) .addImm(0)
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4410) .setMIFlags(MachineInstr::FrameSetup);
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4411) }
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4412) }
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4413) }
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4414)
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4415) void AArch64FrameLowering::inlineStackProbe(MachineFunction &MF,
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4416) MachineBasicBlock &MBB) const {
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4417) // Get the instructions that need to be replaced. We emit at most two of
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4418) // these. Remember them in order to avoid complications coming from the need
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4419) // to traverse the block while potentially creating more blocks.
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4420) SmallVector<MachineInstr *, 4> ToReplace;
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4421) for (MachineInstr &MI : MBB)
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4422) if (MI.getOpcode() == AArch64::PROBED_STACKALLOC ||
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4423) MI.getOpcode() == AArch64::PROBED_STACKALLOC_VAR)
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4424) ToReplace.push_back(&MI);
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4425)
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4426) for (MachineInstr *MI : ToReplace) {
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4427) if (MI->getOpcode() == AArch64::PROBED_STACKALLOC) {
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4428) Register ScratchReg = MI->getOperand(0).getReg();
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4429) int64_t FrameSize = MI->getOperand(1).getImm();
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4430) StackOffset CFAOffset = StackOffset::get(MI->getOperand(2).getImm(),
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4431) MI->getOperand(3).getImm());
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4432) inlineStackProbeFixed(MI->getIterator(), ScratchReg, FrameSize,
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4433) CFAOffset);
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4434) } else {
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4435) assert(MI->getOpcode() == AArch64::PROBED_STACKALLOC_VAR &&
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4436) "Stack probe pseudo-instruction expected");
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4437) const AArch64InstrInfo *TII =
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4438) MI->getMF()->getSubtarget<AArch64Subtarget>().getInstrInfo();
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4439) Register TargetReg = MI->getOperand(0).getReg();
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4440) (void)TII->probedStackAlloc(MI->getIterator(), TargetReg, true);
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4441) }
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4442) MI->eraseFromParent();
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4443) }
+cc944f502f1ee llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (Momchil Velikov 2023-11-30 17:41:51 +0000 4444) }
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