[compiler-rt] [llvm] [compiler-rt][X86] Unify getIntelProcessorTypeAndSubtype (PR #97861)
Aiden Grossman via llvm-commits
llvm-commits at lists.llvm.org
Fri Jul 5 14:44:30 PDT 2024
https://github.com/boomanaiden154 updated https://github.com/llvm/llvm-project/pull/97861
>From 8118dcebce4f69d0a03615ca5639912ca40479d5 Mon Sep 17 00:00:00 2001
From: Aiden Grossman <aidengrossman at google.com>
Date: Fri, 5 Jul 2024 21:32:15 +0000
Subject: [PATCH 1/4] [compiler-rt][X86] Unify getIntelProcessorTypeAndSubtype
This patch unifies getIntelProcessorTypeAndSubtype between LLVM and
compiler-rt as there is a reasonable amount of divergence between the
two implementations.
This patch is one step in refactoring out several blocks of code in
these two files to identical .inc files that can be tested that they are
the same to better facilitate code sharing between LLVM and compiler-rt.
---
compiler-rt/lib/builtins/cpu_model/x86.c | 118 +++++++++++++++++++++--
llvm/lib/TargetParser/Host.cpp | 114 +++++++++++++---------
2 files changed, 181 insertions(+), 51 deletions(-)
diff --git a/compiler-rt/lib/builtins/cpu_model/x86.c b/compiler-rt/lib/builtins/cpu_model/x86.c
index 7e8acb3e73eda..7aa5642bd0e94 100644
--- a/compiler-rt/lib/builtins/cpu_model/x86.c
+++ b/compiler-rt/lib/builtins/cpu_model/x86.c
@@ -144,8 +144,8 @@ enum ProcessorFeatures {
FEATURE_3DNOW,
// FEATURE_3DNOWP,
FEATURE_ADX = 40,
- // FEATURE_ABM,
- FEATURE_CLDEMOTE = 42,
+ FEATURE_64BIT,
+ FEATURE_CLDEMOTE,
FEATURE_CLFLUSHOPT,
FEATURE_CLWB,
FEATURE_CLZERO,
@@ -374,11 +374,22 @@ static const char *getIntelProcessorTypeAndSubtype(unsigned Family,
unsigned *Subtype) {
#define testFeature(F) (Features[F / 32] & (1 << (F % 32))) != 0
- // We select CPU strings to match the code in Host.cpp, but we don't use them
- // in compiler-rt.
const char *CPU = 0;
switch (Family) {
+ case 3:
+ CPU = "i386";
+ break;
+ case 4:
+ CPU = "i486";
+ break;
+ case 5:
+ if (testFeature(FEATURE_MMX)) {
+ CPU = "pentium-mmx";
+ break;
+ }
+ CPU = "pentium";
+ break;
case 6:
switch (Model) {
case 0x0f: // Intel Core 2 Duo processor, Intel Core 2 Duo mobile
@@ -566,7 +577,7 @@ static const char *getIntelProcessorTypeAndSubtype(unsigned Family,
*Subtype = INTEL_COREI7_SAPPHIRERAPIDS;
break;
- // Granite Rapids:
+ // Graniterapids:
case 0xad:
CPU = "graniterapids";
*Type = INTEL_COREI7;
@@ -604,7 +615,7 @@ static const char *getIntelProcessorTypeAndSubtype(unsigned Family,
case 0x5f: // Denverton
CPU = "goldmont";
*Type = INTEL_GOLDMONT;
- break; // "goldmont"
+ break;
case 0x7a:
CPU = "goldmont-plus";
*Type = INTEL_GOLDMONT_PLUS;
@@ -636,6 +647,7 @@ static const char *getIntelProcessorTypeAndSubtype(unsigned Family,
*Subtype = INTEL_CLEARWATERFOREST;
break;
+ // Xeon Phi (Knights Landing + Knights Mill):
case 0x57:
CPU = "knl";
*Type = INTEL_KNL;
@@ -646,10 +658,102 @@ static const char *getIntelProcessorTypeAndSubtype(unsigned Family,
*Type = INTEL_KNM;
break;
- default: // Unknown family 6 CPU.
+ default: // Unknown family 6 CPU, try to guess.
+ // TODO detect tigerlake host from model
+ if (testFeature(FEATURE_AVX512VP2INTERSECT)) {
+ CPU = "tigerlake";
+ *Type = INTEL_COREI7;
+ *Subtype = INTEL_COREI7_TIGERLAKE;
+ } else if (testFeature(FEATURE_AVX512VBMI2)) {
+ CPU = "icelake-client";
+ *Type = INTEL_COREI7;
+ *Subtype = INTEL_COREI7_ICELAKE_CLIENT;
+ } else if (testFeature(FEATURE_AVX512VBMI)) {
+ CPU = "cannonlake";
+ *Type = INTEL_COREI7;
+ *Subtype = INTEL_COREI7_CANNONLAKE;
+ } else if (testFeature(FEATURE_AVX512BF16)) {
+ CPU = "cooperlake";
+ *Type = INTEL_COREI7;
+ *Subtype = INTEL_COREI7_COOPERLAKE;
+ } else if (testFeature(FEATURE_AVX512VNNI)) {
+ CPU = "cascadelake";
+ *Type = INTEL_COREI7;
+ *Subtype = INTEL_COREI7_CASCADELAKE;
+ } else if (testFeature(FEATURE_AVX512VL)) {
+ CPU = "skylake-avx512";
+ *Type = INTEL_COREI7;
+ *Subtype = INTEL_COREI7_SKYLAKE_AVX512;
+ } else if (testFeature(FEATURE_CLFLUSHOPT)) {
+ if (testFeature(FEATURE_SHA)) {
+ CPU = "goldmont";
+ *Type = INTEL_GOLDMONT;
+ } else {
+ CPU = "skylake";
+ *Type = INTEL_COREI7;
+ *Subtype = INTEL_COREI7_SKYLAKE;
+ }
+ } else if (testFeature(FEATURE_ADX)) {
+ CPU = "broadwell";
+ *Type = INTEL_COREI7;
+ *Subtype = INTEL_COREI7_BROADWELL;
+ } else if (testFeature(FEATURE_AVX2)) {
+ CPU = "haswell";
+ *Type = INTEL_COREI7;
+ *Subtype = INTEL_COREI7_HASWELL;
+ } else if (testFeature(FEATURE_AVX)) {
+ CPU = "sandybridge";
+ *Type = INTEL_COREI7;
+ *Subtype = INTEL_COREI7_SANDYBRIDGE;
+ } else if (testFeature(FEATURE_SSE4_2)) {
+ if (testFeature(FEATURE_MOVBE)) {
+ CPU = "silvermont";
+ *Type = INTEL_SILVERMONT;
+ } else {
+ CPU = "nehalem";
+ *Type = INTEL_COREI7;
+ *Subtype = INTEL_COREI7_NEHALEM;
+ }
+ } else if (testFeature(FEATURE_SSE4_1)) {
+ CPU = "penryn";
+ *Type = INTEL_CORE2;
+ } else if (testFeature(FEATURE_SSSE3)) {
+ if (testFeature(FEATURE_MOVBE)) {
+ CPU = "bonnell";
+ *Type = INTEL_BONNELL;
+ } else {
+ CPU = "core2";
+ *Type = INTEL_CORE2;
+ }
+ } else if (testFeature(FEATURE_64BIT)) {
+ CPU = "core2";
+ *Type = INTEL_CORE2;
+ } else if (testFeature(FEATURE_SSE3)) {
+ CPU = "yonah";
+ } else if (testFeature(FEATURE_SSE2)) {
+ CPU = "pentium-m";
+ } else if (testFeature(FEATURE_SSE)) {
+ CPU = "pentium3";
+ } else if (testFeature(FEATURE_MMX)) {
+ CPU = "pentium2";
+ } else {
+ CPU = "pentiumpro";
+ }
break;
}
break;
+ case 15: {
+ if (testFeature(FEATURE_64BIT)) {
+ CPU = "nocona";
+ break;
+ }
+ if (testFeature(FEATURE_SSE3)) {
+ CPU = "prescott";
+ break;
+ }
+ CPU = "pentium4";
+ break;
+ }
default:
break; // Unknown.
}
diff --git a/llvm/lib/TargetParser/Host.cpp b/llvm/lib/TargetParser/Host.cpp
index 2ea56746aff24..6486d3c57bb0c 100644
--- a/llvm/lib/TargetParser/Host.cpp
+++ b/llvm/lib/TargetParser/Host.cpp
@@ -703,15 +703,14 @@ static void detectX86FamilyModel(unsigned EAX, unsigned *Family,
}
}
-static StringRef
-getIntelProcessorTypeAndSubtype(unsigned Family, unsigned Model,
- const unsigned *Features,
- unsigned *Type, unsigned *Subtype) {
- auto testFeature = [&](unsigned F) {
- return (Features[F / 32] & (1U << (F % 32))) != 0;
- };
+static const char *getIntelProcessorTypeAndSubtype(unsigned Family,
+ unsigned Model,
+ const unsigned *Features,
+ unsigned *Type,
+ unsigned *Subtype) {
+#define testFeature(F) (Features[F / 32] & (1 << (F % 32))) != 0
- StringRef CPU;
+ const char *CPU = 0;
switch (Family) {
case 3:
@@ -753,7 +752,7 @@ getIntelProcessorTypeAndSubtype(unsigned Family, unsigned Model,
case 0x1e: // Intel(R) Core(TM) i7 CPU 870 @ 2.93GHz.
// As found in a Summer 2010 model iMac.
case 0x1f:
- case 0x2e: // Nehalem EX
+ case 0x2e: // Nehalem EX
CPU = "nehalem";
*Type = X86::INTEL_COREI7;
*Subtype = X86::INTEL_COREI7_NEHALEM;
@@ -774,7 +773,7 @@ getIntelProcessorTypeAndSubtype(unsigned Family, unsigned Model,
*Subtype = X86::INTEL_COREI7_SANDYBRIDGE;
break;
case 0x3a:
- case 0x3e: // Ivy Bridge EP
+ case 0x3e: // Ivy Bridge EP
CPU = "ivybridge";
*Type = X86::INTEL_COREI7;
*Subtype = X86::INTEL_COREI7_IVYBRIDGE;
@@ -801,12 +800,12 @@ getIntelProcessorTypeAndSubtype(unsigned Family, unsigned Model,
break;
// Skylake:
- case 0x4e: // Skylake mobile
- case 0x5e: // Skylake desktop
- case 0x8e: // Kaby Lake mobile
- case 0x9e: // Kaby Lake desktop
- case 0xa5: // Comet Lake-H/S
- case 0xa6: // Comet Lake-U
+ case 0x4e: // Skylake mobile
+ case 0x5e: // Skylake desktop
+ case 0x8e: // Kaby Lake mobile
+ case 0x9e: // Kaby Lake desktop
+ case 0xa5: // Comet Lake-H/S
+ case 0xa6: // Comet Lake-U
CPU = "skylake";
*Type = X86::INTEL_COREI7;
*Subtype = X86::INTEL_COREI7_SKYLAKE;
@@ -860,7 +859,7 @@ getIntelProcessorTypeAndSubtype(unsigned Family, unsigned Model,
// Alderlake:
case 0x97:
case 0x9a:
- // Gracemont
+ // Gracemont:
case 0xbe:
// Raptorlake:
case 0xb7:
@@ -897,20 +896,6 @@ getIntelProcessorTypeAndSubtype(unsigned Family, unsigned Model,
*Subtype = X86::INTEL_COREI7_PANTHERLAKE;
break;
- // Graniterapids:
- case 0xad:
- CPU = "graniterapids";
- *Type = X86::INTEL_COREI7;
- *Subtype = X86::INTEL_COREI7_GRANITERAPIDS;
- break;
-
- // Granite Rapids D:
- case 0xae:
- CPU = "graniterapids-d";
- *Type = X86::INTEL_COREI7;
- *Subtype = X86::INTEL_COREI7_GRANITERAPIDS_D;
- break;
-
// Icelake Xeon:
case 0x6a:
case 0x6c:
@@ -928,6 +913,20 @@ getIntelProcessorTypeAndSubtype(unsigned Family, unsigned Model,
*Subtype = X86::INTEL_COREI7_SAPPHIRERAPIDS;
break;
+ // Graniterapids:
+ case 0xad:
+ CPU = "graniterapids";
+ *Type = X86::INTEL_COREI7;
+ *Subtype = X86::INTEL_COREI7_GRANITERAPIDS;
+ break;
+
+ // Granite Rapids D:
+ case 0xae:
+ CPU = "graniterapids-d";
+ *Type = X86::INTEL_COREI7;
+ *Subtype = X86::INTEL_COREI7_GRANITERAPIDS_D;
+ break;
+
case 0x1c: // Most 45 nm Intel Atom processors
case 0x26: // 45 nm Atom Lincroft
case 0x27: // 32 nm Atom Medfield
@@ -980,7 +979,8 @@ getIntelProcessorTypeAndSubtype(unsigned Family, unsigned Model,
// Clearwaterforest:
case 0xdd:
CPU = "clearwaterforest";
- *Type = X86::INTEL_CLEARWATERFOREST;
+ *Type = X86::INTEL_COREI7;
+ *Subtype = X86::INTEL_CLEARWATERFOREST;
break;
// Xeon Phi (Knights Landing + Knights Mill):
@@ -988,52 +988,82 @@ getIntelProcessorTypeAndSubtype(unsigned Family, unsigned Model,
CPU = "knl";
*Type = X86::INTEL_KNL;
break;
+
case 0x85:
CPU = "knm";
*Type = X86::INTEL_KNM;
break;
default: // Unknown family 6 CPU, try to guess.
- // Don't both with Type/Subtype here, they aren't used by the caller.
- // They're used above to keep the code in sync with compiler-rt.
// TODO detect tigerlake host from model
if (testFeature(X86::FEATURE_AVX512VP2INTERSECT)) {
CPU = "tigerlake";
+ *Type = X86::INTEL_COREI7;
+ *Subtype = X86::INTEL_COREI7_TIGERLAKE;
} else if (testFeature(X86::FEATURE_AVX512VBMI2)) {
CPU = "icelake-client";
+ *Type = X86::INTEL_COREI7;
+ *Subtype = X86::INTEL_COREI7_ICELAKE_CLIENT;
} else if (testFeature(X86::FEATURE_AVX512VBMI)) {
CPU = "cannonlake";
+ *Type = X86::INTEL_COREI7;
+ *Subtype = X86::INTEL_COREI7_CANNONLAKE;
} else if (testFeature(X86::FEATURE_AVX512BF16)) {
CPU = "cooperlake";
+ *Type = X86::INTEL_COREI7;
+ *Subtype = X86::INTEL_COREI7_COOPERLAKE;
} else if (testFeature(X86::FEATURE_AVX512VNNI)) {
CPU = "cascadelake";
+ *Type = X86::INTEL_COREI7;
+ *Subtype = X86::INTEL_COREI7_CASCADELAKE;
} else if (testFeature(X86::FEATURE_AVX512VL)) {
CPU = "skylake-avx512";
+ *Type = X86::INTEL_COREI7;
+ *Subtype = X86::INTEL_COREI7_SKYLAKE_AVX512;
} else if (testFeature(X86::FEATURE_CLFLUSHOPT)) {
- if (testFeature(X86::FEATURE_SHA))
+ if (testFeature(X86::FEATURE_SHA)) {
CPU = "goldmont";
- else
+ *Type = X86::INTEL_GOLDMONT;
+ } else {
CPU = "skylake";
+ *Type = X86::INTEL_COREI7;
+ *Subtype = X86::INTEL_COREI7_SKYLAKE;
+ }
} else if (testFeature(X86::FEATURE_ADX)) {
CPU = "broadwell";
+ *Type = X86::INTEL_COREI7;
+ *Subtype = X86::INTEL_COREI7_BROADWELL;
} else if (testFeature(X86::FEATURE_AVX2)) {
CPU = "haswell";
+ *Type = X86::INTEL_COREI7;
+ *Subtype = X86::INTEL_COREI7_HASWELL;
} else if (testFeature(X86::FEATURE_AVX)) {
CPU = "sandybridge";
+ *Type = X86::INTEL_COREI7;
+ *Subtype = X86::INTEL_COREI7_SANDYBRIDGE;
} else if (testFeature(X86::FEATURE_SSE4_2)) {
- if (testFeature(X86::FEATURE_MOVBE))
+ if (testFeature(X86::FEATURE_MOVBE)) {
CPU = "silvermont";
- else
+ *Type = X86::INTEL_SILVERMONT;
+ } else {
CPU = "nehalem";
+ *Type = X86::INTEL_COREI7;
+ *Subtype = X86::INTEL_COREI7_NEHALEM;
+ }
} else if (testFeature(X86::FEATURE_SSE4_1)) {
CPU = "penryn";
+ *Type = X86::INTEL_CORE2;
} else if (testFeature(X86::FEATURE_SSSE3)) {
- if (testFeature(X86::FEATURE_MOVBE))
+ if (testFeature(X86::FEATURE_MOVBE)) {
CPU = "bonnell";
- else
+ *Type = X86::INTEL_BONNELL;
+ } else {
CPU = "core2";
+ *Type = X86::INTEL_CORE2;
+ }
} else if (testFeature(X86::FEATURE_64BIT)) {
CPU = "core2";
+ *Type = X86::INTEL_CORE2;
} else if (testFeature(X86::FEATURE_SSE3)) {
CPU = "yonah";
} else if (testFeature(X86::FEATURE_SSE2)) {
@@ -1071,10 +1101,6 @@ static StringRef
getAMDProcessorTypeAndSubtype(unsigned Family, unsigned Model,
const unsigned *Features,
unsigned *Type, unsigned *Subtype) {
- auto testFeature = [&](unsigned F) {
- return (Features[F / 32] & (1U << (F % 32))) != 0;
- };
-
StringRef CPU;
switch (Family) {
>From 816f125c23b5590f91b41fbbae8edca73965abb3 Mon Sep 17 00:00:00 2001
From: Aiden Grossman <aidengrossman at google.com>
Date: Fri, 5 Jul 2024 21:42:11 +0000
Subject: [PATCH 2/4] Revert clearwater forest change
---
llvm/lib/TargetParser/Host.cpp | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/llvm/lib/TargetParser/Host.cpp b/llvm/lib/TargetParser/Host.cpp
index 6486d3c57bb0c..4e35ff1bc35f0 100644
--- a/llvm/lib/TargetParser/Host.cpp
+++ b/llvm/lib/TargetParser/Host.cpp
@@ -979,8 +979,7 @@ static const char *getIntelProcessorTypeAndSubtype(unsigned Family,
// Clearwaterforest:
case 0xdd:
CPU = "clearwaterforest";
- *Type = X86::INTEL_COREI7;
- *Subtype = X86::INTEL_CLEARWATERFOREST;
+ *Type = X86::INTEL_CLEARWATERFOREST;
break;
// Xeon Phi (Knights Landing + Knights Mill):
>From 664ea4e315258f18e60a1120a1c7cf74944063a9 Mon Sep 17 00:00:00 2001
From: Aiden Grossman <aidengrossman at google.com>
Date: Fri, 5 Jul 2024 21:43:11 +0000
Subject: [PATCH 3/4] Fix clearwaterforest
---
compiler-rt/lib/builtins/cpu_model/x86.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/compiler-rt/lib/builtins/cpu_model/x86.c b/compiler-rt/lib/builtins/cpu_model/x86.c
index 7aa5642bd0e94..55d2dba33160d 100644
--- a/compiler-rt/lib/builtins/cpu_model/x86.c
+++ b/compiler-rt/lib/builtins/cpu_model/x86.c
@@ -643,8 +643,7 @@ static const char *getIntelProcessorTypeAndSubtype(unsigned Family,
// Clearwaterforest:
case 0xdd:
CPU = "clearwaterforest";
- *Type = INTEL_COREI7;
- *Subtype = INTEL_CLEARWATERFOREST;
+ *Type = INTEL_CLEARWATERFOREST;
break;
// Xeon Phi (Knights Landing + Knights Mill):
>From 1af96c33cd6e30060fc3378d0dcf9429c6e75339 Mon Sep 17 00:00:00 2001
From: Aiden Grossman <aidengrossman at google.com>
Date: Fri, 5 Jul 2024 21:44:15 +0000
Subject: [PATCH 4/4] unify gracemont
---
compiler-rt/lib/builtins/cpu_model/x86.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/compiler-rt/lib/builtins/cpu_model/x86.c b/compiler-rt/lib/builtins/cpu_model/x86.c
index 55d2dba33160d..b4b137e174d0f 100644
--- a/compiler-rt/lib/builtins/cpu_model/x86.c
+++ b/compiler-rt/lib/builtins/cpu_model/x86.c
@@ -523,6 +523,8 @@ static const char *getIntelProcessorTypeAndSubtype(unsigned Family,
// Alderlake:
case 0x97:
case 0x9a:
+ // Gracemont:
+ case 0xbe:
// Raptorlake:
case 0xb7:
case 0xba:
@@ -530,8 +532,6 @@ static const char *getIntelProcessorTypeAndSubtype(unsigned Family,
// Meteorlake:
case 0xaa:
case 0xac:
- // Gracemont:
- case 0xbe:
CPU = "alderlake";
*Type = INTEL_COREI7;
*Subtype = INTEL_COREI7_ALDERLAKE;
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