[llvm] [AMDGPU] Add intrinsic for raw atomic buffer loads (PR #97707)

[Jessica Del via llvm-commits]

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@@ -1272,6 +1272,14 @@ bool SITargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
         Info.ptrVal = CI.getArgOperand(1);
         return true;
       }
+      case Intrinsic::amdgcn_raw_atomic_buffer_load:
+      case Intrinsic::amdgcn_raw_atomic_ptr_buffer_load: {
+        Info.memVT =
+            memVTFromLoadIntrReturn(*this, MF.getDataLayout(), CI.getType(),
+                                    std::numeric_limits<unsigned>::max());
+        Info.flags &= ~MachineMemOperand::MOStore;
+        return true;
+      }
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OutOfCache wrote:

This was my attempt to address the comment [here](https://reviews.llvm.org/D138786#inline-1339541) about fixing the intrinsics bypassing the atomic memory semantics. CodeGen failed because of the `MOStore` flag set for other atomics. If there is a better way to do this, I'd love to hear some feedback.

https://github.com/llvm/llvm-project/pull/97707