[llvm] [RISCV] Lower unmasked zero-stride vp.stride to a splat of one scalar load. (PR #97394)

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Wed Jul 3 09:02:43 PDT 2024


topperc wrote:

> We may use -1 to represent VLMAX?

This is undefined behavior for VP intrinsics. The EVL cannot be larger than the runtime vector length.

https://github.com/llvm/llvm-project/pull/97394


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