[llvm] [llvm][CodeGen] respect booleanVectorContents while UnrollVSETCC (NFC) (PR #97589)
Yingchi Long via llvm-commits
llvm-commits at lists.llvm.org
Wed Jul 3 08:04:56 PDT 2024
https://github.com/inclyc created https://github.com/llvm/llvm-project/pull/97589
This is an NFC change that focus fixing correctness of UnrollVSETCC. For historical reason this function assumes all targets setBooleanVectorContents to "ZeroOrNegativeOneBooleanContent". i.e. vector boolean values are "-1".
However this is not true for some targets, e.g. RISC-V, Sparc, VE, XCore, ARC...
Actually all these targets support native vector comparison. Thus it is no need to invoke this function and it is not coveraged by any test cases.
I'm not sure whether or not it is OK to submit such patch, but this does indeed fix potential miscompilation for furthur targets.
>From a54187d1f2e50af4926b892a8dc8c0422b181acb Mon Sep 17 00:00:00 2001
From: Yingchi Long <i at lyc.dev>
Date: Wed, 3 Jul 2024 22:55:49 +0800
Subject: [PATCH] [llvm][CodeGen] respect booleanVectorContents while
UnrollVSETCC (NFC)
This is an NFC change that focus fixing correctness of UnrollVSETCC.
For historical reason this function assumes all targets setBooleanVectorContents to "ZeroOrNegativeOneBooleanContent".
i.e. vector boolean values are "-1".
However this is not true for some targets, e.g. RISC-V, Sparc, VE, XCore, ARC...
Actually all these targets support native vector comparison.
Thus it is no need to invoke this function and it is not coveraged by any test cases.
I'm not sure whether or not it is OK to submit such patch,
but this does indeed fix potential miscompilation for furthur targets.
---
llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
index 14b147cc5b01b..8b6fad684ba86 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
@@ -2016,7 +2016,8 @@ SDValue VectorLegalizer::UnrollVSETCC(SDNode *Node) {
TLI.getSetCCResultType(DAG.getDataLayout(),
*DAG.getContext(), TmpEltVT),
LHSElem, RHSElem, CC);
- Ops[i] = DAG.getSelect(dl, EltVT, Ops[i], DAG.getAllOnesConstant(dl, EltVT),
+ Ops[i] = DAG.getSelect(dl, EltVT, Ops[i],
+ DAG.getBoolConstant(true, dl, EltVT, VT),
DAG.getConstant(0, dl, EltVT));
}
return DAG.getBuildVector(VT, dl, Ops);
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