[llvm] [AArch64][PAC] Reduce the size of synchronous CFI (PR #96377)
Igor Kudrin via llvm-commits
llvm-commits at lists.llvm.org
Tue Jul 2 15:57:39 PDT 2024
https://github.com/igorkudrin updated https://github.com/llvm/llvm-project/pull/96377
>From dc5f2ee1b53f86525f4d9d67a774f2f1041d3e12 Mon Sep 17 00:00:00 2001
From: Igor Kudrin <ikudrin at accesssoftek.com>
Date: Fri, 21 Jun 2024 14:07:32 -0700
Subject: [PATCH 1/2] [AArch64][MachineOutliner][NFC] Re-enable some tests
Part of the tests did not run and some checks were missing due to
incorrect prefixes. The patch also updates the check lines to catch
up with recent changes.
The problematic revisions were:
* [D70635](https://reviews.llvm.org/D70635)
* [D71658](https://reviews.llvm.org/D71658)
* [D111780](https://reviews.llvm.org/D111780)
---
.../machine-outliner-retaddr-sign-cfi.ll | 32 +++++++++----------
...tliner-retaddr-sign-diff-scope-same-key.ll | 18 +++++------
.../machine-outliner-retaddr-sign-non-leaf.ll | 11 +++----
.../machine-outliner-retaddr-sign-regsave.mir | 4 +--
...tliner-retaddr-sign-same-scope-diff-key.ll | 14 ++++----
...iner-retaddr-sign-same-scope-same-key-a.ll | 19 ++++++-----
...iner-retaddr-sign-same-scope-same-key-b.ll | 19 ++++++-----
...machine-outliner-retaddr-sign-subtarget.ll | 4 +--
.../machine-outliner-retaddr-sign-thunk.ll | 24 +++++++-------
.../machine-outliner-retaddr-sign-v8-3.ll | 8 ++---
10 files changed, 74 insertions(+), 79 deletions(-)
diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-cfi.ll b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-cfi.ll
index e9492d2a87e15..4bbbe40176313 100644
--- a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-cfi.ll
+++ b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-cfi.ll
@@ -1,18 +1,17 @@
-; RUN: llc -verify-machineinstrs -enable-machine-outliner -mtriple \
-; RUN: aarch64 %s -o - | FileCheck %s --check-prefixes CHECK,V8A
-; RUN-V83A: llc -verify-machineinstrs -enable-machine-outliner -mtriple \
-; RUN-V83A: aarch64 -mattr=+v8.3a %s -o - > %t
-; RUN-V83A: FileCheck --check-prefixes CHECK,V83A < %t %s
+; RUN: llc -verify-machineinstrs -enable-machine-outliner -mtriple aarch64 %s -o - | \
+; RUN: FileCheck %s --check-prefixes CHECK,V8A
+; RUN: llc -verify-machineinstrs -enable-machine-outliner -mtriple aarch64 -mattr=+v8.3a %s -o - | \
+; RUN: FileCheck %s --check-prefixes CHECK,V83A
-; Function a's outlining candidate contains a sp modifying add without a
-; corresponsing sub, so we shouldn't outline it.
+;; Function a's outlining candidate contains a sp modifying add without a
+;; corresponsing sub, so we shouldn't outline it.
define void @a() "sign-return-address"="all" "sign-return-address-key"="b_key" {
; CHECK-LABEL: a: // @a
; CHECK: // %bb.0:
; CHECK-NEXT: .cfi_b_key_frame
; V8A-NEXT: hint #27
; V83A-NEXT: pacibsp
-; V8A-NEXT, V83A-NEXT: .cfi_negate_ra_state
+; CHECK-NEXT: .cfi_negate_ra_state
%1 = alloca i32, align 4
%2 = alloca i32, align 4
%3 = alloca i32, align 4
@@ -27,9 +26,8 @@ define void @a() "sign-return-address"="all" "sign-return-address-key"="b_key" {
store i32 6, ptr %6, align 4
; CHECK-NOT: bl OUTLINED_FUNCTION_{{[0-9]+}}
; V8A: hint #31
-; V83A: autibsp
-; V8A-NEXT, V83A-NEXT: .cfi_negate_ra_state
-; V8A-NEXT, V83A-NEXT: ret
+; V8A-NEXT: ret
+; V83A: retab
ret void
}
@@ -52,8 +50,8 @@ define void @b() "sign-return-address"="all" "sign-return-address-key"="b_key" n
store i32 6, ptr %6, align 4
; CHECK: bl [[OUTLINED_FUNC:OUTLINED_FUNCTION_[0-9]+]]
; V8A: hint #31
-; V83A: autibsp
-; V8A-NEXT, V83A-NEXT: ret
+; V8A-NEXT: ret
+; V83A: retab
ret void
}
@@ -76,8 +74,8 @@ define void @c() "sign-return-address"="all" "sign-return-address-key"="b_key" n
store i32 6, ptr %6, align 4
; CHECK: bl [[OUTLINED_FUNC]]
; V8A: hint #31
-; V83A: autibsp
-; V8A-NEXT, V83A-NEXT: ret
+; V8A-NEXT: ret
+; V83A: retab
ret void
}
@@ -86,5 +84,5 @@ define void @c() "sign-return-address"="all" "sign-return-address-key"="b_key" n
; V8A-NEXT: hint #27
; V83A-NEXT: pacibsp
; V8A: hint #31
-; V83A: autibsp
-; V8A-NEXT, V83A-NEXT: ret
+; V8A-NEXT: ret
+; V83A: retab
diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-diff-scope-same-key.ll b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-diff-scope-same-key.ll
index a5757a70843a9..f4e9c0a4c2204 100644
--- a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-diff-scope-same-key.ll
+++ b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-diff-scope-same-key.ll
@@ -1,8 +1,7 @@
-; RUN: llc -verify-machineinstrs -enable-machine-outliner -mtriple \
-; RUN: aarch64 %s -o - | FileCheck %s --check-prefixes CHECK,V8A
-; RUN-V83A: llc -verify-machineinstrs -enable-machine-outliner -mtriple \
-; RUN-V83A: aarch64 -mattr=+v8.3a %s -o - > %t
-; RUN-V83A: FileCheck --check-prefixes CHECK,V83A < %t %s
+; RUN: llc -verify-machineinstrs -enable-machine-outliner -mtriple aarch64 %s -o - | \
+; RUN: FileCheck %s --check-prefixes CHECK,V8A
+; RUN: llc -verify-machineinstrs -enable-machine-outliner -mtriple aarch64 -mattr=+v8.3a %s -o - | \
+; RUN: FileCheck %s --check-prefixes CHECK,V83A
define void @a() "sign-return-address"="all" {
; CHECK-LABEL: a: // @a
@@ -22,13 +21,13 @@ define void @a() "sign-return-address"="all" {
store i32 5, ptr %5, align 4
store i32 6, ptr %6, align 4
; V8A: hint #29
-; V83A: autiasp
+; V83A: retaa
ret void
; CHECK: .cfi_endproc
}
define void @b() "sign-return-address"="non-leaf" {
-; CHECK-LABE: b: // @b
+; CHECK-LABEL: b: // @b
; V8A-NOT: hint #25
; V83A-NOT: paciasp
; CHECK-NOT: .cfi_negate_ra_state
@@ -46,6 +45,7 @@ define void @b() "sign-return-address"="non-leaf" {
store i32 6, ptr %6, align 4
; V8A-NOT: hint #29
; V83A-NOT: autiasp
+; V83A-NOT: retaa
ret void
; CHECK: .cfi_endproc
}
@@ -54,7 +54,7 @@ define void @c() "sign-return-address"="all" {
; CHECK-LABEL: c: // @c
; V8A: hint #25
; V83A: paciasp
-; V8A-NEXT, V83A-NEXT: .cfi_negate_ra_state
+; CHECK-NEXT: .cfi_negate_ra_state
%1 = alloca i32, align 4
%2 = alloca i32, align 4
%3 = alloca i32, align 4
@@ -68,7 +68,7 @@ define void @c() "sign-return-address"="all" {
store i32 5, ptr %5, align 4
store i32 6, ptr %6, align 4
; V8A: hint #29
-; V83A: autiasp
+; V83A: retaa
ret void
; CHECK: .cfi_endproc
}
diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-non-leaf.ll b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-non-leaf.ll
index 0d948f379af1a..5dfdba21ed6a6 100644
--- a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-non-leaf.ll
+++ b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-non-leaf.ll
@@ -1,8 +1,7 @@
-; RUN: llc -verify-machineinstrs -enable-machine-outliner -mtriple \
-; RUN: aarch64 %s -o - | FileCheck %s --check-prefixes CHECK,V8A
-; RUN-V83A: llc -verify-machineinstrs -enable-machine-outliner -mtriple \
-; RUN-V83A: aarch64 -mattr=+v8.3a %s -o - > %t
-; RUN-V83A: FileCheck --check-prefixes CHECK,V83A < %t %s
+; RUN: llc -verify-machineinstrs -enable-machine-outliner -mtriple aarch64 %s -o - | \
+; RUN: FileCheck %s --check-prefixes CHECK,V8A
+; RUN: llc -verify-machineinstrs -enable-machine-outliner -mtriple aarch64 -mattr=+v8.3a %s -o - | \
+; RUN: FileCheck %s --check-prefixes CHECK,V83A
define i64 @a(i64 %x) "sign-return-address"="non-leaf" "sign-return-address-key"="b_key" {
; CHECK-LABEL: a: // @a
@@ -70,7 +69,7 @@ define i64 @c(i64 %x) "sign-return-address"="non-leaf" "sign-return-address-key"
ret i64 %x
}
-; Outlined function is leaf-function => don't sign it
+;; Outlined function is leaf-function => don't sign it
; CHECK-LABEL: OUTLINED_FUNCTION_0:
; CHECK-NOT: .cfi_b_key_frame
; CHECK-NOT: paci{{[a,b]}}sp
diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-regsave.mir b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-regsave.mir
index 28986064e7946..9a983cbd6714e 100644
--- a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-regsave.mir
+++ b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-regsave.mir
@@ -126,6 +126,6 @@ body: |
# CHECK: body:
# CHECK-NEXT: bb.0:
# CHECK-NOT: frame-setup EMITBKEY
-# CHECK-NOT: frame-setup PACI{{[A,B]]}}SP
+# CHECK-NOT: frame-setup PACI{{[A,B]}}SP
# CHECK-NOT: frame-setup CFI_INSTRUCTION negate_ra_sign_state
-# CHECK-NOT: frame-destroy AUTI{{[A,B]]}}SP
+# CHECK-NOT: frame-destroy AUTI{{[A,B]}}SP
diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-same-scope-diff-key.ll b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-same-scope-diff-key.ll
index 1e4d6286cd22c..decf6a9bae23c 100644
--- a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-same-scope-diff-key.ll
+++ b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-same-scope-diff-key.ll
@@ -1,8 +1,7 @@
-; RUN: llc -verify-machineinstrs -enable-machine-outliner -mtriple \
-; RUN: aarch64 %s -o - | FileCheck %s --check-prefixes CHECK,V8A
-; RUN-V83A: llc -verify-machineinstrs -enable-machine-outliner -mtriple \
-; RUN-V83A: aarch64 -mattr=+v8.3a %s -o - > %t
-; RUN-V83A: FileCheck --check-prefixes CHECK,V83A < %t %s
+; RUN: llc -verify-machineinstrs -enable-machine-outliner -mtriple aarch64 %s -o - | \
+; RUN: FileCheck %s --check-prefixes CHECK,V8A
+; RUN: llc -verify-machineinstrs -enable-machine-outliner -mtriple aarch64 -mattr=+v8.3a %s -o - | \
+; RUN: FileCheck %s --check-prefixes CHECK,V83A
define void @a() "sign-return-address"="all" {
; CHECK-LABEL: a: // @a
@@ -22,7 +21,7 @@ define void @a() "sign-return-address"="all" {
store i32 5, ptr %5, align 4
store i32 6, ptr %6, align 4
; V8A: hint #29
-; V83A: autiasp
+; V83A: retaa
ret void
; CHECK: .cfi_endproc
}
@@ -47,6 +46,7 @@ define void @b() "sign-return-address"="all" "sign-return-address-key"="b_key" {
store i32 6, ptr %6, align 4
; V8A-NOT: hint #29
; V83A-NOT: autiasp
+; V83A-NOT: retaa
ret void
; CHECK: .cfi_endproc
}
@@ -69,7 +69,7 @@ define void @c() "sign-return-address"="all" {
store i32 5, ptr %5, align 4
store i32 6, ptr %6, align 4
; V8A: hint #29
-; V83A: autiasp
+; V83A: retaa
ret void
; CHECK: .cfi_endproc
}
diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-same-scope-same-key-a.ll b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-same-scope-same-key-a.ll
index 82a65cf06f602..88789a150ee74 100644
--- a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-same-scope-same-key-a.ll
+++ b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-same-scope-same-key-a.ll
@@ -1,8 +1,7 @@
-; RUN: llc -verify-machineinstrs -enable-machine-outliner -mtriple \
-; RUN: aarch64 %s -o - | FileCheck %s --check-prefixes CHECK,V8A
-; RUN-V83A: llc -verify-machineinstrs -enable-machine-outliner -mtriple \
-; RUN-V83A: aarch64 -mattr=+v8.3a %s -o - > %t
-; RUN-V83A: FileCheck --check-prefixes CHECK,V83A < %t %s
+; RUN: llc -verify-machineinstrs -enable-machine-outliner -mtriple aarch64 %s -o - | \
+; RUN: FileCheck %s --check-prefixes CHECK,V8A
+; RUN: llc -verify-machineinstrs -enable-machine-outliner -mtriple aarch64 -mattr=+v8.3a %s -o - | \
+; RUN: FileCheck %s --check-prefixes CHECK,V83A
define void @a() "sign-return-address"="all" "sign-return-address-key"="a_key" nounwind {
; CHECK-LABEL: a: // @a
@@ -21,7 +20,7 @@ define void @a() "sign-return-address"="all" "sign-return-address-key"="a_key" n
store i32 5, ptr %5, align 4
store i32 6, ptr %6, align 4
; V8A: hint #29
-; V83A: autiasp
+; V83A: retaa
ret void
}
@@ -42,7 +41,7 @@ define void @b() "sign-return-address"="all" nounwind {
store i32 5, ptr %5, align 4
store i32 6, ptr %6, align 4
; V8A: hint #29
-; V83A: autiasp
+; V83A: retaa
ret void
}
@@ -63,7 +62,7 @@ define void @c() "sign-return-address"="all" nounwind {
store i32 5, ptr %5, align 4
store i32 6, ptr %6, align 4
; V8A: hint #29
-; V83A: autiasp
+; V83A: retaa
ret void
}
@@ -71,5 +70,5 @@ define void @c() "sign-return-address"="all" nounwind {
; V8A: hint #25
; V83A: paciasp
; V8A: hint #29
-; V83A: autiasp
-; CHECK-NEXT: ret
+; V8A-NEXT: ret
+; V83A: retaa
diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-same-scope-same-key-b.ll b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-same-scope-same-key-b.ll
index 690b803034343..f3c9adc41d6fb 100644
--- a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-same-scope-same-key-b.ll
+++ b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-same-scope-same-key-b.ll
@@ -1,8 +1,7 @@
-; RUN: llc -verify-machineinstrs -enable-machine-outliner -mtriple \
-; RUN: aarch64 %s -o - | FileCheck %s --check-prefixes CHECK,V8A
-; RUN-V83A: llc -verify-machineinstrs -enable-machine-outliner -mtriple \
-; RUN-V83A: aarch64 -mattr=+v8.3a %s -o - > %t
-; RUN-V83A: FileCheck --check-prefixes CHECK,V83A < %t %s
+; RUN: llc -verify-machineinstrs -enable-machine-outliner -mtriple aarch64 %s -o - | \
+; RUN: FileCheck %s --check-prefixes CHECK,V8A
+; RUN: llc -verify-machineinstrs -enable-machine-outliner -mtriple aarch64 -mattr=+v8.3a %s -o - | \
+; RUN: FileCheck %s --check-prefixes CHECK,V83A
define void @a() "sign-return-address"="all" "sign-return-address-key"="b_key" nounwind {
; CHECK-LABEL: a: // @a
@@ -22,7 +21,7 @@ define void @a() "sign-return-address"="all" "sign-return-address-key"="b_key" n
store i32 5, ptr %5, align 4
store i32 6, ptr %6, align 4
; V8A: hint #31
-; V83A: autibsp
+; V83A: retab
ret void
}
@@ -44,7 +43,7 @@ define void @b() "sign-return-address"="all" "sign-return-address-key"="b_key" n
store i32 5, ptr %5, align 4
store i32 6, ptr %6, align 4
; V8A: hint #31
-; V83A: autibsp
+; V83A: retab
ret void
}
@@ -66,7 +65,7 @@ define void @c() "sign-return-address"="all" "sign-return-address-key"="b_key" n
store i32 5, ptr %5, align 4
store i32 6, ptr %6, align 4
; V8A: hint #31
-; V83A: autibsp
+; V83A: retab
ret void
}
@@ -75,5 +74,5 @@ define void @c() "sign-return-address"="all" "sign-return-address-key"="b_key" n
; V8A-NEXT: hint #27
; V83A-NEXT: pacibsp
; V8A: hint #31
-; V83A: autibsp
-; CHECK-NEXT: ret
+; V8A-NEXT: ret
+; V83A: retab
diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-subtarget.ll b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-subtarget.ll
index fd61bc03a3430..a7ea32952f3b7 100644
--- a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-subtarget.ll
+++ b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-subtarget.ll
@@ -24,8 +24,8 @@ define void @a() #0 {
store i32 4, ptr %4, align 4
store i32 5, ptr %5, align 4
store i32 6, ptr %6, align 4
+; CHECK-NOT: auti{{[a,b]}}sp
; CHECK: retab
-; CHECK-NOT: auti[a,b]sp
ret void
}
@@ -48,8 +48,8 @@ define void @b() #0 {
store i32 4, ptr %4, align 4
store i32 5, ptr %5, align 4
store i32 6, ptr %6, align 4
+; CHECK-NOT: auti{{[a,b]}}sp
; CHECK: retab
-; CHECK-NOT: auti[a,b]sp
ret void
}
diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-thunk.ll b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-thunk.ll
index 618973b9368d1..e09b1e3104221 100644
--- a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-thunk.ll
+++ b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-thunk.ll
@@ -1,8 +1,8 @@
; RUN: llc -mtriple aarch64-arm-linux-gnu --enable-machine-outliner -outliner-leaf-descendants=false \
-; RUN: -verify-machineinstrs %s -o - | FileCheck --check-prefixes CHECK,V8A %s
-; RUN-V83A: llc -mtriple aarch64 -enable-machine-outliner -outliner-leaf-descendants=false \
-; RUN-V83A: -verify-machineinstrs -mattr=+v8.3a %s -o - > %t
-; RUN-V83A: FileCheck --check-prefixes CHECK,V83A < %t %s
+; RUN: -verify-machineinstrs %s -o - | FileCheck --check-prefixes CHECK,V8A %s
+; RUN: llc -mtriple aarch64 -enable-machine-outliner -outliner-leaf-descendants=false \
+; RUN: -verify-machineinstrs -mattr=+v8.3a %s -o - | \
+; RUN: FileCheck %s --check-prefixes CHECK,V83A
declare i32 @thunk_called_fn(i32, i32, i32, i32)
@@ -13,8 +13,8 @@ define i32 @a() #0 {
; V83A-NEXT: paciasp
; CHECK-NEXT: .cfi_negate_ra_state
; V8A: hint #29
-; V83A: autiasp
-; CHECK-NEXT: ret
+; V8A-NEXT: ret
+; V83A: retaa
entry:
%call = tail call i32 @thunk_called_fn(i32 1, i32 2, i32 3, i32 4)
%cx = add i32 %call, 8
@@ -28,8 +28,8 @@ define i32 @b() #0 {
; V83A-NEXT: paciasp
; CHECK-NEXT: .cfi_negate_ra_state
; V8A: hint #29
-; V83A: autiasp
-; CHECK-NEXT: ret
+; V8A-NEXT: ret
+; V83A: retaa
entry:
%call = tail call i32 @thunk_called_fn(i32 1, i32 2, i32 3, i32 4)
%cx = add i32 %call, 88
@@ -43,8 +43,8 @@ define hidden i32 @c(ptr %fptr) #0 {
; V83A-NEXT: paciasp
; CHECK-NEXT: .cfi_negate_ra_state
; V8A: hint #29
-; V83A: autiasp
-; CHECK-NEXT: ret
+; V8A-NEXT: ret
+; V83A: retaa
entry:
%call = tail call i32 %fptr(i32 1, i32 2, i32 3, i32 4)
%add = add nsw i32 %call, 8
@@ -58,8 +58,8 @@ define hidden i32 @d(ptr %fptr) #0 {
; V83A-NEXT: paciasp
; CHECK-NEXT: .cfi_negate_ra_state
; V8A: hint #29
-; V83A: autiasp
-; CHECK-NEXT: ret
+; V8A-NEXT: ret
+; V83A: retaa
entry:
%call = tail call i32 %fptr(i32 1, i32 2, i32 3, i32 4)
%add = add nsw i32 %call, 88
diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-v8-3.ll b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-v8-3.ll
index fd92316594271..05236b0ec4a8d 100644
--- a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-v8-3.ll
+++ b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-v8-3.ll
@@ -21,8 +21,8 @@ define void @a() #0 {
store i32 4, ptr %4, align 4
store i32 5, ptr %5, align 4
store i32 6, ptr %6, align 4
+; CHECK-NOT: auti{{[a,b]}}sp
; CHECK: retab
-; CHECK-NOT: auti[a,b]sp
ret void
}
@@ -43,8 +43,8 @@ define void @b() #0 {
store i32 4, ptr %4, align 4
store i32 5, ptr %5, align 4
store i32 6, ptr %6, align 4
+; CHECK-NOT: auti{{[a,b]}}sp
; CHECK: retab
-; CHECK-NOT: auti[a,b]sp
ret void
}
@@ -65,8 +65,8 @@ define void @c() #0 {
store i32 4, ptr %4, align 4
store i32 5, ptr %5, align 4
store i32 6, ptr %6, align 4
+; CHECK-NOT: auti{{[a,b]}}sp
; CHECK: retab
-; CHECK-NOT: auti[a,b]sp
ret void
}
@@ -78,5 +78,5 @@ attributes #0 = { "sign-return-address"="all"
; CHECK: OUTLINED_FUNC
; CHECK: // %bb.0:
; CHECK-NEXT: pacibsp
+; CHECK-NOT: auti{{[a,b]}}sp
; CHECK: retab
-; CHECK-NOT: auti[a,b]sp
>From 4880bc9fca58a185f70acf00a8c31891184272cd Mon Sep 17 00:00:00 2001
From: Igor Kudrin <ikudrin at accesssoftek.com>
Date: Thu, 20 Jun 2024 18:53:45 -0700
Subject: [PATCH 2/2] [AArch64][PAC] Reduce the size of synchronous CFI
For synchronous unwind tables, the call frame information can be
slightly reduced by bundling the `.cfi_negate_ra_state` instruction
with other CFI instructions in the prolog, saving 1 byte per function
used for `DW_CFA_advance_loc`.
This was suggested in [D156428](https://reviews.llvm.org/D156428#4554317).
---
.../lib/Target/AArch64/AArch64PointerAuth.cpp | 13 +++++++++
.../machine-outliner-retaddr-sign-cfi.ll | 3 +-
...tliner-retaddr-sign-diff-scope-same-key.ll | 6 ++--
.../machine-outliner-retaddr-sign-non-leaf.ll | 9 ++++--
.../machine-outliner-retaddr-sign-regsave.mir | 3 +-
...tliner-retaddr-sign-same-scope-diff-key.ll | 9 ++++--
...machine-outliner-retaddr-sign-subtarget.ll | 9 ++++--
.../machine-outliner-retaddr-sign-thunk.ll | 12 +++++---
.../AArch64/pacbti-llvm-generated-funcs-2.ll | 9 ++++--
...sign-return-address-cfi-negate-ra-state.ll | 13 +++++----
.../AArch64/sign-return-address-pauth-lr.ll | 28 +++++++++----------
.../CodeGen/AArch64/sign-return-address.ll | 18 ++++++------
12 files changed, 84 insertions(+), 48 deletions(-)
diff --git a/llvm/lib/Target/AArch64/AArch64PointerAuth.cpp b/llvm/lib/Target/AArch64/AArch64PointerAuth.cpp
index e900f6881620f..eb0ff73200407 100644
--- a/llvm/lib/Target/AArch64/AArch64PointerAuth.cpp
+++ b/llvm/lib/Target/AArch64/AArch64PointerAuth.cpp
@@ -100,6 +100,7 @@ void AArch64PointerAuth::signLR(MachineFunction &MF,
auto &MFnI = *MF.getInfo<AArch64FunctionInfo>();
bool UseBKey = MFnI.shouldSignWithBKey();
bool EmitCFI = MFnI.needsDwarfUnwindInfo(MF);
+ bool EmitAsyncCFI = MFnI.needsAsyncDwarfUnwindInfo(MF);
bool NeedsWinCFI = MF.hasWinCFI();
MachineBasicBlock &MBB = *MBBI->getParent();
@@ -137,6 +138,18 @@ void AArch64PointerAuth::signLR(MachineFunction &MF,
}
if (EmitCFI) {
+ if (!EmitAsyncCFI) {
+ // Reduce the size of the generated call frame information for synchronous
+ // CFI by bundling the new CFI instruction with others in the prolog, so
+ // that no additional DW_CFA_advance_loc is needed.
+ for (auto I = MBBI; I != MBB.end(); ++I) {
+ if (I->getOpcode() == TargetOpcode::CFI_INSTRUCTION &&
+ I->getFlag(MachineInstr::FrameSetup)) {
+ MBBI = I;
+ break;
+ }
+ }
+ }
unsigned CFIIndex =
MF.addFrameInst(MCCFIInstruction::createNegateRAState(nullptr));
BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-cfi.ll b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-cfi.ll
index 4bbbe40176313..c64b3842aa5ba 100644
--- a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-cfi.ll
+++ b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-cfi.ll
@@ -11,7 +11,8 @@ define void @a() "sign-return-address"="all" "sign-return-address-key"="b_key" {
; CHECK-NEXT: .cfi_b_key_frame
; V8A-NEXT: hint #27
; V83A-NEXT: pacibsp
-; CHECK-NEXT: .cfi_negate_ra_state
+; CHECK: .cfi_negate_ra_state
+; CHECK-NEXT: .cfi_def_cfa_offset
%1 = alloca i32, align 4
%2 = alloca i32, align 4
%3 = alloca i32, align 4
diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-diff-scope-same-key.ll b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-diff-scope-same-key.ll
index f4e9c0a4c2204..3221815da33c5 100644
--- a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-diff-scope-same-key.ll
+++ b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-diff-scope-same-key.ll
@@ -7,7 +7,8 @@ define void @a() "sign-return-address"="all" {
; CHECK-LABEL: a: // @a
; V8A: hint #25
; V83A: paciasp
-; CHECK-NEXT: .cfi_negate_ra_state
+; CHECK: .cfi_negate_ra_state
+; CHECK-NEXT: .cfi_def_cfa_offset
%1 = alloca i32, align 4
%2 = alloca i32, align 4
%3 = alloca i32, align 4
@@ -54,7 +55,8 @@ define void @c() "sign-return-address"="all" {
; CHECK-LABEL: c: // @c
; V8A: hint #25
; V83A: paciasp
-; CHECK-NEXT: .cfi_negate_ra_state
+; CHECK: .cfi_negate_ra_state
+; CHECK-NEXT: .cfi_def_cfa_offset
%1 = alloca i32, align 4
%2 = alloca i32, align 4
%3 = alloca i32, align 4
diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-non-leaf.ll b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-non-leaf.ll
index 5dfdba21ed6a6..d43b74b9451aa 100644
--- a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-non-leaf.ll
+++ b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-non-leaf.ll
@@ -8,7 +8,8 @@ define i64 @a(i64 %x) "sign-return-address"="non-leaf" "sign-return-address-key"
; CHECK: .cfi_b_key_frame
; V8A-NEXT: hint #27
; V83A-NEXT: pacibsp
-; CHECK-NEXT: .cfi_negate_ra_state
+; CHECK: .cfi_negate_ra_state
+; CHECK-NEXT: .cfi_def_cfa_offset
%1 = alloca i32, align 4
%2 = alloca i32, align 4
%3 = alloca i32, align 4
@@ -30,7 +31,8 @@ define i64 @b(i64 %x) "sign-return-address"="non-leaf" "sign-return-address-key"
; CHECK: .cfi_b_key_frame
; V8A-NEXT: hint #27
; V83A-NEXT: pacibsp
-; CHECK-NEXT: .cfi_negate_ra_state
+; CHECK: .cfi_negate_ra_state
+; CHECK-NEXT: .cfi_def_cfa_offset
%1 = alloca i32, align 4
%2 = alloca i32, align 4
%3 = alloca i32, align 4
@@ -52,7 +54,8 @@ define i64 @c(i64 %x) "sign-return-address"="non-leaf" "sign-return-address-key"
; CHECK: .cfi_b_key_frame
; V8A-NEXT: hint #27
; V83A-NEXT: pacibsp
-; CHECK-NEXT: .cfi_negate_ra_state
+; CHECK: .cfi_negate_ra_state
+; CHECK-NEXT: .cfi_def_cfa_offset
%1 = alloca i32, align 4
%2 = alloca i32, align 4
%3 = alloca i32, align 4
diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-regsave.mir b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-regsave.mir
index 9a983cbd6714e..ba27d1c681e3f 100644
--- a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-regsave.mir
+++ b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-regsave.mir
@@ -82,7 +82,8 @@ body: |
# CHECK: bb.0:
# CHECK: frame-setup EMITBKEY
# CHECK-NEXT: frame-setup PACIBSP implicit-def $lr, implicit $lr, implicit $sp
-# CHECK-NEXT: frame-setup CFI_INSTRUCTION negate_ra_sign_state
+# CHECK: frame-setup CFI_INSTRUCTION negate_ra_sign_state
+# CHECK-NEXT: frame-setup CFI_INSTRUCTION
# CHECK-NOT: OUTLINED_FUNCTION_
# CHECK: bb.1:
# CHECK-NOT: OUTLINED_FUNCTION_
diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-same-scope-diff-key.ll b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-same-scope-diff-key.ll
index decf6a9bae23c..8c36ab4d8f403 100644
--- a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-same-scope-diff-key.ll
+++ b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-same-scope-diff-key.ll
@@ -7,7 +7,8 @@ define void @a() "sign-return-address"="all" {
; CHECK-LABEL: a: // @a
; V8A: hint #25
; V83A: paciasp
-; CHECK-NEXT: .cfi_negate_ra_state
+; CHECK: .cfi_negate_ra_state
+; CHECK-NEXT: .cfi_def_cfa_offset
%1 = alloca i32, align 4
%2 = alloca i32, align 4
%3 = alloca i32, align 4
@@ -31,7 +32,8 @@ define void @b() "sign-return-address"="all" "sign-return-address-key"="b_key" {
; CHECK: .cfi_b_key_frame
; V8A-NEXT: hint #27
; V83A-NEXT: pacibsp
-; CHECK-NEXT: .cfi_negate_ra_state
+; CHECK: .cfi_negate_ra_state
+; CHECK-NEXT: .cfi_def_cfa_offset
%1 = alloca i32, align 4
%2 = alloca i32, align 4
%3 = alloca i32, align 4
@@ -55,7 +57,8 @@ define void @c() "sign-return-address"="all" {
; CHECK-LABEL: c: // @c
; V8A: hint #25
; V83A: paciasp
-; CHECK-NEXT: .cfi_negate_ra_state
+; CHECK: .cfi_negate_ra_state
+; CHECK-NEXT: .cfi_def_cfa_offset
%1 = alloca i32, align 4
%2 = alloca i32, align 4
%3 = alloca i32, align 4
diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-subtarget.ll b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-subtarget.ll
index a7ea32952f3b7..d5ef94e900993 100644
--- a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-subtarget.ll
+++ b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-subtarget.ll
@@ -10,7 +10,8 @@ define void @a() #0 {
; CHECK: // %bb.0:
; CHECK-NEXT: .cfi_b_key_frame
; CHECK-NEXT: pacibsp
-; CHECK-NEXT: .cfi_negate_ra_state
+; CHECK: .cfi_negate_ra_state
+; CHECK-NEXT: .cfi_def_cfa_offset
; CHECK-NOT: OUTLINED_FUNCTION_
%1 = alloca i32, align 4
%2 = alloca i32, align 4
@@ -34,7 +35,8 @@ define void @b() #0 {
; CHECK: // %bb.0:
; CHECK-NEXT: .cfi_b_key_frame
; CHECK-NEXT: pacibsp
-; CHECK-NEXT: .cfi_negate_ra_state
+; CHECK: .cfi_negate_ra_state
+; CHECK-NEXT: .cfi_def_cfa_offset
; CHECK-NOT: OUTLINED_FUNCTION_
%1 = alloca i32, align 4
%2 = alloca i32, align 4
@@ -58,7 +60,8 @@ define void @c() #1 {
; CHECK: // %bb.0:
; CHECK-NEXT: .cfi_b_key_frame
; CHECK-NEXT: hint #27
-; CHECK-NEXT: .cfi_negate_ra_state
+; CHECK: .cfi_negate_ra_state
+; CHECK-NEXT: .cfi_def_cfa_offset
; CHECK-NOT: OUTLINED_FUNCTION_
%1 = alloca i32, align 4
%2 = alloca i32, align 4
diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-thunk.ll b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-thunk.ll
index e09b1e3104221..3e361111b5455 100644
--- a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-thunk.ll
+++ b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-thunk.ll
@@ -11,7 +11,8 @@ define i32 @a() #0 {
; CHECK: // %bb.0: // %entry
; V8A-NEXT: hint #25
; V83A-NEXT: paciasp
-; CHECK-NEXT: .cfi_negate_ra_state
+; CHECK: .cfi_negate_ra_state
+; CHECK-NEXT: .cfi_def_cfa_offset
; V8A: hint #29
; V8A-NEXT: ret
; V83A: retaa
@@ -26,7 +27,8 @@ define i32 @b() #0 {
; CHECK: // %bb.0: // %entry
; V8A-NEXT: hint #25
; V83A-NEXT: paciasp
-; CHECK-NEXT: .cfi_negate_ra_state
+; CHECK: .cfi_negate_ra_state
+; CHECK-NEXT: .cfi_def_cfa_offset
; V8A: hint #29
; V8A-NEXT: ret
; V83A: retaa
@@ -41,7 +43,8 @@ define hidden i32 @c(ptr %fptr) #0 {
; CHECK: // %bb.0: // %entry
; V8A-NEXT: hint #25
; V83A-NEXT: paciasp
-; CHECK-NEXT: .cfi_negate_ra_state
+; CHECK: .cfi_negate_ra_state
+; CHECK-NEXT: .cfi_def_cfa_offset
; V8A: hint #29
; V8A-NEXT: ret
; V83A: retaa
@@ -56,7 +59,8 @@ define hidden i32 @d(ptr %fptr) #0 {
; CHECK: // %bb.0: // %entry
; V8A-NEXT: hint #25
; V83A-NEXT: paciasp
-; CHECK-NEXT: .cfi_negate_ra_state
+; CHECK: .cfi_negate_ra_state
+; CHECK-NEXT: .cfi_def_cfa_offset
; V8A: hint #29
; V8A-NEXT: ret
; V83A: retaa
diff --git a/llvm/test/CodeGen/AArch64/pacbti-llvm-generated-funcs-2.ll b/llvm/test/CodeGen/AArch64/pacbti-llvm-generated-funcs-2.ll
index 1515db46efc46..7161416a89eb4 100644
--- a/llvm/test/CodeGen/AArch64/pacbti-llvm-generated-funcs-2.ll
+++ b/llvm/test/CodeGen/AArch64/pacbti-llvm-generated-funcs-2.ll
@@ -1,4 +1,4 @@
-;; RUN: llc --mattr=+v8.3a %s -o - | FileCheck %s
+;; RUN: llc --mattr=+v8.3a %s -o - | tee %t.log | FileCheck %s
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "aarch64-unknown-linux"
@@ -35,7 +35,8 @@ entry:
;; CHECK-LABEL: __llvm_gcov_writeout:
;; CHECK: .cfi_b_key_frame
;; CHECK-NEXT: pacibsp
-;; CHECK-NEXT: .cfi_negate_ra_state
+;; CHECK: .cfi_negate_ra_state
+;; CHECK-NEXT: .cfi_def_cfa_offset
define internal void @__llvm_gcov_reset() unnamed_addr #2 {
entry:
@@ -55,7 +56,9 @@ entry:
;; CHECK-LABEL: __llvm_gcov_init:
;; CHECK: .cfi_b_key_frame
;; CHECK-NEXT: pacibsp
-;; CHECK-NEXT: .cfi_negate_ra_state
+;; CHECK-NEXT: .cfi_negate_ra_state
+;; CHECK-NOT: .cfi_
+;; CHECK: .cfi_endproc
attributes #0 = { norecurse nounwind readnone "sign-return-address"="all" "sign-return-address-key"="b_key" }
attributes #1 = { noinline }
diff --git a/llvm/test/CodeGen/AArch64/sign-return-address-cfi-negate-ra-state.ll b/llvm/test/CodeGen/AArch64/sign-return-address-cfi-negate-ra-state.ll
index 9464e3447993b..eb224bbbd601f 100644
--- a/llvm/test/CodeGen/AArch64/sign-return-address-cfi-negate-ra-state.ll
+++ b/llvm/test/CodeGen/AArch64/sign-return-address-cfi-negate-ra-state.ll
@@ -10,8 +10,8 @@ define dso_local i32 @_Z3fooi(i32 %x) #0 {
; CHECK-V8A-LABEL: _Z3fooi:
; CHECK-V8A: // %bb.0: // %entry
; CHECK-V8A-NEXT: hint #25
-; CHECK-V8A-NEXT: .cfi_negate_ra_state
; CHECK-V8A-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; CHECK-V8A-NEXT: .cfi_negate_ra_state
; CHECK-V8A-NEXT: .cfi_def_cfa_offset 16
; CHECK-V8A-NEXT: .cfi_offset w30, -16
; CHECK-V8A-NEXT: str w0, [sp, #8]
@@ -28,8 +28,8 @@ define dso_local i32 @_Z3fooi(i32 %x) #0 {
; CHECK-V83A-LABEL: _Z3fooi:
; CHECK-V83A: // %bb.0: // %entry
; CHECK-V83A-NEXT: paciasp
-; CHECK-V83A-NEXT: .cfi_negate_ra_state
; CHECK-V83A-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; CHECK-V83A-NEXT: .cfi_negate_ra_state
; CHECK-V83A-NEXT: .cfi_def_cfa_offset 16
; CHECK-V83A-NEXT: .cfi_offset w30, -16
; CHECK-V83A-NEXT: str w0, [sp, #8]
@@ -57,7 +57,8 @@ return: ; No predecessors!
}
; For asynchronous unwind tables, we need to flip the value of RA_SIGN_STATE
-; before and after the tail call.
+; before and after the tail call. In the prolog, RA_SIGN_STATE is updated right
+; after the corresponding 'PACIASP' instruction.
define hidden noundef i32 @baz_async(i32 noundef %a) #0 uwtable(async) {
; CHECK-V8A-LABEL: baz_async:
; CHECK-V8A: // %bb.0: // %entry
@@ -137,12 +138,14 @@ return: ; preds = %if.else, %if.then
; around the tail call. The tail-called function might throw an exception, but
; at this point we are set up to return into baz's caller, so the unwinder will
; never see baz's unwind table for that exception.
+; The '.cfi_negate_ra_state' instruction in the prolog can be bundled with other
+; CFI instructions to avoid emitting superfluous DW_CFA_advance_loc.
define hidden noundef i32 @baz_sync(i32 noundef %a) #0 uwtable(sync) {
; CHECK-V8A-LABEL: baz_sync:
; CHECK-V8A: // %bb.0: // %entry
; CHECK-V8A-NEXT: hint #25
-; CHECK-V8A-NEXT: .cfi_negate_ra_state
; CHECK-V8A-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; CHECK-V8A-NEXT: .cfi_negate_ra_state
; CHECK-V8A-NEXT: .cfi_def_cfa_offset 16
; CHECK-V8A-NEXT: .cfi_offset w30, -16
; CHECK-V8A-NEXT: cbz w0, .LBB2_2
@@ -162,8 +165,8 @@ define hidden noundef i32 @baz_sync(i32 noundef %a) #0 uwtable(sync) {
; CHECK-V83A-LABEL: baz_sync:
; CHECK-V83A: // %bb.0: // %entry
; CHECK-V83A-NEXT: paciasp
-; CHECK-V83A-NEXT: .cfi_negate_ra_state
; CHECK-V83A-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; CHECK-V83A-NEXT: .cfi_negate_ra_state
; CHECK-V83A-NEXT: .cfi_def_cfa_offset 16
; CHECK-V83A-NEXT: .cfi_offset w30, -16
; CHECK-V83A-NEXT: cbz w0, .LBB2_2
diff --git a/llvm/test/CodeGen/AArch64/sign-return-address-pauth-lr.ll b/llvm/test/CodeGen/AArch64/sign-return-address-pauth-lr.ll
index a78fa853d99dc..888ab8e73f113 100644
--- a/llvm/test/CodeGen/AArch64/sign-return-address-pauth-lr.ll
+++ b/llvm/test/CodeGen/AArch64/sign-return-address-pauth-lr.ll
@@ -95,8 +95,8 @@ define i64 @leaf_clobbers_lr(i64 %x) "sign-return-address"="non-leaf" {
; COMPAT-NEXT: hint #39
; COMPAT-NEXT: .Ltmp1:
; COMPAT-NEXT: hint #25
-; COMPAT-NEXT: .cfi_negate_ra_state
; COMPAT-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; COMPAT-NEXT: .cfi_negate_ra_state
; COMPAT-NEXT: .cfi_def_cfa_offset 16
; COMPAT-NEXT: .cfi_offset w30, -16
; COMPAT-NEXT: //APP
@@ -113,8 +113,8 @@ define i64 @leaf_clobbers_lr(i64 %x) "sign-return-address"="non-leaf" {
; V83A-NEXT: hint #39
; V83A-NEXT: .Ltmp1:
; V83A-NEXT: paciasp
-; V83A-NEXT: .cfi_negate_ra_state
; V83A-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; V83A-NEXT: .cfi_negate_ra_state
; V83A-NEXT: .cfi_def_cfa_offset 16
; V83A-NEXT: .cfi_offset w30, -16
; V83A-NEXT: //APP
@@ -129,8 +129,8 @@ define i64 @leaf_clobbers_lr(i64 %x) "sign-return-address"="non-leaf" {
; PAUTHLR: // %bb.0:
; PAUTHLR-NEXT: .Ltmp1:
; PAUTHLR-NEXT: paciasppc
-; PAUTHLR-NEXT: .cfi_negate_ra_state
; PAUTHLR-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; PAUTHLR-NEXT: .cfi_negate_ra_state
; PAUTHLR-NEXT: .cfi_def_cfa_offset 16
; PAUTHLR-NEXT: .cfi_offset w30, -16
; PAUTHLR-NEXT: //APP
@@ -150,8 +150,8 @@ define i32 @non_leaf_sign_all(i32 %x) "sign-return-address"="all" {
; COMPAT-NEXT: hint #39
; COMPAT-NEXT: .Ltmp2:
; COMPAT-NEXT: hint #25
-; COMPAT-NEXT: .cfi_negate_ra_state
; COMPAT-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; COMPAT-NEXT: .cfi_negate_ra_state
; COMPAT-NEXT: .cfi_def_cfa_offset 16
; COMPAT-NEXT: .cfi_offset w30, -16
; COMPAT-NEXT: bl foo
@@ -166,8 +166,8 @@ define i32 @non_leaf_sign_all(i32 %x) "sign-return-address"="all" {
; V83A-NEXT: hint #39
; V83A-NEXT: .Ltmp2:
; V83A-NEXT: paciasp
-; V83A-NEXT: .cfi_negate_ra_state
; V83A-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; V83A-NEXT: .cfi_negate_ra_state
; V83A-NEXT: .cfi_def_cfa_offset 16
; V83A-NEXT: .cfi_offset w30, -16
; V83A-NEXT: bl foo
@@ -180,8 +180,8 @@ define i32 @non_leaf_sign_all(i32 %x) "sign-return-address"="all" {
; PAUTHLR: // %bb.0:
; PAUTHLR-NEXT: .Ltmp2:
; PAUTHLR-NEXT: paciasppc
-; PAUTHLR-NEXT: .cfi_negate_ra_state
; PAUTHLR-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; PAUTHLR-NEXT: .cfi_negate_ra_state
; PAUTHLR-NEXT: .cfi_def_cfa_offset 16
; PAUTHLR-NEXT: .cfi_offset w30, -16
; PAUTHLR-NEXT: bl foo
@@ -197,8 +197,8 @@ define i32 @non_leaf_sign_non_leaf(i32 %x) "sign-return-address"="non-leaf" {
; COMPAT-NEXT: hint #39
; COMPAT-NEXT: .Ltmp3:
; COMPAT-NEXT: hint #25
-; COMPAT-NEXT: .cfi_negate_ra_state
; COMPAT-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; COMPAT-NEXT: .cfi_negate_ra_state
; COMPAT-NEXT: .cfi_def_cfa_offset 16
; COMPAT-NEXT: .cfi_offset w30, -16
; COMPAT-NEXT: bl foo
@@ -213,8 +213,8 @@ define i32 @non_leaf_sign_non_leaf(i32 %x) "sign-return-address"="non-leaf" {
; V83A-NEXT: hint #39
; V83A-NEXT: .Ltmp3:
; V83A-NEXT: paciasp
-; V83A-NEXT: .cfi_negate_ra_state
; V83A-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; V83A-NEXT: .cfi_negate_ra_state
; V83A-NEXT: .cfi_def_cfa_offset 16
; V83A-NEXT: .cfi_offset w30, -16
; V83A-NEXT: bl foo
@@ -227,8 +227,8 @@ define i32 @non_leaf_sign_non_leaf(i32 %x) "sign-return-address"="non-leaf" {
; PAUTHLR: // %bb.0:
; PAUTHLR-NEXT: .Ltmp3:
; PAUTHLR-NEXT: paciasppc
-; PAUTHLR-NEXT: .cfi_negate_ra_state
; PAUTHLR-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; PAUTHLR-NEXT: .cfi_negate_ra_state
; PAUTHLR-NEXT: .cfi_def_cfa_offset 16
; PAUTHLR-NEXT: .cfi_offset w30, -16
; PAUTHLR-NEXT: bl foo
@@ -247,8 +247,8 @@ define i32 @non_leaf_scs(i32 %x) "sign-return-address"="non-leaf" shadowcallstac
; CHECK-NEXT: hint #39
; CHECK-NEXT: .Ltmp4:
; CHECK-NEXT: paciasp
-; CHECK-NEXT: .cfi_negate_ra_state
; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; CHECK-NEXT: .cfi_negate_ra_state
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: .cfi_offset w30, -16
; CHECK-NEXT: bl foo
@@ -265,8 +265,8 @@ define i32 @non_leaf_scs(i32 %x) "sign-return-address"="non-leaf" shadowcallstac
; PAUTHLR-NEXT: .cfi_escape 0x16, 0x12, 0x02, 0x82, 0x78 //
; PAUTHLR-NEXT: .Ltmp4:
; PAUTHLR-NEXT: paciasppc
-; PAUTHLR-NEXT: .cfi_negate_ra_state
; PAUTHLR-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; PAUTHLR-NEXT: .cfi_negate_ra_state
; PAUTHLR-NEXT: .cfi_def_cfa_offset 16
; PAUTHLR-NEXT: .cfi_offset w30, -16
; PAUTHLR-NEXT: bl foo
@@ -306,8 +306,8 @@ define fastcc void @spill_lr_and_tail_call(i64 %x) "sign-return-address"="all" {
; COMPAT-NEXT: hint #39
; COMPAT-NEXT: .Ltmp6:
; COMPAT-NEXT: hint #25
-; COMPAT-NEXT: .cfi_negate_ra_state
; COMPAT-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; COMPAT-NEXT: .cfi_negate_ra_state
; COMPAT-NEXT: .cfi_def_cfa_offset 16
; COMPAT-NEXT: .cfi_offset w30, -16
; COMPAT-NEXT: //APP
@@ -324,8 +324,8 @@ define fastcc void @spill_lr_and_tail_call(i64 %x) "sign-return-address"="all" {
; V83A-NEXT: hint #39
; V83A-NEXT: .Ltmp6:
; V83A-NEXT: paciasp
-; V83A-NEXT: .cfi_negate_ra_state
; V83A-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; V83A-NEXT: .cfi_negate_ra_state
; V83A-NEXT: .cfi_def_cfa_offset 16
; V83A-NEXT: .cfi_offset w30, -16
; V83A-NEXT: //APP
@@ -341,8 +341,8 @@ define fastcc void @spill_lr_and_tail_call(i64 %x) "sign-return-address"="all" {
; PAUTHLR: // %bb.0:
; PAUTHLR-NEXT: .Ltmp6:
; PAUTHLR-NEXT: paciasppc
-; PAUTHLR-NEXT: .cfi_negate_ra_state
; PAUTHLR-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; PAUTHLR-NEXT: .cfi_negate_ra_state
; PAUTHLR-NEXT: .cfi_def_cfa_offset 16
; PAUTHLR-NEXT: .cfi_offset w30, -16
; PAUTHLR-NEXT: //APP
diff --git a/llvm/test/CodeGen/AArch64/sign-return-address.ll b/llvm/test/CodeGen/AArch64/sign-return-address.ll
index 1481d4beb50d6..a853568c8c07c 100644
--- a/llvm/test/CodeGen/AArch64/sign-return-address.ll
+++ b/llvm/test/CodeGen/AArch64/sign-return-address.ll
@@ -46,8 +46,8 @@ define i64 @leaf_clobbers_lr(i64 %x) "sign-return-address"="non-leaf" {
; COMPAT-LABEL: leaf_clobbers_lr:
; COMPAT: // %bb.0:
; COMPAT-NEXT: hint #25
-; COMPAT-NEXT: .cfi_negate_ra_state
; COMPAT-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; COMPAT-NEXT: .cfi_negate_ra_state
; COMPAT-NEXT: .cfi_def_cfa_offset 16
; COMPAT-NEXT: .cfi_offset w30, -16
; COMPAT-NEXT: //APP
@@ -60,8 +60,8 @@ define i64 @leaf_clobbers_lr(i64 %x) "sign-return-address"="non-leaf" {
; V83A-LABEL: leaf_clobbers_lr:
; V83A: // %bb.0:
; V83A-NEXT: paciasp
-; V83A-NEXT: .cfi_negate_ra_state
; V83A-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; V83A-NEXT: .cfi_negate_ra_state
; V83A-NEXT: .cfi_def_cfa_offset 16
; V83A-NEXT: .cfi_offset w30, -16
; V83A-NEXT: //APP
@@ -79,8 +79,8 @@ define i32 @non_leaf_sign_all(i32 %x) "sign-return-address"="all" {
; COMPAT-LABEL: non_leaf_sign_all:
; COMPAT: // %bb.0:
; COMPAT-NEXT: hint #25
-; COMPAT-NEXT: .cfi_negate_ra_state
; COMPAT-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; COMPAT-NEXT: .cfi_negate_ra_state
; COMPAT-NEXT: .cfi_def_cfa_offset 16
; COMPAT-NEXT: .cfi_offset w30, -16
; COMPAT-NEXT: bl foo
@@ -91,8 +91,8 @@ define i32 @non_leaf_sign_all(i32 %x) "sign-return-address"="all" {
; V83A-LABEL: non_leaf_sign_all:
; V83A: // %bb.0:
; V83A-NEXT: paciasp
-; V83A-NEXT: .cfi_negate_ra_state
; V83A-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; V83A-NEXT: .cfi_negate_ra_state
; V83A-NEXT: .cfi_def_cfa_offset 16
; V83A-NEXT: .cfi_offset w30, -16
; V83A-NEXT: bl foo
@@ -106,8 +106,8 @@ define i32 @non_leaf_sign_non_leaf(i32 %x) "sign-return-address"="non-leaf" {
; COMPAT-LABEL: non_leaf_sign_non_leaf:
; COMPAT: // %bb.0:
; COMPAT-NEXT: hint #25
-; COMPAT-NEXT: .cfi_negate_ra_state
; COMPAT-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; COMPAT-NEXT: .cfi_negate_ra_state
; COMPAT-NEXT: .cfi_def_cfa_offset 16
; COMPAT-NEXT: .cfi_offset w30, -16
; COMPAT-NEXT: bl foo
@@ -118,8 +118,8 @@ define i32 @non_leaf_sign_non_leaf(i32 %x) "sign-return-address"="non-leaf" {
; V83A-LABEL: non_leaf_sign_non_leaf:
; V83A: // %bb.0:
; V83A-NEXT: paciasp
-; V83A-NEXT: .cfi_negate_ra_state
; V83A-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; V83A-NEXT: .cfi_negate_ra_state
; V83A-NEXT: .cfi_def_cfa_offset 16
; V83A-NEXT: .cfi_offset w30, -16
; V83A-NEXT: bl foo
@@ -136,8 +136,8 @@ define i32 @non_leaf_scs(i32 %x) "sign-return-address"="non-leaf" shadowcallstac
; CHECK-NEXT: str x30, [x18], #8
; CHECK-NEXT: .cfi_escape 0x16, 0x12, 0x02, 0x82, 0x78 //
; CHECK-NEXT: paciasp
-; CHECK-NEXT: .cfi_negate_ra_state
; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; CHECK-NEXT: .cfi_negate_ra_state
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: .cfi_offset w30, -16
; CHECK-NEXT: bl foo
@@ -164,8 +164,8 @@ define fastcc void @spill_lr_and_tail_call(i64 %x) "sign-return-address"="all" {
; COMPAT-LABEL: spill_lr_and_tail_call:
; COMPAT: // %bb.0:
; COMPAT-NEXT: hint #25
-; COMPAT-NEXT: .cfi_negate_ra_state
; COMPAT-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; COMPAT-NEXT: .cfi_negate_ra_state
; COMPAT-NEXT: .cfi_def_cfa_offset 16
; COMPAT-NEXT: .cfi_offset w30, -16
; COMPAT-NEXT: //APP
@@ -178,8 +178,8 @@ define fastcc void @spill_lr_and_tail_call(i64 %x) "sign-return-address"="all" {
; V83A-LABEL: spill_lr_and_tail_call:
; V83A: // %bb.0:
; V83A-NEXT: paciasp
-; V83A-NEXT: .cfi_negate_ra_state
; V83A-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; V83A-NEXT: .cfi_negate_ra_state
; V83A-NEXT: .cfi_def_cfa_offset 16
; V83A-NEXT: .cfi_offset w30, -16
; V83A-NEXT: //APP
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