[llvm] 7840c00 - [MC] Move MCAsmLayout::SectionOrder to MachObjectWriter::SectionOrder
Fangrui Song via llvm-commits
llvm-commits at lists.llvm.org
Mon Jul 1 13:17:57 PDT 2024
Author: Fangrui Song
Date: 2024-07-01T13:17:53-07:00
New Revision: 7840c0066837797cdeb62aab63044b964aa7f372
URL: https://github.com/llvm/llvm-project/commit/7840c0066837797cdeb62aab63044b964aa7f372
DIFF: https://github.com/llvm/llvm-project/commit/7840c0066837797cdeb62aab63044b964aa7f372.diff
LOG: [MC] Move MCAsmLayout::SectionOrder to MachObjectWriter::SectionOrder
Follow-up to 2c1fb411ce3aed148a278660d215e0f88ff9b9be.
SectionOrder is Mach-O specific to place zerofill sections after
non-zerofill sections in the object writer.
Added:
Modified:
llvm/include/llvm/MC/MCAsmLayout.h
llvm/include/llvm/MC/MCMachObjectWriter.h
llvm/lib/MC/MCAssembler.cpp
llvm/lib/MC/MachObjectWriter.cpp
llvm/tools/dsymutil/MachOUtils.cpp
Removed:
################################################################################
diff --git a/llvm/include/llvm/MC/MCAsmLayout.h b/llvm/include/llvm/MC/MCAsmLayout.h
index 50b0a26d958d6..765cc1ebb7c79 100644
--- a/llvm/include/llvm/MC/MCAsmLayout.h
+++ b/llvm/include/llvm/MC/MCAsmLayout.h
@@ -16,33 +16,14 @@ namespace llvm {
class MCAssembler;
class MCSection;
-/// Encapsulates the layout of an assembly file at a particular point in time.
-///
-/// Assembly may require computing multiple layouts for a particular assembly
-/// file as part of the relaxation process. This class encapsulates the layout
-/// at a single point in time in such a way that it is always possible to
-/// efficiently compute the exact address of any symbol in the assembly file,
-/// even during the relaxation process.
class MCAsmLayout {
MCAssembler &Assembler;
- /// List of sections in layout order.
- llvm::SmallVector<MCSection *, 16> SectionOrder;
-
public:
MCAsmLayout(MCAssembler &Assembler);
/// Get the assembler object this is a layout for.
MCAssembler &getAssembler() const { return Assembler; }
-
-
- /// \name Section Access (in layout order)
- /// @{
-
- llvm::SmallVectorImpl<MCSection *> &getSectionOrder() { return SectionOrder; }
- const llvm::SmallVectorImpl<MCSection *> &getSectionOrder() const {
- return SectionOrder;
- }
};
} // end namespace llvm
diff --git a/llvm/include/llvm/MC/MCMachObjectWriter.h b/llvm/include/llvm/MC/MCMachObjectWriter.h
index 29f286f01be4b..c685e27d6837c 100644
--- a/llvm/include/llvm/MC/MCMachObjectWriter.h
+++ b/llvm/include/llvm/MC/MCMachObjectWriter.h
@@ -109,6 +109,10 @@ class MachObjectWriter : public MCObjectWriter {
SectionAddrMap SectionAddress;
+ // List of sections in layout order. Virtual sections are after non-virtual
+ // sections.
+ SmallVector<MCSection *, 0> SectionOrder;
+
/// @}
/// \name Symbol Table Data
/// @{
@@ -149,6 +153,9 @@ class MachObjectWriter : public MCObjectWriter {
bool isFixupKindPCRel(const MCAssembler &Asm, unsigned Kind);
+ const llvm::SmallVectorImpl<MCSection *> &getSectionOrder() const {
+ return SectionOrder;
+ }
SectionAddrMap &getSectionAddressMap() { return SectionAddress; }
uint64_t getSectionAddress(const MCSection *Sec) const {
diff --git a/llvm/lib/MC/MCAssembler.cpp b/llvm/lib/MC/MCAssembler.cpp
index 5f3f779a8da9d..475146101f067 100644
--- a/llvm/lib/MC/MCAssembler.cpp
+++ b/llvm/lib/MC/MCAssembler.cpp
@@ -381,15 +381,7 @@ uint64_t MCAssembler::computeFragmentSize(const MCFragment &F) const {
llvm_unreachable("invalid fragment kind");
}
-MCAsmLayout::MCAsmLayout(MCAssembler &Asm) : Assembler(Asm) {
- // Compute the section layout order. Virtual sections must go last.
- for (MCSection &Sec : Asm)
- if (!Sec.isVirtualSection())
- SectionOrder.push_back(&Sec);
- for (MCSection &Sec : Asm)
- if (Sec.isVirtualSection())
- SectionOrder.push_back(&Sec);
-}
+MCAsmLayout::MCAsmLayout(MCAssembler &Asm) : Assembler(Asm) {}
// Compute the amount of padding required before the fragment \p F to
// obey bundling restrictions, where \p FOffset is the fragment's offset in
@@ -951,31 +943,26 @@ void MCAssembler::layout(MCAsmLayout &Layout) {
errs() << "assembler backend - pre-layout\n--\n";
dump(); });
- // Create dummy fragments and assign section ordinals.
+ // Assign section ordinals.
unsigned SectionIndex = 0;
- for (MCSection &Sec : *this)
+ for (MCSection &Sec : *this) {
Sec.setOrdinal(SectionIndex++);
- // Assign layout order indices to sections and fragments.
- for (unsigned i = 0, e = Layout.getSectionOrder().size(); i != e; ++i) {
- MCSection *Sec = Layout.getSectionOrder()[i];
- Sec->setLayoutOrder(i);
-
// Chain together fragments from all subsections.
- if (Sec->Subsections.size() > 1) {
+ if (Sec.Subsections.size() > 1) {
MCDummyFragment Dummy;
MCFragment *Tail = &Dummy;
- for (auto &[_, List] : Sec->Subsections) {
+ for (auto &[_, List] : Sec.Subsections) {
assert(List.Head);
Tail->Next = List.Head;
Tail = List.Tail;
}
- Sec->Subsections.clear();
- Sec->Subsections.push_back({0u, {Dummy.getNext(), Tail}});
- Sec->CurFragList = &Sec->Subsections[0].second;
+ Sec.Subsections.clear();
+ Sec.Subsections.push_back({0u, {Dummy.getNext(), Tail}});
+ Sec.CurFragList = &Sec.Subsections[0].second;
unsigned FragmentIndex = 0;
- for (MCFragment &Frag : *Sec)
+ for (MCFragment &Frag : Sec)
Frag.setLayoutOrder(FragmentIndex++);
}
}
diff --git a/llvm/lib/MC/MachObjectWriter.cpp b/llvm/lib/MC/MachObjectWriter.cpp
index e5adf1c3dc611..d9c1156b15451 100644
--- a/llvm/lib/MC/MachObjectWriter.cpp
+++ b/llvm/lib/MC/MachObjectWriter.cpp
@@ -125,10 +125,10 @@ uint64_t MachObjectWriter::getPaddingSize(const MCAssembler &Asm,
const MCSection *Sec) const {
uint64_t EndAddr = getSectionAddress(Sec) + Asm.getSectionAddressSize(*Sec);
unsigned Next = Sec->getLayoutOrder() + 1;
- if (Next >= Asm.getLayout()->getSectionOrder().size())
+ if (Next >= SectionOrder.size())
return 0;
- const MCSection &NextSec = *Asm.getLayout()->getSectionOrder()[Next];
+ const MCSection &NextSec = *SectionOrder[Next];
if (NextSec.isVirtualSection())
return 0;
return offsetToAlignment(EndAddr, NextSec.getAlign());
@@ -670,8 +670,24 @@ void MachObjectWriter::computeSymbolTable(
}
void MachObjectWriter::computeSectionAddresses(const MCAssembler &Asm) {
+ // Assign layout order indices to sections.
+ unsigned i = 0;
+ // Compute the section layout order. Virtual sections must go last.
+ for (MCSection &Sec : Asm) {
+ if (!Sec.isVirtualSection()) {
+ SectionOrder.push_back(&Sec);
+ Sec.setLayoutOrder(i++);
+ }
+ }
+ for (MCSection &Sec : Asm) {
+ if (Sec.isVirtualSection()) {
+ SectionOrder.push_back(&Sec);
+ Sec.setLayoutOrder(i++);
+ }
+ }
+
uint64_t StartAddress = 0;
- for (const MCSection *Sec : Asm.getLayout()->getSectionOrder()) {
+ for (const MCSection *Sec : SectionOrder) {
StartAddress = alignTo(StartAddress, Sec->getAlign());
SectionAddress[Sec] = StartAddress;
StartAddress += Asm.getSectionAddressSize(*Sec);
diff --git a/llvm/tools/dsymutil/MachOUtils.cpp b/llvm/tools/dsymutil/MachOUtils.cpp
index 3665744fc45a1..fba66309ca20b 100644
--- a/llvm/tools/dsymutil/MachOUtils.cpp
+++ b/llvm/tools/dsymutil/MachOUtils.cpp
@@ -326,14 +326,13 @@ static void transferSegmentAndSections(
static bool createDwarfSegment(const MCAssembler& Asm,uint64_t VMAddr, uint64_t FileOffset,
uint64_t FileSize, unsigned NumSections,
MachObjectWriter &Writer) {
- auto &Layout = *Asm.getLayout();
Writer.writeSegmentLoadCommand("__DWARF", NumSections, VMAddr,
alignTo(FileSize, 0x1000), FileOffset,
FileSize, /* MaxProt */ 7,
/* InitProt =*/3);
- for (unsigned int i = 0, n = Layout.getSectionOrder().size(); i != n; ++i) {
- MCSection *Sec = Layout.getSectionOrder()[i];
+ for (unsigned int i = 0, n = Writer.getSectionOrder().size(); i != n; ++i) {
+ MCSection *Sec = Writer.getSectionOrder()[i];
if (!Asm.getSectionFileSize(*Sec))
continue;
@@ -491,8 +490,8 @@ bool generateDsymCompanion(
unsigned NumDwarfSections = 0;
uint64_t DwarfSegmentSize = 0;
- for (unsigned int i = 0, n = Layout.getSectionOrder().size(); i != n; ++i) {
- MCSection *Sec = Layout.getSectionOrder()[i];
+ for (unsigned int i = 0, n = Writer.getSectionOrder().size(); i != n; ++i) {
+ MCSection *Sec = Writer.getSectionOrder()[i];
if (Sec->begin() == Sec->end())
continue;
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