[lld] [llvm] Reapply "[RISCV] Support RISCV Atomics ABI attributes (#84597)" (PR #90266)
Paul Kirth via llvm-commits
llvm-commits at lists.llvm.org
Mon Jul 1 10:54:18 PDT 2024
https://github.com/ilovepi updated https://github.com/llvm/llvm-project/pull/90266
>From d5fbe29b7981fa654ee47d2020c1c2ca2e619680 Mon Sep 17 00:00:00 2001
From: Paul Kirth <paulkirth at google.com>
Date: Fri, 26 Apr 2024 13:51:21 -0700
Subject: [PATCH 1/6] =?UTF-8?q?[=F0=9D=98=80=F0=9D=97=BD=F0=9D=97=BF]=20in?=
=?UTF-8?q?itial=20version?=
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Created using spr 1.3.4
---
lld/ELF/Arch/RISCV.cpp | 63 ++++++
lld/test/ELF/riscv-attributes.s | 202 ++++++++++++++++++
.../llvm/Support/RISCVAttributeParser.h | 1 +
llvm/include/llvm/Support/RISCVAttributes.h | 13 ++
llvm/lib/Support/RISCVAttributeParser.cpp | 13 +-
llvm/lib/Support/RISCVAttributes.cpp | 1 +
.../MCTargetDesc/RISCVTargetStreamer.cpp | 7 +
llvm/test/CodeGen/RISCV/attributes.ll | 10 +-
llvm/test/MC/RISCV/attribute.s | 3 +
llvm/test/MC/RISCV/invalid-attribute.s | 3 +
10 files changed, 314 insertions(+), 2 deletions(-)
diff --git a/lld/ELF/Arch/RISCV.cpp b/lld/ELF/Arch/RISCV.cpp
index 20088d92bafa2..7b9c9c6c6c385 100644
--- a/lld/ELF/Arch/RISCV.cpp
+++ b/lld/ELF/Arch/RISCV.cpp
@@ -1084,10 +1084,62 @@ static void mergeArch(RISCVISAInfo::OrderedExtensionMap &mergedExts,
}
}
+static void mergeAtomic(DenseMap<unsigned, unsigned>::iterator it,
+ const InputSectionBase *oldSection,
+ const InputSectionBase *newSection, unsigned int oldTag,
+ unsigned int newTag) {
+ using RISCVAttrs::RISCVAtomicAbiTag::AtomicABI;
+ // Same tags stay the same, and UNKNOWN is compatible with anything
+ if (oldTag == newTag || newTag == AtomicABI::UNKNOWN)
+ return;
+
+ switch (oldTag) {
+ case AtomicABI::UNKNOWN:
+ it->getSecond() = newTag;
+ return;
+ case AtomicABI::A6C:
+ switch (newTag) {
+ case AtomicABI::A6S:
+ it->getSecond() = AtomicABI::A6C;
+ return;
+ case AtomicABI::A7:
+ error(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+ " but " + toString(newSection) +
+ " has atomic_abi=" + Twine(newTag));
+ return;
+ };
+
+ case AtomicABI::A6S:
+ switch (newTag) {
+ case AtomicABI::A6C:
+ it->getSecond() = AtomicABI::A6C;
+ return;
+ case AtomicABI::A7:
+ it->getSecond() = AtomicABI::A7;
+ return;
+ };
+
+ case AtomicABI::A7:
+ switch (newTag) {
+ case AtomicABI::A6S:
+ it->getSecond() = AtomicABI::A7;
+ return;
+ case AtomicABI::A6C:
+ error(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+ " but " + toString(newSection) +
+ " has atomic_abi=" + Twine(newTag));
+ return;
+ };
+ default:
+ llvm_unreachable("unknown AtomicABI");
+ };
+}
+
static RISCVAttributesSection *
mergeAttributesSection(const SmallVector<InputSectionBase *, 0> §ions) {
RISCVISAInfo::OrderedExtensionMap exts;
const InputSectionBase *firstStackAlign = nullptr;
+ const InputSectionBase *firstAtomicAbi = nullptr;
unsigned firstStackAlignValue = 0, xlen = 0;
bool hasArch = false;
@@ -1134,6 +1186,17 @@ mergeAttributesSection(const SmallVector<InputSectionBase *, 0> §ions) {
case RISCVAttrs::PRIV_SPEC_MINOR:
case RISCVAttrs::PRIV_SPEC_REVISION:
break;
+
+ case llvm::RISCVAttrs::AttrType::ATOMIC_ABI:
+ if (auto i = parser.getAttributeValue(tag.attr)) {
+ auto r = merged.intAttr.try_emplace(tag.attr, *i);
+ if (r.second) {
+ firstAtomicAbi = sec;
+ } else {
+ mergeAtomic(r.first, firstAtomicAbi, sec, r.first->getSecond(), *i);
+ }
+ }
+ continue;
}
// Fallback for deprecated priv_spec* and other unknown attributes: retain
diff --git a/lld/test/ELF/riscv-attributes.s b/lld/test/ELF/riscv-attributes.s
index d0ce0941269ec..77c2c3cb263fd 100644
--- a/lld/test/ELF/riscv-attributes.s
+++ b/lld/test/ELF/riscv-attributes.s
@@ -44,6 +44,39 @@
# RUN: not ld.lld a.o b.o c.o diff_stack_align.o -o /dev/null 2>&1 | FileCheck %s --check-prefix=STACK_ALIGN --implicit-check-not=error:
# STACK_ALIGN: error: diff_stack_align.o:(.riscv.attributes) has stack_align=32 but a.o:(.riscv.attributes) has stack_align=16
+## merging atomic_abi values for A6C and A7 lead to an error.
+# RUN: llvm-mc -filetype=obj -triple=riscv64 atomic_abi_A6C.s -o atomic_abi_A6C.o
+# RUN: llvm-mc -filetype=obj -triple=riscv64 atomic_abi_A7.s -o atomic_abi_A7.o
+# RUN: not ld.lld atomic_abi_A6C.o atomic_abi_A7.o -o /dev/null 2>&1 | FileCheck %s --check-prefix=ATOMIC_ABI_ERROR --implicit-check-not=error:
+# ATOMIC_ABI_ERROR: error: atomic_abi_A6C.o:(.riscv.attributes) has atomic_abi=1 but atomic_abi_A7.o:(.riscv.attributes) has atomic_abi=3
+
+
+# RUN: llvm-mc -filetype=obj -triple=riscv64 atomic_abi_A6S.s -o atomic_abi_A6S.o
+# RUN: ld.lld atomic_abi_A6S.o atomic_abi_A6C.o -o atomic_abi_A6C_A6S
+# RUN: llvm-readobj -A atomic_abi_A6C_A6S | FileCheck %s --check-prefix=A6C_A6S
+
+# RUN: ld.lld atomic_abi_A6S.o atomic_abi_A7.o -o atomic_abi_A6S_A7
+# RUN: llvm-readobj -A atomic_abi_A6S_A7 | FileCheck %s --check-prefix=A6S_A7
+
+# RUN: llvm-mc -filetype=obj -triple=riscv64 atomic_abi_unknown.s -o atomic_abi_unknown.o
+# RUN: ld.lld atomic_abi_unknown.o atomic_abi_A6C.o -o atomic_abi_A6C_unknown
+# RUN: llvm-readobj -A atomic_abi_A6C_unknown | FileCheck %s --check-prefixes=UNKNOWN_A6C
+
+# RUN: ld.lld atomic_abi_unknown.o diff_stack_align.o -o atomic_abi_none_unknown
+# RUN: llvm-readobj -A atomic_abi_none_unknown | FileCheck %s --check-prefixes=UNKNOWN_NONE
+
+# RUN: ld.lld diff_stack_align.o atomic_abi_A6C.o -o atomic_abi_A6C_none
+# RUN: llvm-readobj -A atomic_abi_A6C_none | FileCheck %s --check-prefixes=NONE_A6C
+
+# RUN: ld.lld atomic_abi_unknown.o atomic_abi_A6S.o -o atomic_abi_A6S_unknown
+# RUN: llvm-readobj -A atomic_abi_A6S_unknown | FileCheck %s --check-prefix=UNKNOWN_A6S
+
+# RUN: ld.lld atomic_abi_unknown.o atomic_abi_A7.o -o atomic_abi_A7_unknown
+# RUN: llvm-readobj -A atomic_abi_A7_unknown | FileCheck %s --check-prefix=UNKNOWN_A7
+
+# RUN: ld.lld diff_stack_align.o atomic_abi_A7.o -o atomic_abi_A7_none
+# RUN: llvm-readobj -A atomic_abi_A7_none | FileCheck %s --check-prefix=NONE_A7
+
## The deprecated priv_spec is not handled as GNU ld does.
## Differing priv_spec attributes lead to an absent attribute.
# RUN: llvm-mc -filetype=obj -triple=riscv64 diff_priv_spec.s -o diff_priv_spec.o
@@ -286,6 +319,175 @@
.attribute priv_spec, 3
.attribute priv_spec_minor, 3
+#--- atomic_abi_unknown.s
+.attribute atomic_abi, 0
+
+#--- atomic_abi_A6C.s
+.attribute atomic_abi, 1
+
+#--- atomic_abi_A6S.s
+.attribute atomic_abi, 2
+
+#--- atomic_abi_A7.s
+.attribute atomic_abi, 3
+
+# UNKNOWN_NONE: BuildAttributes {
+# UNKNOWN_NONE-NEXT: FormatVersion: 0x41
+# UNKNOWN_NONE-NEXT: Section 1 {
+# UNKNOWN_NONE-NEXT: SectionLength: 17
+# UNKNOWN_NONE-NEXT: Vendor: riscv
+# UNKNOWN_NONE-NEXT: Tag: Tag_File (0x1)
+# UNKNOWN_NONE-NEXT: Size: 7
+# UNKNOWN_NONE-NEXT: FileAttributes {
+# UNKNOWN_NONE-NEXT: Attribute {
+# UNKNOWN_NONE-NEXT: Tag: 4
+# UNKNOWN_NONE-NEXT: Value: 32
+# UNKNOWN_NONE-NEXT: TagName: stack_align
+# UNKNOWN_NONE-NEXT: Description: Stack alignment is 32-bytes
+# UNKNOWN_NONE-NEXT: }
+# UNKNOWN_NONE-NEXT: }
+# UNKNOWN_NONE-NEXT: }
+# UNKNOWN_NONE-NEXT: }
+
+# NONE_A6C: BuildAttributes {
+# NONE_A6C-NEXT: FormatVersion: 0x41
+# NONE_A6C-NEXT: Section 1 {
+# NONE_A6C-NEXT: SectionLength: 19
+# NONE_A6C-NEXT: Vendor: riscv
+# NONE_A6C-NEXT: Tag: Tag_File (0x1)
+# NONE_A6C-NEXT: Size: 9
+# NONE_A6C-NEXT: FileAttributes {
+# NONE_A6C-NEXT: Attribute {
+# NONE_A6C-NEXT: Tag: 14
+# NONE_A6C-NEXT: Value: 1
+# NONE_A6C-NEXT: TagName: atomic_abi
+# NONE_A6C-NEXT: Description: Atomic ABI is 1
+# NONE_A6C-NEXT: }
+# NONE_A6C-NEXT: Attribute {
+# NONE_A6C-NEXT: Tag: 4
+# NONE_A6C-NEXT: Value: 32
+# NONE_A6C-NEXT: TagName: stack_align
+# NONE_A6C-NEXT: Description: Stack alignment is 32-bytes
+# NONE_A6C-NEXT: }
+# NONE_A6C-NEXT: }
+# NONE_A6C-NEXT: }
+# NONE_A6C-NEXT: }
+
+# UNKNOWN_A6C: BuildAttributes {
+# UNKNOWN_A6C-NEXT: FormatVersion: 0x41
+# UNKNOWN_A6C-NEXT: Section 1 {
+# UNKNOWN_A6C-NEXT: SectionLength: 17
+# UNKNOWN_A6C-NEXT: Vendor: riscv
+# UNKNOWN_A6C-NEXT: Tag: Tag_File (0x1)
+# UNKNOWN_A6C-NEXT: Size: 7
+# UNKNOWN_A6C-NEXT: FileAttributes {
+# UNKNOWN_A6C-NEXT: Attribute {
+# UNKNOWN_A6C-NEXT: Tag: 14
+# UNKNOWN_A6C-NEXT: Value: 1
+# UNKNOWN_A6C-NEXT: TagName: atomic_abi
+# UNKNOWN_A6C-NEXT: Description: Atomic ABI is 1
+# UNKNOWN_A6C-NEXT: }
+# UNKNOWN_A6C-NEXT: }
+# UNKNOWN_A6C-NEXT: }
+# UNKNOWN_A6C-NEXT: }
+
+# UNKNOWN_A6S: BuildAttributes {
+# UNKNOWN_A6S-NEXT: FormatVersion: 0x41
+# UNKNOWN_A6S-NEXT: Section 1 {
+# UNKNOWN_A6S-NEXT: SectionLength:
+# UNKNOWN_A6S-NEXT: Vendor: riscv
+# UNKNOWN_A6S-NEXT: Tag: Tag_File (0x1)
+# UNKNOWN_A6S-NEXT: Size: 7
+# UNKNOWN_A6S-NEXT: FileAttributes {
+# UNKNOWN_A6S-NEXT: Attribute {
+# UNKNOWN_A6S-NEXT: Tag: 14
+# UNKNOWN_A6S-NEXT: Value: 2
+# UNKNOWN_A6S-NEXT: TagName: atomic_abi
+# UNKNOWN_A6S-NEXT: Description: Atomic ABI is 2
+# UNKNOWN_A6S-NEXT: }
+# UNKNOWN_A6S-NEXT: }
+# UNKNOWN_A6S-NEXT: }
+# UNKNOWN_A6S-NEXT: }
+
+# NONE_A7: BuildAttributes {
+# NONE_A7-NEXT: FormatVersion: 0x41
+# NONE_A7-NEXT: Section 1 {
+# NONE_A7-NEXT: SectionLength: 19
+# NONE_A7-NEXT: Vendor: riscv
+# NONE_A7-NEXT: Tag: Tag_File (0x1)
+# NONE_A7-NEXT: Size: 9
+# NONE_A7-NEXT: FileAttributes {
+# NONE_A7-NEXT: Attribute {
+# NONE_A7-NEXT: Tag: 14
+# NONE_A7-NEXT: Value: 3
+# NONE_A7-NEXT: TagName: atomic_abi
+# NONE_A7-NEXT: Description: Atomic ABI is 3
+# NONE_A7-NEXT: }
+# NONE_A7-NEXT: Attribute {
+# NONE_A7-NEXT: Tag: 4
+# NONE_A7-NEXT: Value: 32
+# NONE_A7-NEXT: TagName: stack_align
+# NONE_A7-NEXT: Description: Stack alignment is 32-bytes
+# NONE_A7-NEXT: }
+# NONE_A7-NEXT: }
+# NONE_A7-NEXT: }
+# NONE_A7-NEXT: }
+
+
+# UNKNOWN_A7: BuildAttributes {
+# UNKNOWN_A7-NEXT: FormatVersion: 0x41
+# UNKNOWN_A7-NEXT: Section 1 {
+# UNKNOWN_A7-NEXT: SectionLength: 17
+# UNKNOWN_A7-NEXT: Vendor: riscv
+# UNKNOWN_A7-NEXT: Tag: Tag_File (0x1)
+# UNKNOWN_A7-NEXT: Size: 7
+# UNKNOWN_A7-NEXT: FileAttributes {
+# UNKNOWN_A7-NEXT: Attribute {
+# UNKNOWN_A7-NEXT: Tag: 14
+# UNKNOWN_A7-NEXT: Value: 3
+# UNKNOWN_A7-NEXT: TagName: atomic_abi
+# UNKNOWN_A7-NEXT: Description: Atomic ABI is 3
+# UNKNOWN_A7-NEXT: }
+# UNKNOWN_A7-NEXT: }
+# UNKNOWN_A7-NEXT: }
+# UNKNOWN_A7-NEXT: }
+
+# A6C_A6S: BuildAttributes {
+# A6C_A6S-NEXT: FormatVersion: 0x41
+# A6C_A6S-NEXT: Section 1 {
+# A6C_A6S-NEXT: SectionLength: 17
+# A6C_A6S-NEXT: Vendor: riscv
+# A6C_A6S-NEXT: Tag: Tag_File (0x1)
+# A6C_A6S-NEXT: Size: 7
+# A6C_A6S-NEXT: FileAttributes {
+# A6C_A6S-NEXT: Attribute {
+# A6C_A6S-NEXT: Tag: 14
+# A6C_A6S-NEXT: Value: 1
+# A6C_A6S-NEXT: TagName: atomic_abi
+# A6C_A6S-NEXT: Description: Atomic ABI is 1
+# A6C_A6S-NEXT: }
+# A6C_A6S-NEXT: }
+# A6C_A6S-NEXT: }
+# A6C_A6S-NEXT: }
+
+# A6S_A7: BuildAttributes {
+# A6S_A7-NEXT: FormatVersion: 0x41
+# A6S_A7-NEXT: Section 1 {
+# A6S_A7-NEXT: SectionLength: 17
+# A6S_A7-NEXT: Vendor: riscv
+# A6S_A7-NEXT: Tag: Tag_File (0x1)
+# A6S_A7-NEXT: Size: 7
+# A6S_A7-NEXT: FileAttributes {
+# A6S_A7-NEXT: Attribute {
+# A6S_A7-NEXT: Tag: 14
+# A6S_A7-NEXT: Value: 3
+# A6S_A7-NEXT: TagName: atomic_abi
+# A6S_A7-NEXT: Description: Atomic ABI is 3
+# A6S_A7-NEXT: }
+# A6S_A7-NEXT: }
+# A6S_A7-NEXT: }
+# A6S_A7-NEXT: }
+
#--- unknown13.s
.attribute 13, "0"
#--- unknown13a.s
diff --git a/llvm/include/llvm/Support/RISCVAttributeParser.h b/llvm/include/llvm/Support/RISCVAttributeParser.h
index 305adffbe851e..9f295504de959 100644
--- a/llvm/include/llvm/Support/RISCVAttributeParser.h
+++ b/llvm/include/llvm/Support/RISCVAttributeParser.h
@@ -24,6 +24,7 @@ class RISCVAttributeParser : public ELFAttributeParser {
Error unalignedAccess(unsigned tag);
Error stackAlign(unsigned tag);
+ Error atomicAbi(unsigned tag);
public:
RISCVAttributeParser(ScopedPrinter *sw)
diff --git a/llvm/include/llvm/Support/RISCVAttributes.h b/llvm/include/llvm/Support/RISCVAttributes.h
index 18f5a84d21f25..5def890a72735 100644
--- a/llvm/include/llvm/Support/RISCVAttributes.h
+++ b/llvm/include/llvm/Support/RISCVAttributes.h
@@ -32,8 +32,21 @@ enum AttrType : unsigned {
PRIV_SPEC = 8,
PRIV_SPEC_MINOR = 10,
PRIV_SPEC_REVISION = 12,
+ ATOMIC_ABI = 14,
};
+namespace RISCVAtomicAbiTag {
+enum AtomicABI : unsigned {
+ // Values for Tag_RISCV_atomic_abi
+ // Defined at
+ // https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-elf.adoc#tag_riscv_atomic_abi-14-uleb128version
+ UNKNOWN = 0,
+ A6C = 1,
+ A6S = 2,
+ A7 = 3,
+};
+} // namespace RISCVAtomicAbiTag
+
enum { NOT_ALLOWED = 0, ALLOWED = 1 };
} // namespace RISCVAttrs
diff --git a/llvm/lib/Support/RISCVAttributeParser.cpp b/llvm/lib/Support/RISCVAttributeParser.cpp
index 7ce4b6ab161cd..19c5a0e06903f 100644
--- a/llvm/lib/Support/RISCVAttributeParser.cpp
+++ b/llvm/lib/Support/RISCVAttributeParser.cpp
@@ -36,7 +36,18 @@ const RISCVAttributeParser::DisplayHandler
{
RISCVAttrs::UNALIGNED_ACCESS,
&RISCVAttributeParser::unalignedAccess,
- }};
+ },
+ {
+ RISCVAttrs::ATOMIC_ABI,
+ &RISCVAttributeParser::atomicAbi,
+ },
+};
+
+Error RISCVAttributeParser::atomicAbi(unsigned Tag) {
+ uint64_t Value = de.getULEB128(cursor);
+ printAttribute(Tag, Value, "Atomic ABI is " + utostr(Value));
+ return Error::success();
+}
Error RISCVAttributeParser::unalignedAccess(unsigned tag) {
static const char *strings[] = {"No unaligned access", "Unaligned access"};
diff --git a/llvm/lib/Support/RISCVAttributes.cpp b/llvm/lib/Support/RISCVAttributes.cpp
index 9e629760d3d84..dc70d65acba06 100644
--- a/llvm/lib/Support/RISCVAttributes.cpp
+++ b/llvm/lib/Support/RISCVAttributes.cpp
@@ -18,6 +18,7 @@ static constexpr TagNameItem tagData[] = {
{PRIV_SPEC, "Tag_priv_spec"},
{PRIV_SPEC_MINOR, "Tag_priv_spec_minor"},
{PRIV_SPEC_REVISION, "Tag_priv_spec_revision"},
+ {ATOMIC_ABI, "Tag_atomic_abi"},
};
constexpr TagNameMap RISCVAttributeTags{tagData};
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp
index 0f92e9ed6a64d..6f5f12cc72862 100644
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp
@@ -75,6 +75,13 @@ void RISCVTargetStreamer::emitTargetAttributes(const MCSubtargetInfo &STI,
auto &ISAInfo = *ParseResult;
emitTextAttribute(RISCVAttrs::ARCH, ISAInfo->toString());
}
+
+ if (STI.hasFeature(RISCV::FeatureStdExtA)) {
+ unsigned AtomicABITag = STI.hasFeature(RISCV::FeatureTrailingSeqCstFence)
+ ? RISCVAttrs::RISCVAtomicAbiTag::AtomicABI::A6S
+ : RISCVAttrs::RISCVAtomicAbiTag::AtomicABI::A6C;
+ emitAttribute(RISCVAttrs::ATOMIC_ABI, AtomicABITag);
+ }
}
// This part is for ascii assembly output
diff --git a/llvm/test/CodeGen/RISCV/attributes.ll b/llvm/test/CodeGen/RISCV/attributes.ll
index 141d5ea418289..1aff3e8b83f40 100644
--- a/llvm/test/CodeGen/RISCV/attributes.ll
+++ b/llvm/test/CodeGen/RISCV/attributes.ll
@@ -129,7 +129,8 @@
; RUN: llc -mtriple=riscv64 -mattr=+m %s -o - | FileCheck --check-prefixes=CHECK,RV64M %s
; RUN: llc -mtriple=riscv64 -mattr=+zmmul %s -o - | FileCheck --check-prefixes=CHECK,RV64ZMMUL %s
; RUN: llc -mtriple=riscv64 -mattr=+m,+zmmul %s -o - | FileCheck --check-prefixes=CHECK,RV64MZMMUL %s
-; RUN: llc -mtriple=riscv64 -mattr=+a %s -o - | FileCheck --check-prefixes=CHECK,RV64A %s
+; RUN: llc -mtriple=riscv64 -mattr=+a %s -o - | FileCheck --check-prefixes=CHECK,RV64A,A6C %s
+; RUN: llc -mtriple=riscv64 -mattr=+a,+seq-cst-trailing-fence %s -o - | FileCheck --check-prefixes=CHECK,RV64A,A6S %s
; RUN: llc -mtriple=riscv64 -mattr=+f %s -o - | FileCheck --check-prefixes=CHECK,RV64F %s
; RUN: llc -mtriple=riscv64 -mattr=+d %s -o - | FileCheck --check-prefixes=CHECK,RV64D %s
; RUN: llc -mtriple=riscv64 -mattr=+c %s -o - | FileCheck --check-prefixes=CHECK,RV64C %s
@@ -516,3 +517,10 @@ define i32 @addi(i32 %a) {
%1 = add i32 %a, 1
ret i32 %1
}
+
+define i8 @atomic_load_i8_seq_cst(ptr %a) nounwind {
+ %1 = load atomic i8, ptr %a seq_cst, align 1
+ ret i8 %1
+; A6S: .attribute 14, 2
+; A6C: .attribute 14, 1
+}
diff --git a/llvm/test/MC/RISCV/attribute.s b/llvm/test/MC/RISCV/attribute.s
index 56f0cb1daf176..75b9c65ed1cc2 100644
--- a/llvm/test/MC/RISCV/attribute.s
+++ b/llvm/test/MC/RISCV/attribute.s
@@ -24,3 +24,6 @@
.attribute priv_spec_revision, 0
# CHECK: attribute 12, 0
+
+.attribute atomic_abi, 0
+# CHECK: attribute 14, 0
diff --git a/llvm/test/MC/RISCV/invalid-attribute.s b/llvm/test/MC/RISCV/invalid-attribute.s
index 1d732af83cda3..2ebf7ddc9aff8 100644
--- a/llvm/test/MC/RISCV/invalid-attribute.s
+++ b/llvm/test/MC/RISCV/invalid-attribute.s
@@ -33,3 +33,6 @@
.attribute arch, 30
# CHECK: [[@LINE-1]]:18: error: expected string constant
+
+.attribute atomic_abi, "16"
+# CHECK: [[@LINE-1]]:24: error: expected numeric constant
>From 849a8be7ec4083635243a5307dcbdb796a4925d7 Mon Sep 17 00:00:00 2001
From: Paul Kirth <paulkirth at google.com>
Date: Thu, 2 May 2024 09:11:21 -0700
Subject: [PATCH 2/6] Remove braces and clean up LLD test
Created using spr 1.3.4
---
lld/ELF/Arch/RISCV.cpp | 9 ++++-----
lld/test/ELF/riscv-attributes.s | 3 +--
2 files changed, 5 insertions(+), 7 deletions(-)
diff --git a/lld/ELF/Arch/RISCV.cpp b/lld/ELF/Arch/RISCV.cpp
index 7b9c9c6c6c385..7b3116ef1afdd 100644
--- a/lld/ELF/Arch/RISCV.cpp
+++ b/lld/ELF/Arch/RISCV.cpp
@@ -1103,7 +1103,7 @@ static void mergeAtomic(DenseMap<unsigned, unsigned>::iterator it,
it->getSecond() = AtomicABI::A6C;
return;
case AtomicABI::A7:
- error(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+ errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
" but " + toString(newSection) +
" has atomic_abi=" + Twine(newTag));
return;
@@ -1125,7 +1125,7 @@ static void mergeAtomic(DenseMap<unsigned, unsigned>::iterator it,
it->getSecond() = AtomicABI::A7;
return;
case AtomicABI::A6C:
- error(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+ errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
" but " + toString(newSection) +
" has atomic_abi=" + Twine(newTag));
return;
@@ -1190,11 +1190,10 @@ mergeAttributesSection(const SmallVector<InputSectionBase *, 0> §ions) {
case llvm::RISCVAttrs::AttrType::ATOMIC_ABI:
if (auto i = parser.getAttributeValue(tag.attr)) {
auto r = merged.intAttr.try_emplace(tag.attr, *i);
- if (r.second) {
+ if (r.second)
firstAtomicAbi = sec;
- } else {
+ else
mergeAtomic(r.first, firstAtomicAbi, sec, r.first->getSecond(), *i);
- }
}
continue;
}
diff --git a/lld/test/ELF/riscv-attributes.s b/lld/test/ELF/riscv-attributes.s
index 77c2c3cb263fd..70bcd10c0a4fa 100644
--- a/lld/test/ELF/riscv-attributes.s
+++ b/lld/test/ELF/riscv-attributes.s
@@ -44,13 +44,12 @@
# RUN: not ld.lld a.o b.o c.o diff_stack_align.o -o /dev/null 2>&1 | FileCheck %s --check-prefix=STACK_ALIGN --implicit-check-not=error:
# STACK_ALIGN: error: diff_stack_align.o:(.riscv.attributes) has stack_align=32 but a.o:(.riscv.attributes) has stack_align=16
-## merging atomic_abi values for A6C and A7 lead to an error.
+## RISC-V tag merging for atomic_abi values A6C and A7 lead to an error.
# RUN: llvm-mc -filetype=obj -triple=riscv64 atomic_abi_A6C.s -o atomic_abi_A6C.o
# RUN: llvm-mc -filetype=obj -triple=riscv64 atomic_abi_A7.s -o atomic_abi_A7.o
# RUN: not ld.lld atomic_abi_A6C.o atomic_abi_A7.o -o /dev/null 2>&1 | FileCheck %s --check-prefix=ATOMIC_ABI_ERROR --implicit-check-not=error:
# ATOMIC_ABI_ERROR: error: atomic_abi_A6C.o:(.riscv.attributes) has atomic_abi=1 but atomic_abi_A7.o:(.riscv.attributes) has atomic_abi=3
-
# RUN: llvm-mc -filetype=obj -triple=riscv64 atomic_abi_A6S.s -o atomic_abi_A6S.o
# RUN: ld.lld atomic_abi_A6S.o atomic_abi_A6C.o -o atomic_abi_A6C_A6S
# RUN: llvm-readobj -A atomic_abi_A6C_A6S | FileCheck %s --check-prefix=A6C_A6S
>From 907f6f01b4ff8831cb852d747acd11d480d5757e Mon Sep 17 00:00:00 2001
From: Paul Kirth <paulkirth at google.com>
Date: Thu, 2 May 2024 09:13:33 -0700
Subject: [PATCH 3/6] git clang-format
Created using spr 1.3.4
---
lld/ELF/Arch/RISCV.cpp | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/lld/ELF/Arch/RISCV.cpp b/lld/ELF/Arch/RISCV.cpp
index 7b3116ef1afdd..0a11ab9a6f93c 100644
--- a/lld/ELF/Arch/RISCV.cpp
+++ b/lld/ELF/Arch/RISCV.cpp
@@ -1104,8 +1104,8 @@ static void mergeAtomic(DenseMap<unsigned, unsigned>::iterator it,
return;
case AtomicABI::A7:
errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
- " but " + toString(newSection) +
- " has atomic_abi=" + Twine(newTag));
+ " but " + toString(newSection) +
+ " has atomic_abi=" + Twine(newTag));
return;
};
@@ -1126,8 +1126,8 @@ static void mergeAtomic(DenseMap<unsigned, unsigned>::iterator it,
return;
case AtomicABI::A6C:
errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
- " but " + toString(newSection) +
- " has atomic_abi=" + Twine(newTag));
+ " but " + toString(newSection) +
+ " has atomic_abi=" + Twine(newTag));
return;
};
default:
>From 0f0a91827e4538fdc633c22ed046a3dce98a2697 Mon Sep 17 00:00:00 2001
From: Paul Kirth <paulkirth at google.com>
Date: Thu, 9 May 2024 17:21:28 -0700
Subject: [PATCH 4/6] Add flag for attributes emmission
Created using spr 1.3.4
---
llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp | 3 ++-
llvm/lib/Target/RISCV/RISCVFeatures.td | 3 +++
llvm/test/CodeGen/RISCV/attributes.ll | 4 ++--
3 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp
index 6f5f12cc72862..45ca0f4b57dd4 100644
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp
@@ -76,7 +76,8 @@ void RISCVTargetStreamer::emitTargetAttributes(const MCSubtargetInfo &STI,
emitTextAttribute(RISCVAttrs::ARCH, ISAInfo->toString());
}
- if (STI.hasFeature(RISCV::FeatureStdExtA)) {
+ if (STI.hasFeature(RISCV::FeatureAbiAttributes) &&
+ STI.hasFeature(RISCV::FeatureStdExtA)) {
unsigned AtomicABITag = STI.hasFeature(RISCV::FeatureTrailingSeqCstFence)
? RISCVAttrs::RISCVAtomicAbiTag::AtomicABI::A6S
: RISCVAttrs::RISCVAtomicAbiTag::AtomicABI::A6C;
diff --git a/llvm/lib/Target/RISCV/RISCVFeatures.td b/llvm/lib/Target/RISCV/RISCVFeatures.td
index c3dc4ea53697c..c1d0d01082d0f 100644
--- a/llvm/lib/Target/RISCV/RISCVFeatures.td
+++ b/llvm/lib/Target/RISCV/RISCVFeatures.td
@@ -1221,6 +1221,9 @@ def FeatureTrailingSeqCstFence : SubtargetFeature<"seq-cst-trailing-fence",
"true",
"Enable trailing fence for seq-cst store.">;
+def FeatureAbiAttributes : SubtargetFeature<"abi-attr", "EnableAbiAttributes",
+ "true", "Enable emitting RISC-V ABI attributes">;
+
def FeatureUnalignedScalarMem
: SubtargetFeature<"unaligned-scalar-mem", "EnableUnalignedScalarMem",
"true", "Has reasonably performant unaligned scalar "
diff --git a/llvm/test/CodeGen/RISCV/attributes.ll b/llvm/test/CodeGen/RISCV/attributes.ll
index 1aff3e8b83f40..272659d8d2ebe 100644
--- a/llvm/test/CodeGen/RISCV/attributes.ll
+++ b/llvm/test/CodeGen/RISCV/attributes.ll
@@ -129,8 +129,8 @@
; RUN: llc -mtriple=riscv64 -mattr=+m %s -o - | FileCheck --check-prefixes=CHECK,RV64M %s
; RUN: llc -mtriple=riscv64 -mattr=+zmmul %s -o - | FileCheck --check-prefixes=CHECK,RV64ZMMUL %s
; RUN: llc -mtriple=riscv64 -mattr=+m,+zmmul %s -o - | FileCheck --check-prefixes=CHECK,RV64MZMMUL %s
-; RUN: llc -mtriple=riscv64 -mattr=+a %s -o - | FileCheck --check-prefixes=CHECK,RV64A,A6C %s
-; RUN: llc -mtriple=riscv64 -mattr=+a,+seq-cst-trailing-fence %s -o - | FileCheck --check-prefixes=CHECK,RV64A,A6S %s
+; RUN: llc -mtriple=riscv64 -mattr=+a,+abi-attr %s -o - | FileCheck --check-prefixes=CHECK,RV64A,A6C %s
+; RUN: llc -mtriple=riscv64 -mattr=+a,+seq-cst-trailing-fence,+abi-attr %s -o - | FileCheck --check-prefixes=CHECK,RV64A,A6S %s
; RUN: llc -mtriple=riscv64 -mattr=+f %s -o - | FileCheck --check-prefixes=CHECK,RV64F %s
; RUN: llc -mtriple=riscv64 -mattr=+d %s -o - | FileCheck --check-prefixes=CHECK,RV64D %s
; RUN: llc -mtriple=riscv64 -mattr=+c %s -o - | FileCheck --check-prefixes=CHECK,RV64C %s
>From 4742ccb514d2949b58cc500e4e448426e153335c Mon Sep 17 00:00:00 2001
From: Paul Kirth <paulkirth at google.com>
Date: Mon, 1 Jul 2024 10:45:25 -0700
Subject: [PATCH 5/6] Try to make the mergeAtomic API more natural
Created using spr 1.3.4
---
lld/ELF/Arch/RISCV.cpp | 26 +++++++++++++++-----------
1 file changed, 15 insertions(+), 11 deletions(-)
diff --git a/lld/ELF/Arch/RISCV.cpp b/lld/ELF/Arch/RISCV.cpp
index 1d9be92601006..102e8235e27af 100644
--- a/lld/ELF/Arch/RISCV.cpp
+++ b/lld/ELF/Arch/RISCV.cpp
@@ -1086,27 +1086,28 @@ static void mergeArch(RISCVISAUtils::OrderedExtensionMap &mergedExts,
static void mergeAtomic(DenseMap<unsigned, unsigned>::iterator it,
const InputSectionBase *oldSection,
- const InputSectionBase *newSection, unsigned int oldTag,
- unsigned int newTag) {
+ const InputSectionBase *newSection,
+ RISCVAttrs::RISCVAtomicAbiTag oldTag,
+ RISCVAttrs::RISCVAtomicAbiTag newTag) {
using RISCVAttrs::RISCVAtomicAbiTag;
// Same tags stay the same, and UNKNOWN is compatible with anything
- if (oldTag == newTag ||
- newTag == static_cast<unsigned>(RISCVAtomicAbiTag::UNKNOWN))
+ if (oldTag == newTag || newTag == RISCVAtomicAbiTag::UNKNOWN)
return;
auto reportAbiError = [&]() {
errorOrWarn("atomic abi mismatch for " + oldSection->name + "\n>>> " +
- toString(oldSection) + ": atomic_abi=" + Twine(oldTag) +
+ toString(oldSection) +
+ ": atomic_abi=" + Twine(static_cast<unsigned>(oldTag)) +
"\n>>> " + toString(newSection) +
- ": atomic_abi=" + Twine(newTag));
+ ": atomic_abi=" + Twine(static_cast<unsigned>(newTag)));
};
switch (static_cast<RISCVAtomicAbiTag>(oldTag)) {
case RISCVAtomicAbiTag::UNKNOWN:
- it->getSecond() = newTag;
+ it->getSecond() = static_cast<unsigned>(newTag);
return;
case RISCVAtomicAbiTag::A6C:
- switch (static_cast<RISCVAtomicAbiTag>(newTag)) {
+ switch (newTag) {
case RISCVAtomicAbiTag::A6S:
it->getSecond() = static_cast<unsigned>(RISCVAtomicAbiTag::A6C);
return;
@@ -1120,7 +1121,7 @@ static void mergeAtomic(DenseMap<unsigned, unsigned>::iterator it,
break;
case RISCVAtomicAbiTag::A6S:
- switch (static_cast<RISCVAtomicAbiTag>(newTag)) {
+ switch (newTag) {
case RISCVAtomicAbiTag::A6C:
it->getSecond() = static_cast<unsigned>(RISCVAtomicAbiTag::A6C);
return;
@@ -1134,7 +1135,7 @@ static void mergeAtomic(DenseMap<unsigned, unsigned>::iterator it,
break;
case RISCVAtomicAbiTag::A7:
- switch (static_cast<RISCVAtomicAbiTag>(newTag)) {
+ switch (newTag) {
case RISCVAtomicAbiTag::A6S:
it->getSecond() = static_cast<unsigned>(RISCVAtomicAbiTag::A7);
return;
@@ -1151,6 +1152,7 @@ static void mergeAtomic(DenseMap<unsigned, unsigned>::iterator it,
static RISCVAttributesSection *
mergeAttributesSection(const SmallVector<InputSectionBase *, 0> §ions) {
+ using RISCVAttrs::RISCVAtomicAbiTag;
RISCVISAUtils::OrderedExtensionMap exts;
const InputSectionBase *firstStackAlign = nullptr;
const InputSectionBase *firstAtomicAbi = nullptr;
@@ -1207,7 +1209,9 @@ mergeAttributesSection(const SmallVector<InputSectionBase *, 0> §ions) {
if (r.second)
firstAtomicAbi = sec;
else
- mergeAtomic(r.first, firstAtomicAbi, sec, r.first->getSecond(), *i);
+ mergeAtomic(r.first, firstAtomicAbi, sec,
+ static_cast<RISCVAtomicAbiTag>(r.first->getSecond()),
+ static_cast<RISCVAtomicAbiTag>(*i));
}
continue;
}
>From b408b8e7aa80395f052acd8352adb1ee72c2773b Mon Sep 17 00:00:00 2001
From: Paul Kirth <paulkirth at google.com>
Date: Mon, 1 Jul 2024 10:54:03 -0700
Subject: [PATCH 6/6] Simplify switch logic w/ return
Created using spr 1.3.4
---
lld/ELF/Arch/RISCV.cpp | 8 +++-----
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/lld/ELF/Arch/RISCV.cpp b/lld/ELF/Arch/RISCV.cpp
index 102e8235e27af..aa11aaa61a532 100644
--- a/lld/ELF/Arch/RISCV.cpp
+++ b/lld/ELF/Arch/RISCV.cpp
@@ -1116,9 +1116,8 @@ static void mergeAtomic(DenseMap<unsigned, unsigned>::iterator it,
return;
case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
case RISCVAttrs::RISCVAtomicAbiTag::A6C:
- break;
+ return;
};
- break;
case RISCVAtomicAbiTag::A6S:
switch (newTag) {
@@ -1130,9 +1129,8 @@ static void mergeAtomic(DenseMap<unsigned, unsigned>::iterator it,
return;
case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
case RISCVAttrs::RISCVAtomicAbiTag::A6S:
- break;
+ return;
};
- break;
case RISCVAtomicAbiTag::A7:
switch (newTag) {
@@ -1144,7 +1142,7 @@ static void mergeAtomic(DenseMap<unsigned, unsigned>::iterator it,
return;
case RISCVAttrs::RISCVAtomicAbiTag::UNKNOWN:
case RISCVAttrs::RISCVAtomicAbiTag::A7:
- break;
+ return;
};
};
llvm_unreachable("unknown AtomicABI");
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