[llvm] [RISCV] Enable encodng conflict framework for RISCV target. (PR #97287)

[Jessica Clarke via llvm-commits]

================
@@ -1860,11 +1860,18 @@ ParseStatus RISCVAsmParser::parseCSRSystemRegister(OperandVector &Operands) {
     if (CE) {
       int64_t Imm = CE->getValue();
       if (isUInt<12>(Imm)) {
-        auto SysReg = RISCVSysReg::lookupSysRegByEncoding(Imm);
-        // Accept an immediate representing a named or un-named Sys Reg
-        // if the range is valid, regardless of the required features.
-        Operands.push_back(
-            RISCVOperand::createSysReg(SysReg ? SysReg->Name : "", S, Imm));
+        auto Range = RISCVSysReg::lookupSysRegByEncoding(Imm);
+        // Accept an immediate representing a named Sys Reg if it satisfies the
+        // the requried features.
+        for (auto It : Range) {
----------------
jrtc27 wrote:

Do these want to be const auto &?

https://github.com/llvm/llvm-project/pull/97287