[llvm] [MIPS] Fix wrong errors being emitted when rejecting certain assembly… (PR #94695)

[Jesse D via llvm-commits]

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@@ -6410,7 +6410,7 @@ bool MipsAsmParser::parseOperand(OperandVector &Operands, StringRef Mnemonic) {
 
   // Check if the current operand has a custom associated parser, if so, try to
   // custom parse the operand, or fallback to the general approach.
-  ParseStatus Res = MatchOperandParserImpl(Operands, Mnemonic);
+  ParseStatus Res = MatchOperandParserImpl(Operands, Mnemonic, true);
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jdeguire wrote:

As far as I understand, setting the third parameter to True tells the operand parser to accept the operands if they are not valid with the current feature set, but would be valid if the correct feature set were enabled. An example of this would be an instruction that could take floating-point registers if the target device had an FPU. Finding the exact instruction variant that takes those operands is done after parsing them and it is at that point the "instruction requires a CPU feature not currently enabled" error is triggered. The default for that third parameter is False, which in this case causes the operand parser to give up if an operand is not valid in the current feature set. The symptom is that you will receive a less useful "invalid operand" error instead of one telling you that you do not have the correct features enabled.

https://github.com/llvm/llvm-project/pull/94695