[llvm] 651e916 - [RISCV] Add missing CHECK lines for new vsetvli test. NFC
Luke Lau via llvm-commits
llvm-commits at lists.llvm.org
Sun Jun 30 23:05:38 PDT 2024
Author: Luke Lau
Date: 2024-07-01T14:05:22+08:00
New Revision: 651e91658b6b119225f641f60c7750f42f0d1089
URL: https://github.com/llvm/llvm-project/commit/651e91658b6b119225f641f60c7750f42f0d1089
DIFF: https://github.com/llvm/llvm-project/commit/651e91658b6b119225f641f60c7750f42f0d1089.diff
LOG: [RISCV] Add missing CHECK lines for new vsetvli test. NFC
Added:
Modified:
llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll b/llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll
index d984e266d7658..68e8f5dd0a406 100644
--- a/llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll
@@ -1042,6 +1042,13 @@ declare <vscale x 4 x i32> @llvm.riscv.vadd.mask.nxv4i32.nxv4i32(
; AVL can be from a predecessor block, so make sure we extend its live range
; across blocks.
define <vscale x 2 x i32> @cross_block_avl_extend(i64 %avl, <vscale x 2 x i32> %a, <vscale x 2 x i32> %b) {
+; CHECK-LABEL: cross_block_avl_extend:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: vsetivli zero, 1, e32, m1, ta, ma
+; CHECK-NEXT: vadd.vv v9, v8, v9
+; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma
+; CHECK-NEXT: vadd.vv v8, v8, v9
+; CHECK-NEXT: ret
entry:
; Get the output vl from a vsetvli
%vl = call i64 @llvm.riscv.vsetvli.i64(i64 %avl, i64 2, i64 0)
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