[llvm] cd0f891 - [JITLink][AArch32] Fix Unaligned Data Symbol Address Resolution (#97030)
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Sat Jun 29 08:27:10 PDT 2024
Author: Eymen Ünay
Date: 2024-06-29T18:27:06+03:00
New Revision: cd0f89109bf90442cab8cfeaf5fce17cbddeef73
URL: https://github.com/llvm/llvm-project/commit/cd0f89109bf90442cab8cfeaf5fce17cbddeef73
DIFF: https://github.com/llvm/llvm-project/commit/cd0f89109bf90442cab8cfeaf5fce17cbddeef73.diff
LOG: [JITLink][AArch32] Fix Unaligned Data Symbol Address Resolution (#97030)
The ARM architecture uses the LSB bit for ARM/Thumb mode switch
flagging. This is true for alignments of 2 and 4 but in data
relocations the alignment is 1 allowing the LSB bit to be set.
Now only `ELF::STT_FUNC` typed symbols are used in the
TargetFlag mechanism.
The test is a minimal example of the issue mentioned below.
Fixes #95911 "Orc global constructor order test fails on 32
bit ARM".
Added:
llvm/test/ExecutionEngine/JITLink/AArch32/ELF_data_alignment.s
Modified:
llvm/lib/ExecutionEngine/JITLink/ELF_aarch32.cpp
llvm/test/ExecutionEngine/Orc/global-ctor-order.ll
Removed:
################################################################################
diff --git a/llvm/lib/ExecutionEngine/JITLink/ELF_aarch32.cpp b/llvm/lib/ExecutionEngine/JITLink/ELF_aarch32.cpp
index 908b88fef1b31..866de2cb227c3 100644
--- a/llvm/lib/ExecutionEngine/JITLink/ELF_aarch32.cpp
+++ b/llvm/lib/ExecutionEngine/JITLink/ELF_aarch32.cpp
@@ -200,6 +200,9 @@ class ELFLinkGraphBuilder_aarch32
protected:
TargetFlagsType makeTargetFlags(const typename ELFT::Sym &Sym) override {
+ // Only emit target flag for callable symbols
+ if (Sym.getType() != ELF::STT_FUNC)
+ return TargetFlagsType{};
if (Sym.getValue() & 0x01)
return aarch32::ThumbSymbol;
return TargetFlagsType{};
@@ -209,7 +212,9 @@ class ELFLinkGraphBuilder_aarch32
TargetFlagsType Flags) override {
assert((makeTargetFlags(Sym) & Flags) == Flags);
static constexpr uint64_t ThumbBit = 0x01;
- return Sym.getValue() & ~ThumbBit;
+ if (Sym.getType() == ELF::STT_FUNC)
+ return Sym.getValue() & ~ThumbBit;
+ return Sym.getValue();
}
public:
diff --git a/llvm/test/ExecutionEngine/JITLink/AArch32/ELF_data_alignment.s b/llvm/test/ExecutionEngine/JITLink/AArch32/ELF_data_alignment.s
new file mode 100644
index 0000000000000..882e938e0fadb
--- /dev/null
+++ b/llvm/test/ExecutionEngine/JITLink/AArch32/ELF_data_alignment.s
@@ -0,0 +1,67 @@
+# RUN: llvm-mc -triple=armv7-linux-gnueabi -arm-add-build-attributes -filetype=obj -o %t_armv7.o %s
+# RUN: llvm-objdump -s --section=.rodata %t_armv7.o | FileCheck --check-prefix=CHECK-OBJ %s
+# RUN: llvm-jitlink -noexec -slab-address 0x76ff0000 -slab-allocate 10Kb \
+# RUN: -slab-page-size 4096 %t_armv7.o -debug-only=jitlink 2>&1 \
+# RUN: | FileCheck --check-prefix=CHECK-LG %s
+# RUN: llvm-jitlink -noexec -slab-address 0x76ff0000 -slab-allocate 10Kb \
+# RUN: -slab-page-size 4096 %t_armv7.o -check %s
+
+# RUN: llvm-mc -triple=thumbv7-linux-gnueabi -arm-add-build-attributes -filetype=obj -o %t_thumbv7.o %s
+# RUN: llvm-objdump -s --section=.rodata %t_thumbv7.o | FileCheck --check-prefix=CHECK-OBJ %s
+# RUN: llvm-jitlink -noexec -slab-address 0x76ff0000 -slab-allocate 10Kb \
+# RUN: -slab-page-size 4096 %t_thumbv7.o -debug-only=jitlink 2>&1 \
+# RUN: | FileCheck --check-prefix=CHECK-LG %s
+# RUN: llvm-jitlink -noexec -slab-address 0x76ff0000 -slab-allocate 10Kb \
+# RUN: -slab-page-size 4096 %t_thumbv7.o -check %s
+
+# The strings of "H1\00", "H2\00" and "H3\00" are encoded as
+# 0x483100, 0x483200 and 0x483300 in the .rodata section.
+# CHECK-OBJ: Contents of section .rodata:
+# CHECK-OBJ: 0000 48310048 32004833 00 H1.H2.H3.
+
+# CHECK-LG: Starting link phase 1 for graph
+# CHECK-LG: section .rodata:
+
+# CHECK-LG: block 0x0 size = 0x00000009, align = 1, alignment-offset = 0
+# CHECK-LG-NEXT: symbols:
+# CHECK-LG-NEXT: 0x0 (block + 0x00000000): size: 0x00000003, linkage: strong, scope: default, live - Lstr.H1
+# CHECK-LG-NEXT: 0x3 (block + 0x00000003): size: 0x00000003, linkage: strong, scope: default, live - Lstr.H2
+# CHECK-LG-NOT: 0x2 (block + 0x00000002): size: 0x00000003, linkage: strong, scope: default, live - Lstr.H2
+# CHECK-LG-NEXT: 0x6 (block + 0x00000006): size: 0x00000003, linkage: strong, scope: default, live - Lstr.H3
+
+# jitlink-check: Lstr.H1 = 0x76ff0000
+# jitlink-check: (*{4}(Lstr.H1))[23:0] = 0x003148
+ .globl Lstr.H1
+ .type Lstr.H1,%object
+ .section .rodata,"a",%progbits
+Lstr.H1:
+ .asciz "H1"
+ .size Lstr.H1, 3
+
+# H2 is unaligned as its beginning address is base address + 0x3
+# Make sure the string we get is 0x003248 and not 0x324800
+# jitlink-check: Lstr.H2 = 0x76ff0003
+# jitlink-check: (*{4}(Lstr.H2))[23:0] = 0x003248
+ .globl Lstr.H2
+ .type Lstr.H2,%object
+Lstr.H2:
+ .asciz "H2"
+ .size Lstr.H2, 3
+
+# jitlink-check: Lstr.H3 = 0x76ff0006
+# jitlink-check: (*{4}(Lstr.H3))[23:0] = 0x003348
+ .globl Lstr.H3
+ .type Lstr.H3,%object
+Lstr.H3:
+ .asciz "H3"
+ .size Lstr.H3, 3
+
+ .text
+ .syntax unified
+# Empty main function for jitlink to be happy
+ .globl main
+ .type main,%function
+ .p2align 2
+main:
+ bx lr
+ .size main,.-main
diff --git a/llvm/test/ExecutionEngine/Orc/global-ctor-order.ll b/llvm/test/ExecutionEngine/Orc/global-ctor-order.ll
index de9a35465f8cb..98cf67af8276d 100644
--- a/llvm/test/ExecutionEngine/Orc/global-ctor-order.ll
+++ b/llvm/test/ExecutionEngine/Orc/global-ctor-order.ll
@@ -1,9 +1,5 @@
; Test that global constructors are correctly ordered
;
-; Uncovers a pre-existing issue on Arm 32 bit, see
-; https://github.com/llvm/llvm-project/issues/95911.
-; UNSUPPORTED: target=arm{{.*}}
-;
; RUN: lli -jit-kind=orc %s | FileCheck %s
;
; CHECK: H1
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