[llvm] [HEXAGON] Utilize new mask instruction (PR #92365)

Eli Friedman via llvm-commits llvm-commits at lists.llvm.org
Fri Jun 28 12:32:46 PDT 2024


================
@@ -0,0 +1,111 @@
+//===-- HexagonMask.cpp - replace const ext tfri with mask ------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+//===----------------------------------------------------------------------===//
+
+#define DEBUG_TYPE "mask"
+
+#include "HexagonMachineFunctionInfo.h"
+#include "HexagonSubtarget.h"
+#include "HexagonTargetMachine.h"
+#include "llvm/ADT/SmallString.h"
+#include "llvm/ADT/Statistic.h"
+#include "llvm/ADT/Twine.h"
+#include "llvm/CodeGen/MachineFunction.h"
+#include "llvm/CodeGen/MachineFunctionPass.h"
+#include "llvm/CodeGen/MachineInstrBuilder.h"
+#include "llvm/CodeGen/Passes.h"
+#include "llvm/CodeGen/TargetInstrInfo.h"
+#include "llvm/IR/Function.h"
+#include "llvm/IR/Module.h"
+#include "llvm/Support/CommandLine.h"
+#include "llvm/Support/Debug.h"
+#include "llvm/Support/MathExtras.h"
+#include "llvm/Target/TargetMachine.h"
+
+#if defined(_MSC_VER)
+#include <intrin.h>
+#endif
+
+using namespace llvm;
+
+namespace llvm {
+FunctionPass *createHexagonMask();
+void initializeHexagonMaskPass(PassRegistry &);
+
+class HexagonMask : public MachineFunctionPass {
+public:
+  static char ID;
+  HexagonMask() : MachineFunctionPass(ID) {
+    PassRegistry &Registry = *PassRegistry::getPassRegistry();
+    initializeHexagonMaskPass(Registry);
+  }
+
+  StringRef getPassName() const override {
+    return "Hexagon replace const ext tfri with mask";
+  }
+  bool runOnMachineFunction(MachineFunction &MF) override;
+
+private:
+  const HexagonInstrInfo *HII;
+  void replaceConstExtTransferImmWithMask(MachineFunction &MF);
+};
+
+char HexagonMask::ID = 0;
+
+void HexagonMask::replaceConstExtTransferImmWithMask(MachineFunction &MF) {
+  for (auto &MBB : MF) {
+    for (auto &MI : llvm::make_early_inc_range(MBB)) {
+      if (MI.getOpcode() != Hexagon::A2_tfrsi)
+        continue;
+
+      const MachineOperand &Op0 = MI.getOperand(0);
+      const MachineOperand &Op1 = MI.getOperand(1);
+      if (!Op1.isImm())
+        continue;
+      int32_t V = Op1.getImm();
+      if (isInt<16>(V))
+        continue;
+
+      unsigned Idx, Len;
+      if (!isShiftedMask_32(V, Idx, Len))
+        continue;
+      if (!isUInt<5>(Idx) || !isUInt<5>(Len))
+        continue;
+
+      BuildMI(MBB, MI, MI.getDebugLoc(), HII->get(Hexagon::S2_mask),
+              Op0.getReg())
+          .addImm(Len)
+          .addImm(Idx);
+      MBB.erase(MI);
+    }
+  }
+}
+
+bool HexagonMask::runOnMachineFunction(MachineFunction &MF) {
+  auto &HST = MF.getSubtarget<HexagonSubtarget>();
+  HII = HST.getInstrInfo();
+  const Function &F = MF.getFunction();
+
+  if (!F.hasFnAttribute(Attribute::OptimizeForSize))
----------------
efriedma-quic wrote:

A comment explaining the reasoning behind this heuristic might be helpful.

https://github.com/llvm/llvm-project/pull/92365


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