[llvm] [SPARC][IAS] Emit the correct 32-bit ELF machine type (PR #96583)

[via llvm-commits]

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@@ -132,14 +132,18 @@ namespace {
   class SparcAsmBackend : public MCAsmBackend {
   protected:
     const Target &TheTarget;
+    const MCSubtargetInfo &TheSTI;
     bool Is64Bit;
+    bool HasV9;
 
   public:
-    SparcAsmBackend(const Target &T)
+    SparcAsmBackend(const Target &T, const MCSubtargetInfo &STI)
         : MCAsmBackend(StringRef(T.getName()) == "sparcel"
                            ? llvm::endianness::little
                            : llvm::endianness::big),
-          TheTarget(T), Is64Bit(StringRef(TheTarget.getName()) == "sparcv9") {}
+          TheTarget(T), TheSTI(STI),
+          Is64Bit(StringRef(TheTarget.getName()) == "sparcv9"),
----------------
koachan wrote:

Seems so. In [Triple.cpp](https://github.com/llvm/llvm-project/blob/69c99ad7e84b075bbafc541a2e4397e18975391d/llvm/lib/TargetParser/Triple.cpp#L571) both `sparcv9` and `sparc64` resolves to `Triple::sparcv9`, then in [SparcTargetInfo.cpp](https://github.com/llvm/llvm-project/blob/6c5b62b846ec327dd8e78d4c365b3059a298c019/llvm/lib/Target/Sparc/TargetInfo/SparcTargetInfo.cpp#L29-L30) said triple is registered under the "sparcv9" name.

https://github.com/llvm/llvm-project/pull/96583