[llvm] [Xtensa] Implement lowering SELECT_CC, SETCC. (PR #97017)

[Matt Arsenault via llvm-commits]

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@@ -0,0 +1,125 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc -mtriple=xtensa -disable-block-placement -verify-machineinstrs < %s \
+; RUN:   | FileCheck %s
+
+define signext i32 @foo(i32 signext %a, ptr %b) nounwind {
+; CHECK-LABEL: foo:
+; CHECK:         l32i a8, a3, 0
+; CHECK-NEXT:    beq a2, a8, .LBB0_2
+; CHECK-NEXT:  # %bb.1:
+; CHECK-NEXT:    or a2, a8, a8
+; CHECK-NEXT:  .LBB0_2:
+; CHECK-NEXT:    bne a2, a8, .LBB0_4
+; CHECK-NEXT:  # %bb.3:
+; CHECK-NEXT:    or a2, a8, a8
+; CHECK-NEXT:  .LBB0_4:
+; CHECK-NEXT:    bltu a8, a2, .LBB0_6
+; CHECK-NEXT:  # %bb.5:
+; CHECK-NEXT:    or a2, a8, a8
+; CHECK-NEXT:  .LBB0_6:
+; CHECK-NEXT:    bgeu a2, a8, .LBB0_8
+; CHECK-NEXT:  # %bb.7:
+; CHECK-NEXT:    or a2, a8, a8
+; CHECK-NEXT:  .LBB0_8:
+; CHECK-NEXT:    bltu a2, a8, .LBB0_10
+; CHECK-NEXT:  # %bb.9:
+; CHECK-NEXT:    or a2, a8, a8
+; CHECK-NEXT:  .LBB0_10:
+; CHECK-NEXT:    bgeu a8, a2, .LBB0_12
+; CHECK-NEXT:  # %bb.11:
+; CHECK-NEXT:    or a2, a8, a8
+; CHECK-NEXT:  .LBB0_12:
+; CHECK-NEXT:    blt a8, a2, .LBB0_14
+; CHECK-NEXT:  # %bb.13:
+; CHECK-NEXT:    or a2, a8, a8
+; CHECK-NEXT:  .LBB0_14:
+; CHECK-NEXT:    bge a2, a8, .LBB0_16
+; CHECK-NEXT:  # %bb.15:
+; CHECK-NEXT:    or a2, a8, a8
+; CHECK-NEXT:  .LBB0_16:
+; CHECK-NEXT:    blt a2, a8, .LBB0_18
+; CHECK-NEXT:  # %bb.17:
+; CHECK-NEXT:    or a2, a8, a8
+; CHECK-NEXT:  .LBB0_18:
+; CHECK-NEXT:    bge a8, a2, .LBB0_20
+; CHECK-NEXT:  # %bb.19:
+; CHECK-NEXT:    or a2, a8, a8
+; CHECK-NEXT:  .LBB0_20:
+; CHECK-NEXT:    movi a9, 1
+; CHECK-NEXT:    blt a8, a9, .LBB0_22
+; CHECK-NEXT:  # %bb.21:
+; CHECK-NEXT:    or a2, a8, a8
+; CHECK-NEXT:  .LBB0_22:
+; CHECK-NEXT:    movi a9, -1
+; CHECK-NEXT:    blt a9, a8, .LBB0_24
+; CHECK-NEXT:  # %bb.23:
+; CHECK-NEXT:    or a2, a8, a8
+; CHECK-NEXT:  .LBB0_24:
+; CHECK-NEXT:    movi a9, 1024
+; CHECK-NEXT:    blt a9, a8, .LBB0_26
+; CHECK-NEXT:  # %bb.25:
+; CHECK-NEXT:    or a2, a8, a8
+; CHECK-NEXT:  .LBB0_26:
+; CHECK-NEXT:    movi a9, 2046
+; CHECK-NEXT:    bltu a9, a8, .LBB0_28
+; CHECK-NEXT:  # %bb.27:
+; CHECK-NEXT:    or a2, a8, a8
+; CHECK-NEXT:  .LBB0_28:
+; CHECK-NEXT:    ret
+  %val1 = load i32, ptr %b
+  %tst1 = icmp eq i32 %a, %val1
+  %val2 = select i1 %tst1, i32 %a, i32 %val1
+
+  %val3 = load i32, ptr %b
+  %tst2 = icmp ne i32 %val2, %val3
+  %val4 = select i1 %tst2, i32 %val2, i32 %val3
+
+  %val5 = load i32, ptr %b
+  %tst3 = icmp ugt i32 %val4, %val5
+  %val6 = select i1 %tst3, i32 %val4, i32 %val5
+
+  %val7 = load i32, ptr %b
+  %tst4 = icmp uge i32 %val6, %val7
+  %val8 = select i1 %tst4, i32 %val6, i32 %val7
+
+  %val9 = load i32, ptr %b
+  %tst5 = icmp ult i32 %val8, %val9
+  %val10 = select i1 %tst5, i32 %val8, i32 %val9
+
+  %val11 = load i32, ptr %b
+  %tst6 = icmp ule i32 %val10, %val11
+  %val12 = select i1 %tst6, i32 %val10, i32 %val11
+
+  %val13 = load i32, ptr %b
+  %tst7 = icmp sgt i32 %val12, %val13
+  %val14 = select i1 %tst7, i32 %val12, i32 %val13
+
+  %val15 = load i32, ptr %b
+  %tst8 = icmp sge i32 %val14, %val15
+  %val16 = select i1 %tst8, i32 %val14, i32 %val15
+
+  %val17 = load i32, ptr %b
+  %tst9 = icmp slt i32 %val16, %val17
+  %val18 = select i1 %tst9, i32 %val16, i32 %val17
+
+  %val19 = load i32, ptr %b
+  %tst10 = icmp sle i32 %val18, %val19
+  %val20 = select i1 %tst10, i32 %val18, i32 %val19
+
+  %val21 = load i32, ptr %b
+  %tst11 = icmp slt i32 %val21, 1
+  %val22 = select i1 %tst11, i32 %val20, i32 %val21
+
+  %val23 = load i32, ptr %b
+  %tst12 = icmp sgt i32 %val21, -1
+  %val24 = select i1 %tst12, i32 %val22, i32 %val23
+
+  %val25 = load i32, ptr %b
+  %tst13 = icmp sgt i32 %val25, 1024
+  %val26 = select i1 %tst13, i32 %val24, i32 %val25
+
+  %val27 = load i32, ptr %b
+  %tst14 = icmp ugt i32 %val21, 2046
+  %val28 = select i1 %tst14, i32 %val26, i32 %val27
----------------
arsenm wrote:

I think it's easiest to follow and debug a test when each case is in its own function 

https://github.com/llvm/llvm-project/pull/97017