[llvm] [Transforms] Let amdgcn take advantage of sin(-x) --> -sin(x) (PR #79700)
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Thu Jun 27 19:38:22 PDT 2024
https://github.com/AtariDreams updated https://github.com/llvm/llvm-project/pull/79700
>From 48898b25be628af5726c5247899bc477b8552200 Mon Sep 17 00:00:00 2001
From: Rose <gfunni234 at gmail.com>
Date: Wed, 26 Jun 2024 23:46:53 -0400
Subject: [PATCH 1/2] [Transforms] Add pre-commit tests [NFC]
---
.../InstCombine/AMDGPU/amdgcn-intrinsics.ll | 54 +++++++++++++++++++
1 file changed, 54 insertions(+)
diff --git a/llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll b/llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
index 925e88d041715..1db719245804b 100644
--- a/llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
+++ b/llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
@@ -1023,6 +1023,60 @@ define float @cos_fabs_unary_fneg_f32(float %x) {
ret float %cos
}
+
+; --------------------------------------------------------------------
+; llvm.amdgcn.sin
+; --------------------------------------------------------------------
+declare float @llvm.amdgcn.sin.f32(float) nounwind readnone
+
+define float @sin_fneg_f32(float %x) {
+; CHECK-LABEL: @sin_fneg_f32(
+; CHECK-NEXT: [[X_FNEG:%.*]] = fneg float [[X:%.*]]
+; CHECK-NEXT: [[SIN:%.*]] = call float @llvm.amdgcn.sin.f32(float [[X_FNEG]])
+; CHECK-NEXT: ret float [[SIN]]
+;
+ %x.fneg = fneg float %x
+ %sin = call float @llvm.amdgcn.sin.f32(float %x.fneg)
+ ret float %sin
+}
+
+define float @sin_fabs_f32(float %x) {
+; CHECK-LABEL: @sin_fabs_f32(
+; CHECK-NEXT: [[X_FABS:%.*]] = call float @llvm.fabs.f32(float [[X:%.*]])
+; CHECK-NEXT: [[SIN:%.*]] = call float @llvm.amdgcn.sin.f32(float [[X_FABS]])
+; CHECK-NEXT: ret float [[SIN]]
+;
+ %x.fabs = call float @llvm.fabs.f32(float %x)
+ %sin = call float @llvm.amdgcn.sin.f32(float %x.fabs)
+ ret float %sin
+}
+
+define float @sin_fabs_fneg_f32(float %x) {
+; CHECK-LABEL: @sin_fabs_fneg_f32(
+; CHECK-NEXT: [[X_FABS:%.*]] = call float @llvm.fabs.f32(float [[X:%.*]])
+; CHECK-NEXT: [[X_FABS_FNEG:%.*]] = fneg float [[X_FABS]]
+; CHECK-NEXT: [[SIN:%.*]] = call float @llvm.amdgcn.sin.f32(float [[X_FABS_FNEG]])
+; CHECK-NEXT: ret float [[SIN]]
+;
+ %x.fabs = call float @llvm.fabs.f32(float %x)
+ %x.fabs.fneg = fneg float %x.fabs
+ %sin = call float @llvm.amdgcn.sin.f32(float %x.fabs.fneg)
+ ret float %sin
+}
+
+define float @sin_fabs_fneg_fast_f32(float %x) {
+; CHECK-LABEL: @sin_fabs_fneg_fast_f32(
+; CHECK-NEXT: [[X_FABS:%.*]] = call fast float @llvm.fabs.f32(float [[X:%.*]])
+; CHECK-NEXT: [[X_FABS_FNEG:%.*]] = fneg float [[X_FABS]]
+; CHECK-NEXT: [[SIN:%.*]] = call fast float @llvm.amdgcn.sin.f32(float [[X_FABS_FNEG]])
+; CHECK-NEXT: ret float [[SIN]]
+;
+ %x.fabs = call fast float @llvm.fabs.f32(float %x)
+ %x.fabs.fneg = fneg float %x.fabs
+ %sin = call fast float @llvm.amdgcn.sin.f32(float %x.fabs.fneg)
+ ret float %sin
+}
+
; --------------------------------------------------------------------
; llvm.amdgcn.cvt.pkrtz
; --------------------------------------------------------------------
>From 811e6b86577b369f3fff640b53d9675764858757 Mon Sep 17 00:00:00 2001
From: Rose <gfunni234 at gmail.com>
Date: Thu, 27 Jun 2024 22:08:21 -0400
Subject: [PATCH 2/2] [Transforms] Let amdgcn take advantage of sin(-x) -->
-sin(x)
We do it for amdgcn_cos, and we should do it for amdgcn_sin as well.
---
llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp | 9 ++++-----
.../InstCombine/AMDGPU/amdgcn-intrinsics.ll | 12 ++++++------
2 files changed, 10 insertions(+), 11 deletions(-)
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp b/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
index 921ed6e67d022..9291e6e67ef71 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
@@ -2579,14 +2579,13 @@ Instruction *InstCombinerImpl::visitCallInst(CallInst &CI) {
}
break;
}
- case Intrinsic::sin: {
+ case Intrinsic::sin:
+ case Intrinsic::amdgcn_sin: {
Value *X;
if (match(II->getArgOperand(0), m_OneUse(m_FNeg(m_Value(X))))) {
// sin(-x) --> -sin(x)
- Value *NewSin = Builder.CreateUnaryIntrinsic(Intrinsic::sin, X, II);
- Instruction *FNeg = UnaryOperator::CreateFNeg(NewSin);
- FNeg->copyFastMathFlags(II);
- return FNeg;
+ Value *NewSin = Builder.CreateUnaryIntrinsic(IID, X, II);
+ return UnaryOperator::CreateFNegFMF(NewSin, II);
}
break;
}
diff --git a/llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll b/llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
index 1db719245804b..59118a172a2bc 100644
--- a/llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
+++ b/llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
@@ -1031,8 +1031,8 @@ declare float @llvm.amdgcn.sin.f32(float) nounwind readnone
define float @sin_fneg_f32(float %x) {
; CHECK-LABEL: @sin_fneg_f32(
-; CHECK-NEXT: [[X_FNEG:%.*]] = fneg float [[X:%.*]]
-; CHECK-NEXT: [[SIN:%.*]] = call float @llvm.amdgcn.sin.f32(float [[X_FNEG]])
+; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.amdgcn.sin.f32(float [[X:%.*]])
+; CHECK-NEXT: [[SIN:%.*]] = fneg float [[TMP1]]
; CHECK-NEXT: ret float [[SIN]]
;
%x.fneg = fneg float %x
@@ -1054,8 +1054,8 @@ define float @sin_fabs_f32(float %x) {
define float @sin_fabs_fneg_f32(float %x) {
; CHECK-LABEL: @sin_fabs_fneg_f32(
; CHECK-NEXT: [[X_FABS:%.*]] = call float @llvm.fabs.f32(float [[X:%.*]])
-; CHECK-NEXT: [[X_FABS_FNEG:%.*]] = fneg float [[X_FABS]]
-; CHECK-NEXT: [[SIN:%.*]] = call float @llvm.amdgcn.sin.f32(float [[X_FABS_FNEG]])
+; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.amdgcn.sin.f32(float [[X_FABS]])
+; CHECK-NEXT: [[SIN:%.*]] = fneg float [[TMP1]]
; CHECK-NEXT: ret float [[SIN]]
;
%x.fabs = call float @llvm.fabs.f32(float %x)
@@ -1067,8 +1067,8 @@ define float @sin_fabs_fneg_f32(float %x) {
define float @sin_fabs_fneg_fast_f32(float %x) {
; CHECK-LABEL: @sin_fabs_fneg_fast_f32(
; CHECK-NEXT: [[X_FABS:%.*]] = call fast float @llvm.fabs.f32(float [[X:%.*]])
-; CHECK-NEXT: [[X_FABS_FNEG:%.*]] = fneg float [[X_FABS]]
-; CHECK-NEXT: [[SIN:%.*]] = call fast float @llvm.amdgcn.sin.f32(float [[X_FABS_FNEG]])
+; CHECK-NEXT: [[TMP1:%.*]] = call fast float @llvm.amdgcn.sin.f32(float [[X_FABS]])
+; CHECK-NEXT: [[SIN:%.*]] = fneg fast float [[TMP1]]
; CHECK-NEXT: ret float [[SIN]]
;
%x.fabs = call fast float @llvm.fabs.f32(float %x)
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