[llvm] [IR] Add getDataLayout() helpers to Function and GlobalValue (PR #96919)
Nikita Popov via llvm-commits
llvm-commits at lists.llvm.org
Thu Jun 27 09:05:38 PDT 2024
https://github.com/nikic updated https://github.com/llvm/llvm-project/pull/96919
>From 220afb08823fe70a950ca34698ec83b9f4b248dc Mon Sep 17 00:00:00 2001
From: Nikita Popov <npopov at redhat.com>
Date: Thu, 27 Jun 2024 17:09:12 +0200
Subject: [PATCH 1/3] add helper
---
llvm/include/llvm/IR/Function.h | 6 ++++++
llvm/include/llvm/IR/GlobalValue.h | 6 ++++++
llvm/lib/IR/Function.cpp | 4 ++++
llvm/lib/IR/Globals.cpp | 4 ++++
4 files changed, 20 insertions(+)
diff --git a/llvm/include/llvm/IR/Function.h b/llvm/include/llvm/IR/Function.h
index 6bd997b7ac75a..fd7a6aa46eea0 100644
--- a/llvm/include/llvm/IR/Function.h
+++ b/llvm/include/llvm/IR/Function.h
@@ -47,6 +47,7 @@ typedef unsigned ID;
class AssemblyAnnotationWriter;
class Constant;
class ConstantRange;
+class DataLayout;
struct DenormalMode;
class DISubprogram;
enum LibFunc : unsigned;
@@ -214,6 +215,11 @@ class LLVM_EXTERNAL_VISIBILITY Function : public GlobalObject,
/// function.
LLVMContext &getContext() const;
+ /// Get the data layout of the module this function belongs to.
+ ///
+ /// Requires the function to have a parent module.
+ const DataLayout &getDataLayout() const;
+
/// isVarArg - Return true if this function takes a variable number of
/// arguments.
bool isVarArg() const { return getFunctionType()->isVarArg(); }
diff --git a/llvm/include/llvm/IR/GlobalValue.h b/llvm/include/llvm/IR/GlobalValue.h
index b1262b27f0221..540a21c1118b8 100644
--- a/llvm/include/llvm/IR/GlobalValue.h
+++ b/llvm/include/llvm/IR/GlobalValue.h
@@ -32,6 +32,7 @@ namespace llvm {
class Comdat;
class ConstantRange;
+class DataLayout;
class Error;
class GlobalObject;
class Module;
@@ -655,6 +656,11 @@ class GlobalValue : public Constant {
Module *getParent() { return Parent; }
const Module *getParent() const { return Parent; }
+ /// Get the data layout of the module this global belongs to.
+ ///
+ /// Requires the global to have a parent module.
+ const DataLayout &getDataLayout() const;
+
// Methods for support type inquiry through isa, cast, and dyn_cast:
static bool classof(const Value *V) {
return V->getValueID() == Value::FunctionVal ||
diff --git a/llvm/lib/IR/Function.cpp b/llvm/lib/IR/Function.cpp
index 1190a3fb9be23..5fb348a8bbcd4 100644
--- a/llvm/lib/IR/Function.cpp
+++ b/llvm/lib/IR/Function.cpp
@@ -359,6 +359,10 @@ LLVMContext &Function::getContext() const {
return getType()->getContext();
}
+const DataLayout &Function::getDataLayout() const {
+ return getParent()->getDataLayout();
+}
+
unsigned Function::getInstructionCount() const {
unsigned NumInstrs = 0;
for (const BasicBlock &BB : BasicBlocks)
diff --git a/llvm/lib/IR/Globals.cpp b/llvm/lib/IR/Globals.cpp
index 3cc29ea8a340d..c51852987614c 100644
--- a/llvm/lib/IR/Globals.cpp
+++ b/llvm/lib/IR/Globals.cpp
@@ -121,6 +121,10 @@ bool GlobalValue::canBenefitFromLocalAlias() const {
!isa<GlobalIFunc>(this) && !isDeduplicateComdat(getComdat());
}
+const DataLayout &GlobalValue::getDataLayout() const {
+ return getParent()->getDataLayout();
+}
+
void GlobalObject::setAlignment(MaybeAlign Align) {
assert((!Align || *Align <= MaximumAlignment) &&
"Alignment is greater than MaximumAlignment!");
>From 1c6ff329b1a053e2996c9797136d2e451d56289e Mon Sep 17 00:00:00 2001
From: Nikita Popov <npopov at redhat.com>
Date: Thu, 27 Jun 2024 17:10:03 +0200
Subject: [PATCH 2/3] replace
---
llvm/include/llvm/Analysis/ScalarEvolution.h | 2 +-
.../CodeGen/GlobalISel/MachineIRBuilder.h | 2 +-
llvm/lib/Analysis/AliasAnalysisEvaluator.cpp | 2 +-
llvm/lib/Analysis/BasicAliasAnalysis.cpp | 4 +--
llvm/lib/Analysis/ConstantFolding.cpp | 8 ++---
llvm/lib/Analysis/DependenceAnalysis.cpp | 4 +--
llvm/lib/Analysis/InlineCost.cpp | 4 +--
llvm/lib/Analysis/InstructionSimplify.cpp | 4 +--
llvm/lib/Analysis/LazyValueInfo.cpp | 2 +-
llvm/lib/Analysis/Lint.cpp | 2 +-
llvm/lib/Analysis/MemDerefPrinter.cpp | 2 +-
llvm/lib/Analysis/ObjCARCAliasAnalysis.cpp | 2 +-
llvm/lib/Analysis/StackLifetime.cpp | 2 +-
llvm/lib/Analysis/StackSafetyAnalysis.cpp | 4 +--
llvm/lib/Analysis/TargetTransformInfo.cpp | 2 +-
llvm/lib/Analysis/ValueTracking.cpp | 2 +-
llvm/lib/AsmParser/LLParser.cpp | 6 ++--
llvm/lib/CodeGen/Analysis.cpp | 2 +-
llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 22 ++++++------
.../CodeGen/AssignmentTrackingAnalysis.cpp | 4 +--
llvm/lib/CodeGen/AtomicExpandPass.cpp | 4 +--
llvm/lib/CodeGen/BasicTargetTransformInfo.cpp | 2 +-
llvm/lib/CodeGen/CodeGenPrepare.cpp | 6 ++--
llvm/lib/CodeGen/ExpandMemCmp.cpp | 2 +-
llvm/lib/CodeGen/ExpandVectorPredication.cpp | 2 +-
llvm/lib/CodeGen/GlobalISel/CallLowering.cpp | 2 +-
.../lib/CodeGen/GlobalISel/GISelKnownBits.cpp | 2 +-
llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp | 2 +-
.../CodeGen/GlobalISel/InlineAsmLowering.cpp | 2 +-
llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp | 4 +--
llvm/lib/CodeGen/HardwareLoops.cpp | 4 +--
llvm/lib/CodeGen/IndirectBrExpandPass.cpp | 2 +-
.../CodeGen/InterleavedLoadCombinePass.cpp | 2 +-
llvm/lib/CodeGen/MachineFunction.cpp | 2 +-
llvm/lib/CodeGen/SafeStack.cpp | 4 +--
.../SelectionDAG/FunctionLoweringInfo.cpp | 4 +--
llvm/lib/CodeGen/SjLjEHPrepare.cpp | 2 +-
.../CodeGen/TargetLoweringObjectFileImpl.cpp | 6 ++--
llvm/lib/CodeGen/TypePromotion.cpp | 2 +-
llvm/lib/CodeGen/WinEHPrepare.cpp | 2 +-
llvm/lib/ExecutionEngine/ExecutionEngine.cpp | 4 +--
.../ExecutionEngine/Orc/ExecutionUtils.cpp | 2 +-
llvm/lib/ExecutionEngine/Orc/Mangling.cpp | 2 +-
llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp | 4 +--
llvm/lib/IR/DebugInfo.cpp | 2 +-
llvm/lib/IR/Mangler.cpp | 6 ++--
llvm/lib/Linker/LinkModules.cpp | 2 +-
llvm/lib/Object/IRSymtab.cpp | 2 +-
.../Target/AArch64/AArch64ISelLowering.cpp | 6 ++--
.../Target/AArch64/AArch64StackTagging.cpp | 2 +-
.../AArch64/AArch64TargetTransformInfo.h | 2 +-
.../AArch64/GISel/AArch64CallLowering.cpp | 6 ++--
.../GISel/AArch64PreLegalizerCombiner.cpp | 2 +-
llvm/lib/Target/AMDGPU/AMDGPUAliasAnalysis.h | 2 +-
llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp | 4 +--
.../Target/AMDGPU/AMDGPUAtomicOptimizer.cpp | 4 +--
llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp | 10 +++---
.../AMDGPU/AMDGPUHSAMetadataStreamer.cpp | 2 +-
llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 4 +--
.../AMDGPU/AMDGPULowerKernelArguments.cpp | 2 +-
.../AMDGPU/AMDGPULowerKernelAttributes.cpp | 2 +-
llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp | 2 +-
.../AMDGPU/AMDGPUTargetTransformInfo.cpp | 6 ++--
.../Target/AMDGPU/R600TargetTransformInfo.cpp | 2 +-
llvm/lib/Target/ARC/ARCTargetTransformInfo.h | 2 +-
llvm/lib/Target/ARM/ARMISelLowering.cpp | 12 +++----
llvm/lib/Target/ARM/ARMTargetTransformInfo.h | 2 +-
.../Target/ARM/MVEGatherScatterLowering.cpp | 2 +-
llvm/lib/Target/BPF/BPFTargetTransformInfo.h | 2 +-
llvm/lib/Target/BPF/BTFDebug.cpp | 2 +-
llvm/lib/Target/DirectX/DirectXAsmPrinter.cpp | 2 +-
.../DirectX/DirectXTargetTransformInfo.h | 2 +-
.../Target/Hexagon/HexagonISelLowering.cpp | 2 +-
.../Hexagon/HexagonTargetObjectFile.cpp | 4 +--
.../Hexagon/HexagonTargetTransformInfo.h | 2 +-
.../Target/Hexagon/HexagonVectorCombine.cpp | 2 +-
.../Target/Lanai/LanaiTargetObjectFile.cpp | 2 +-
.../Target/Lanai/LanaiTargetTransformInfo.h | 2 +-
.../LoongArch/LoongArchTargetTransformInfo.h | 2 +-
.../Target/M68k/GISel/M68kCallLowering.cpp | 6 ++--
llvm/lib/Target/Mips/MipsTargetMachine.cpp | 2 +-
llvm/lib/Target/Mips/MipsTargetObjectFile.cpp | 2 +-
.../lib/Target/Mips/MipsTargetTransformInfo.h | 2 +-
.../lib/Target/NVPTX/NVPTXLowerAggrCopies.cpp | 2 +-
llvm/lib/Target/NVPTX/NVPTXLowerArgs.cpp | 2 +-
.../Target/NVPTX/NVPTXTargetTransformInfo.h | 2 +-
llvm/lib/Target/NVPTX/NVVMReflect.cpp | 2 +-
.../Target/PowerPC/GISel/PPCCallLowering.cpp | 4 +--
llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp | 14 ++++----
llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 8 ++---
llvm/lib/Target/PowerPC/PPCInstrInfo.cpp | 2 +-
.../Target/PowerPC/PPCTargetTransformInfo.h | 2 +-
llvm/lib/Target/RISCV/RISCVCodeGenPrepare.cpp | 2 +-
.../RISCV/RISCVGatherScatterLowering.cpp | 2 +-
.../Target/RISCV/RISCVTargetObjectFile.cpp | 2 +-
.../Target/RISCV/RISCVTargetTransformInfo.h | 2 +-
llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp | 4 +--
.../Target/SPIRV/SPIRVTargetTransformInfo.h | 2 +-
.../Target/SystemZ/SystemZISelDAGToDAG.cpp | 2 +-
llvm/lib/Target/SystemZ/SystemZSubtarget.cpp | 2 +-
.../SystemZ/SystemZTargetTransformInfo.h | 2 +-
llvm/lib/Target/TargetLoweringObjectFile.cpp | 6 ++--
llvm/lib/Target/TargetMachine.cpp | 4 +--
llvm/lib/Target/VE/VETargetTransformInfo.h | 2 +-
.../WebAssembly/WebAssemblyAsmPrinter.cpp | 2 +-
.../WebAssemblyMachineFunctionInfo.cpp | 2 +-
.../WebAssemblyTargetTransformInfo.h | 2 +-
llvm/lib/Target/X86/GISel/X86CallLowering.cpp | 2 +-
llvm/lib/Target/X86/X86PartialReduction.cpp | 2 +-
llvm/lib/Target/X86/X86TargetTransformInfo.h | 2 +-
llvm/lib/Target/XCore/XCoreISelLowering.cpp | 2 +-
.../Target/XCore/XCoreTargetObjectFile.cpp | 2 +-
.../Target/XCore/XCoreTargetTransformInfo.h | 2 +-
.../AggressiveInstCombine.cpp | 4 +--
llvm/lib/Transforms/Coroutines/CoroElide.cpp | 2 +-
llvm/lib/Transforms/Coroutines/CoroFrame.cpp | 4 +--
llvm/lib/Transforms/Coroutines/CoroSplit.cpp | 2 +-
llvm/lib/Transforms/IPO/ArgumentPromotion.cpp | 6 ++--
.../Transforms/IPO/AttributorAttributes.cpp | 2 +-
llvm/lib/Transforms/IPO/ConstantMerge.cpp | 2 +-
llvm/lib/Transforms/IPO/FunctionAttrs.cpp | 4 +--
llvm/lib/Transforms/IPO/GlobalOpt.cpp | 10 +++---
llvm/lib/Transforms/IPO/GlobalSplit.cpp | 2 +-
llvm/lib/Transforms/IPO/PartialInlining.cpp | 4 +--
.../lib/Transforms/IPO/WholeProgramDevirt.cpp | 2 +-
.../InstCombine/InstructionCombining.cpp | 2 +-
.../Instrumentation/AddressSanitizer.cpp | 10 +++---
.../Instrumentation/BoundsChecking.cpp | 2 +-
.../Instrumentation/DataFlowSanitizer.cpp | 8 ++---
.../Instrumentation/MemProfiler.cpp | 2 +-
.../Instrumentation/MemorySanitizer.cpp | 34 +++++++++----------
.../Instrumentation/ThreadSanitizer.cpp | 2 +-
.../Transforms/Scalar/AnnotationRemarks.cpp | 2 +-
.../Transforms/Scalar/ConstantHoisting.cpp | 2 +-
.../Scalar/ConstraintElimination.cpp | 2 +-
.../Scalar/DeadStoreElimination.cpp | 2 +-
llvm/lib/Transforms/Scalar/EarlyCSE.cpp | 4 +--
llvm/lib/Transforms/Scalar/Float2Int.cpp | 2 +-
llvm/lib/Transforms/Scalar/GVN.cpp | 2 +-
llvm/lib/Transforms/Scalar/IndVarSimplify.cpp | 2 +-
.../Transforms/Scalar/InferAddressSpaces.cpp | 2 +-
llvm/lib/Transforms/Scalar/InferAlignment.cpp | 2 +-
.../Transforms/Scalar/InstSimplifyPass.cpp | 4 +--
.../Transforms/Scalar/JumpTableToSwitch.cpp | 2 +-
llvm/lib/Transforms/Scalar/LoopBoundSplit.cpp | 2 +-
llvm/lib/Transforms/Scalar/LoopFlatten.cpp | 2 +-
llvm/lib/Transforms/Scalar/LoopFuse.cpp | 2 +-
.../Scalar/LowerConstantIntrinsics.cpp | 2 +-
.../Scalar/LowerMatrixIntrinsics.cpp | 4 +--
.../lib/Transforms/Scalar/MemCpyOptimizer.cpp | 4 +--
.../lib/Transforms/Scalar/NaryReassociate.cpp | 2 +-
llvm/lib/Transforms/Scalar/NewGVN.cpp | 2 +-
.../Scalar/RewriteStatepointsForGC.cpp | 4 +--
llvm/lib/Transforms/Scalar/SCCP.cpp | 2 +-
llvm/lib/Transforms/Scalar/SROA.cpp | 2 +-
.../Scalar/ScalarizeMaskedMemIntrin.cpp | 2 +-
.../Scalar/SeparateConstOffsetFromGEP.cpp | 2 +-
.../Scalar/StraightLineStrengthReduce.cpp | 2 +-
llvm/lib/Transforms/Scalar/StructurizeCFG.cpp | 2 +-
.../Scalar/TailRecursionElimination.cpp | 6 ++--
.../Transforms/Utils/CallPromotionUtils.cpp | 2 +-
llvm/lib/Transforms/Utils/CloneFunction.cpp | 2 +-
.../lib/Transforms/Utils/DemoteRegToStack.cpp | 2 +-
.../Transforms/Utils/FunctionComparator.cpp | 4 +--
llvm/lib/Transforms/Utils/InlineFunction.cpp | 10 +++---
llvm/lib/Transforms/Utils/LoopConstrainer.cpp | 2 +-
.../Transforms/Utils/LowerMemIntrinsics.cpp | 8 ++---
llvm/lib/Transforms/Utils/LowerSwitch.cpp | 2 +-
.../Utils/PromoteMemoryToRegister.cpp | 2 +-
.../Vectorize/LoadStoreVectorizer.cpp | 2 +-
.../Transforms/Vectorize/LoopVectorize.cpp | 6 ++--
.../Transforms/Vectorize/SLPVectorizer.cpp | 2 +-
.../Transforms/Vectorize/VectorCombine.cpp | 2 +-
.../Utils/ScalarEvolutionExpanderTest.cpp | 2 +-
174 files changed, 293 insertions(+), 293 deletions(-)
diff --git a/llvm/include/llvm/Analysis/ScalarEvolution.h b/llvm/include/llvm/Analysis/ScalarEvolution.h
index 250848295cd36..88c085533eb86 100644
--- a/llvm/include/llvm/Analysis/ScalarEvolution.h
+++ b/llvm/include/llvm/Analysis/ScalarEvolution.h
@@ -1266,7 +1266,7 @@ class ScalarEvolution {
/// Return the DataLayout associated with the module this SCEV instance is
/// operating on.
const DataLayout &getDataLayout() const {
- return F.getParent()->getDataLayout();
+ return F.getDataLayout();
}
const SCEVPredicate *getEqualPredicate(const SCEV *LHS, const SCEV *RHS);
diff --git a/llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h b/llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
index a95ed3109feb8..588d1235d12b1 100644
--- a/llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
+++ b/llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
@@ -284,7 +284,7 @@ class MachineIRBuilder {
}
const DataLayout &getDataLayout() const {
- return getMF().getFunction().getParent()->getDataLayout();
+ return getMF().getFunction().getDataLayout();
}
LLVMContext &getContext() const {
diff --git a/llvm/lib/Analysis/AliasAnalysisEvaluator.cpp b/llvm/lib/Analysis/AliasAnalysisEvaluator.cpp
index f4b4d8888a547..59801642c9221 100644
--- a/llvm/lib/Analysis/AliasAnalysisEvaluator.cpp
+++ b/llvm/lib/Analysis/AliasAnalysisEvaluator.cpp
@@ -99,7 +99,7 @@ PreservedAnalyses AAEvaluator::run(Function &F, FunctionAnalysisManager &AM) {
}
void AAEvaluator::runInternal(Function &F, AAResults &AA) {
- const DataLayout &DL = F.getParent()->getDataLayout();
+ const DataLayout &DL = F.getDataLayout();
++FunctionCount;
diff --git a/llvm/lib/Analysis/BasicAliasAnalysis.cpp b/llvm/lib/Analysis/BasicAliasAnalysis.cpp
index c110943ad0d58..161a3034e4829 100644
--- a/llvm/lib/Analysis/BasicAliasAnalysis.cpp
+++ b/llvm/lib/Analysis/BasicAliasAnalysis.cpp
@@ -1919,7 +1919,7 @@ BasicAAResult BasicAA::run(Function &F, FunctionAnalysisManager &AM) {
auto &TLI = AM.getResult<TargetLibraryAnalysis>(F);
auto &AC = AM.getResult<AssumptionAnalysis>(F);
auto *DT = &AM.getResult<DominatorTreeAnalysis>(F);
- return BasicAAResult(F.getParent()->getDataLayout(), F, TLI, AC, DT);
+ return BasicAAResult(F.getDataLayout(), F, TLI, AC, DT);
}
BasicAAWrapperPass::BasicAAWrapperPass() : FunctionPass(ID) {
@@ -1947,7 +1947,7 @@ bool BasicAAWrapperPass::runOnFunction(Function &F) {
auto &TLIWP = getAnalysis<TargetLibraryInfoWrapperPass>();
auto &DTWP = getAnalysis<DominatorTreeWrapperPass>();
- Result.reset(new BasicAAResult(F.getParent()->getDataLayout(), F,
+ Result.reset(new BasicAAResult(F.getDataLayout(), F,
TLIWP.getTLI(F), ACT.getAssumptionCache(F),
&DTWP.getDomTree()));
diff --git a/llvm/lib/Analysis/ConstantFolding.cpp b/llvm/lib/Analysis/ConstantFolding.cpp
index 9a5c0f442de42..962880f68f076 100644
--- a/llvm/lib/Analysis/ConstantFolding.cpp
+++ b/llvm/lib/Analysis/ConstantFolding.cpp
@@ -644,7 +644,7 @@ Constant *llvm::ReadByteArrayFromGlobal(const GlobalVariable *GV,
if (!GV->isConstant() || !GV->hasDefinitiveInitializer())
return nullptr;
- const DataLayout &DL = GV->getParent()->getDataLayout();
+ const DataLayout &DL = GV->getDataLayout();
Constant *Init = const_cast<Constant *>(GV->getInitializer());
TypeSize InitSize = DL.getTypeAllocSize(Init->getType());
if (InitSize < Offset)
@@ -3485,15 +3485,15 @@ Constant *llvm::ConstantFoldCall(const CallBase *Call, Function *F,
StringRef Name = F->getName();
if (auto *FVTy = dyn_cast<FixedVectorType>(Ty))
return ConstantFoldFixedVectorCall(
- Name, IID, FVTy, Operands, F->getParent()->getDataLayout(), TLI, Call);
+ Name, IID, FVTy, Operands, F->getDataLayout(), TLI, Call);
if (auto *SVTy = dyn_cast<ScalableVectorType>(Ty))
return ConstantFoldScalableVectorCall(
- Name, IID, SVTy, Operands, F->getParent()->getDataLayout(), TLI, Call);
+ Name, IID, SVTy, Operands, F->getDataLayout(), TLI, Call);
if (auto *StTy = dyn_cast<StructType>(Ty))
return ConstantFoldStructCall(Name, IID, StTy, Operands,
- F->getParent()->getDataLayout(), TLI, Call);
+ F->getDataLayout(), TLI, Call);
// TODO: If this is a library function, we already discovered that above,
// so we should pass the LibFunc, not the name (and it might be better
diff --git a/llvm/lib/Analysis/DependenceAnalysis.cpp b/llvm/lib/Analysis/DependenceAnalysis.cpp
index e0e7dd18cd8d4..8e44d548cb56f 100644
--- a/llvm/lib/Analysis/DependenceAnalysis.cpp
+++ b/llvm/lib/Analysis/DependenceAnalysis.cpp
@@ -3607,7 +3607,7 @@ DependenceInfo::depends(Instruction *Src, Instruction *Dst,
Value *SrcPtr = getLoadStorePointerOperand(Src);
Value *DstPtr = getLoadStorePointerOperand(Dst);
- switch (underlyingObjectsAlias(AA, F->getParent()->getDataLayout(),
+ switch (underlyingObjectsAlias(AA, F->getDataLayout(),
MemoryLocation::get(Dst),
MemoryLocation::get(Src))) {
case AliasResult::MayAlias:
@@ -4034,7 +4034,7 @@ const SCEV *DependenceInfo::getSplitIteration(const Dependence &Dep,
Value *SrcPtr = getLoadStorePointerOperand(Src);
Value *DstPtr = getLoadStorePointerOperand(Dst);
assert(underlyingObjectsAlias(
- AA, F->getParent()->getDataLayout(), MemoryLocation::get(Dst),
+ AA, F->getDataLayout(), MemoryLocation::get(Dst),
MemoryLocation::get(Src)) == AliasResult::MustAlias);
// establish loop nesting levels
diff --git a/llvm/lib/Analysis/InlineCost.cpp b/llvm/lib/Analysis/InlineCost.cpp
index f5b17dca49735..94aa8ecf6f558 100644
--- a/llvm/lib/Analysis/InlineCost.cpp
+++ b/llvm/lib/Analysis/InlineCost.cpp
@@ -498,7 +498,7 @@ class CallAnalyzer : public InstVisitor<CallAnalyzer, bool> {
ProfileSummaryInfo *PSI = nullptr,
OptimizationRemarkEmitter *ORE = nullptr)
: TTI(TTI), GetAssumptionCache(GetAssumptionCache), GetBFI(GetBFI),
- PSI(PSI), F(Callee), DL(F.getParent()->getDataLayout()), ORE(ORE),
+ PSI(PSI), F(Callee), DL(F.getDataLayout()), ORE(ORE),
CandidateCall(Call) {}
InlineResult analyze();
@@ -2999,7 +2999,7 @@ std::optional<InlineResult> llvm::getAttributeBasedInliningDecision(
// alloca, the inlined code would need to be adjusted to handle that the
// argument is in the alloca address space (so it is a little bit complicated
// to solve).
- unsigned AllocaAS = Callee->getParent()->getDataLayout().getAllocaAddrSpace();
+ unsigned AllocaAS = Callee->getDataLayout().getAllocaAddrSpace();
for (unsigned I = 0, E = Call.arg_size(); I != E; ++I)
if (Call.isByValArgument(I)) {
PointerType *PTy = cast<PointerType>(Call.getArgOperand(I)->getType());
diff --git a/llvm/lib/Analysis/InstructionSimplify.cpp b/llvm/lib/Analysis/InstructionSimplify.cpp
index 2081f8b70ddb7..cdcc40c596b77 100644
--- a/llvm/lib/Analysis/InstructionSimplify.cpp
+++ b/llvm/lib/Analysis/InstructionSimplify.cpp
@@ -7248,7 +7248,7 @@ const SimplifyQuery getBestSimplifyQuery(Pass &P, Function &F) {
auto *TLI = TLIWP ? &TLIWP->getTLI(F) : nullptr;
auto *ACWP = P.getAnalysisIfAvailable<AssumptionCacheTracker>();
auto *AC = ACWP ? &ACWP->getAssumptionCache(F) : nullptr;
- return {F.getParent()->getDataLayout(), TLI, DT, AC};
+ return {F.getDataLayout(), TLI, DT, AC};
}
const SimplifyQuery getBestSimplifyQuery(LoopStandardAnalysisResults &AR,
@@ -7262,7 +7262,7 @@ const SimplifyQuery getBestSimplifyQuery(AnalysisManager<T, TArgs...> &AM,
auto *DT = AM.template getCachedResult<DominatorTreeAnalysis>(F);
auto *TLI = AM.template getCachedResult<TargetLibraryAnalysis>(F);
auto *AC = AM.template getCachedResult<AssumptionAnalysis>(F);
- return {F.getParent()->getDataLayout(), TLI, DT, AC};
+ return {F.getDataLayout(), TLI, DT, AC};
}
template const SimplifyQuery getBestSimplifyQuery(AnalysisManager<Function> &,
Function &);
diff --git a/llvm/lib/Analysis/LazyValueInfo.cpp b/llvm/lib/Analysis/LazyValueInfo.cpp
index 3597f8f08e770..ef4d14dbe6045 100644
--- a/llvm/lib/Analysis/LazyValueInfo.cpp
+++ b/llvm/lib/Analysis/LazyValueInfo.cpp
@@ -1689,7 +1689,7 @@ LazyValueInfo LazyValueAnalysis::run(Function &F,
FunctionAnalysisManager &FAM) {
auto &AC = FAM.getResult<AssumptionAnalysis>(F);
- return LazyValueInfo(&AC, &F.getParent()->getDataLayout());
+ return LazyValueInfo(&AC, &F.getDataLayout());
}
/// Returns true if we can statically tell that this value will never be a
diff --git a/llvm/lib/Analysis/Lint.cpp b/llvm/lib/Analysis/Lint.cpp
index df1b22d48ca7a..496308a0c247a 100644
--- a/llvm/lib/Analysis/Lint.cpp
+++ b/llvm/lib/Analysis/Lint.cpp
@@ -709,7 +709,7 @@ Value *Lint::findValueImpl(Value *V, bool OffsetOk,
PreservedAnalyses LintPass::run(Function &F, FunctionAnalysisManager &AM) {
auto *Mod = F.getParent();
- auto *DL = &F.getParent()->getDataLayout();
+ auto *DL = &F.getDataLayout();
auto *AA = &AM.getResult<AAManager>(F);
auto *AC = &AM.getResult<AssumptionAnalysis>(F);
auto *DT = &AM.getResult<DominatorTreeAnalysis>(F);
diff --git a/llvm/lib/Analysis/MemDerefPrinter.cpp b/llvm/lib/Analysis/MemDerefPrinter.cpp
index 2632bc50d6e69..e858d94143544 100644
--- a/llvm/lib/Analysis/MemDerefPrinter.cpp
+++ b/llvm/lib/Analysis/MemDerefPrinter.cpp
@@ -26,7 +26,7 @@ PreservedAnalyses MemDerefPrinterPass::run(Function &F,
SmallVector<Value *, 4> Deref;
SmallPtrSet<Value *, 4> DerefAndAligned;
- const DataLayout &DL = F.getParent()->getDataLayout();
+ const DataLayout &DL = F.getDataLayout();
for (auto &I : instructions(F)) {
if (LoadInst *LI = dyn_cast<LoadInst>(&I)) {
Value *PO = LI->getPointerOperand();
diff --git a/llvm/lib/Analysis/ObjCARCAliasAnalysis.cpp b/llvm/lib/Analysis/ObjCARCAliasAnalysis.cpp
index ca87bc3c78bed..458ccc108a083 100644
--- a/llvm/lib/Analysis/ObjCARCAliasAnalysis.cpp
+++ b/llvm/lib/Analysis/ObjCARCAliasAnalysis.cpp
@@ -142,5 +142,5 @@ ModRefInfo ObjCARCAAResult::getModRefInfo(const CallBase *Call,
AnalysisKey ObjCARCAA::Key;
ObjCARCAAResult ObjCARCAA::run(Function &F, FunctionAnalysisManager &AM) {
- return ObjCARCAAResult(F.getParent()->getDataLayout());
+ return ObjCARCAAResult(F.getDataLayout());
}
diff --git a/llvm/lib/Analysis/StackLifetime.cpp b/llvm/lib/Analysis/StackLifetime.cpp
index 3e1b5dea6f6c2..21f54c7cbc849 100644
--- a/llvm/lib/Analysis/StackLifetime.cpp
+++ b/llvm/lib/Analysis/StackLifetime.cpp
@@ -87,7 +87,7 @@ void StackLifetime::collectMarkers() {
DenseMap<const BasicBlock *, SmallDenseMap<const IntrinsicInst *, Marker>>
BBMarkerSet;
- const DataLayout &DL = F.getParent()->getDataLayout();
+ const DataLayout &DL = F.getDataLayout();
// Compute the set of start/end markers per basic block.
for (const BasicBlock *BB : depth_first(&F)) {
diff --git a/llvm/lib/Analysis/StackSafetyAnalysis.cpp b/llvm/lib/Analysis/StackSafetyAnalysis.cpp
index c700d80e0d453..27360d0e84cb2 100644
--- a/llvm/lib/Analysis/StackSafetyAnalysis.cpp
+++ b/llvm/lib/Analysis/StackSafetyAnalysis.cpp
@@ -268,7 +268,7 @@ class StackSafetyLocalAnalysis {
public:
StackSafetyLocalAnalysis(Function &F, ScalarEvolution &SE)
- : F(F), DL(F.getParent()->getDataLayout()), SE(SE),
+ : F(F), DL(F.getDataLayout()), SE(SE),
PointerSize(DL.getPointerSizeInBits()),
UnknownRange(PointerSize, true) {}
@@ -852,7 +852,7 @@ GVToSSI createGlobalStackSafetyInfo(
}
uint32_t PointerSize =
- Copy.begin()->first->getParent()->getDataLayout().getPointerSizeInBits();
+ Copy.begin()->first->getDataLayout().getPointerSizeInBits();
StackSafetyDataFlowAnalysis<GlobalValue> SSDFA(PointerSize, std::move(Copy));
for (const auto &F : SSDFA.run()) {
diff --git a/llvm/lib/Analysis/TargetTransformInfo.cpp b/llvm/lib/Analysis/TargetTransformInfo.cpp
index 5e30d907d18bb..c175d1737e54b 100644
--- a/llvm/lib/Analysis/TargetTransformInfo.cpp
+++ b/llvm/lib/Analysis/TargetTransformInfo.cpp
@@ -1354,7 +1354,7 @@ TargetIRAnalysis::Result TargetIRAnalysis::run(const Function &F,
AnalysisKey TargetIRAnalysis::Key;
TargetIRAnalysis::Result TargetIRAnalysis::getDefaultTTI(const Function &F) {
- return Result(F.getParent()->getDataLayout());
+ return Result(F.getDataLayout());
}
// Register the basic pass.
diff --git a/llvm/lib/Analysis/ValueTracking.cpp b/llvm/lib/Analysis/ValueTracking.cpp
index d0d9caaec5e36..32ebb320d8edb 100644
--- a/llvm/lib/Analysis/ValueTracking.cpp
+++ b/llvm/lib/Analysis/ValueTracking.cpp
@@ -6111,7 +6111,7 @@ bool llvm::getConstantDataArrayInfo(const Value *V,
// Fail if V is not based on constant global object.
return false;
- const DataLayout &DL = GV->getParent()->getDataLayout();
+ const DataLayout &DL = GV->getDataLayout();
APInt Off(DL.getIndexTypeSizeInBits(V->getType()), 0);
if (GV != V->stripAndAccumulateConstantOffsets(DL, Off,
diff --git a/llvm/lib/AsmParser/LLParser.cpp b/llvm/lib/AsmParser/LLParser.cpp
index 21d386097fc63..059d42d9faa7f 100644
--- a/llvm/lib/AsmParser/LLParser.cpp
+++ b/llvm/lib/AsmParser/LLParser.cpp
@@ -8282,7 +8282,7 @@ int LLParser::parseCmpXchg(Instruction *&Inst, PerFunctionState &PFS) {
return error(NewLoc, "cmpxchg operand must be a first class value");
const Align DefaultAlignment(
- PFS.getFunction().getParent()->getDataLayout().getTypeStoreSize(
+ PFS.getFunction().getDataLayout().getTypeStoreSize(
Cmp->getType()));
AtomicCmpXchgInst *CXI =
@@ -8388,13 +8388,13 @@ int LLParser::parseAtomicRMW(Instruction *&Inst, PerFunctionState &PFS) {
}
unsigned Size =
- PFS.getFunction().getParent()->getDataLayout().getTypeStoreSizeInBits(
+ PFS.getFunction().getDataLayout().getTypeStoreSizeInBits(
Val->getType());
if (Size < 8 || (Size & (Size - 1)))
return error(ValLoc, "atomicrmw operand must be power-of-two byte-sized"
" integer");
const Align DefaultAlignment(
- PFS.getFunction().getParent()->getDataLayout().getTypeStoreSize(
+ PFS.getFunction().getDataLayout().getTypeStoreSize(
Val->getType()));
AtomicRMWInst *RMWI =
new AtomicRMWInst(Operation, Ptr, Val,
diff --git a/llvm/lib/CodeGen/Analysis.cpp b/llvm/lib/CodeGen/Analysis.cpp
index e693cdbd0ccc1..7fc18639e5852 100644
--- a/llvm/lib/CodeGen/Analysis.cpp
+++ b/llvm/lib/CodeGen/Analysis.cpp
@@ -730,7 +730,7 @@ bool llvm::returnTypeIsEligibleForTailCall(const Function *F,
// index is compatible with the value we return.
if (!slotOnlyDiscardsData(RetVal, CallVal, TmpRetPath, TmpCallPath,
AllowDifferingSizes, TLI,
- F->getParent()->getDataLayout()))
+ F->getDataLayout()))
return false;
CallEmpty = !nextRealType(CallSubTypes, CallPath);
diff --git a/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp b/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
index 40f4dc2689cdf..609516f4bde95 100644
--- a/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
+++ b/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
@@ -783,7 +783,7 @@ void AsmPrinter::emitGlobalVariable(const GlobalVariable *GV) {
SectionKind GVKind = TargetLoweringObjectFile::getKindForGlobal(GV, TM);
- const DataLayout &DL = GV->getParent()->getDataLayout();
+ const DataLayout &DL = GV->getDataLayout();
uint64_t Size = DL.getTypeAllocSize(GV->getValueType());
// If the alignment is specified, we *must* obey it. Overaligning a global
@@ -871,7 +871,7 @@ void AsmPrinter::emitGlobalVariable(const GlobalVariable *GV) {
emitAlignment(Alignment, GV);
OutStreamer->emitLabel(MangSym);
- emitGlobalConstant(GV->getParent()->getDataLayout(),
+ emitGlobalConstant(GV->getDataLayout(),
GV->getInitializer());
}
@@ -911,7 +911,7 @@ void AsmPrinter::emitGlobalVariable(const GlobalVariable *GV) {
if (LocalAlias != EmittedInitSym)
OutStreamer->emitLabel(LocalAlias);
- emitGlobalConstant(GV->getParent()->getDataLayout(), GV->getInitializer());
+ emitGlobalConstant(GV->getDataLayout(), GV->getInitializer());
if (MAI->hasDotTypeDotSizeDirective())
// .size foo, 42
@@ -935,7 +935,7 @@ void AsmPrinter::emitFunctionPrefix(ArrayRef<const Constant *> Prefix) {
const Function &F = MF->getFunction();
if (!MAI->hasSubsectionsViaSymbols()) {
for (auto &C : Prefix)
- emitGlobalConstant(F.getParent()->getDataLayout(), C);
+ emitGlobalConstant(F.getDataLayout(), C);
return;
}
// Preserving prefix-like data on platforms which use subsections-via-symbols
@@ -945,7 +945,7 @@ void AsmPrinter::emitFunctionPrefix(ArrayRef<const Constant *> Prefix) {
OutStreamer->emitLabel(OutContext.createLinkerPrivateTempSymbol());
for (auto &C : Prefix) {
- emitGlobalConstant(F.getParent()->getDataLayout(), C);
+ emitGlobalConstant(F.getDataLayout(), C);
}
// Emit an .alt_entry directive for the actual function symbol.
@@ -1080,7 +1080,7 @@ void AsmPrinter::emitFunctionHeader() {
// Emit the prologue data.
if (F.hasPrologueData())
- emitGlobalConstant(F.getParent()->getDataLayout(), F.getPrologueData());
+ emitGlobalConstant(F.getDataLayout(), F.getPrologueData());
}
/// EmitFunctionEntryLabel - Emit the label that is the entrypoint for the
@@ -1527,7 +1527,7 @@ void AsmPrinter::emitKCFITrapEntry(const MachineFunction &MF,
void AsmPrinter::emitKCFITypeId(const MachineFunction &MF) {
const Function &F = MF.getFunction();
if (const MDNode *MD = F.getMetadata(LLVMContext::MD_kcfi_type))
- emitGlobalConstant(F.getParent()->getDataLayout(),
+ emitGlobalConstant(F.getDataLayout(),
mdconst::extract<ConstantInt>(MD->getOperand(0)));
}
@@ -1677,7 +1677,7 @@ void AsmPrinter::emitPCSections(const MachineFunction &MF) {
for (const MDOperand &AuxMDO : AuxMDs->operands()) {
assert(isa<ConstantAsMetadata>(AuxMDO) && "expecting a constant");
const Constant *C = cast<ConstantAsMetadata>(AuxMDO)->getValue();
- const DataLayout &DL = F.getParent()->getDataLayout();
+ const DataLayout &DL = F.getDataLayout();
const uint64_t Size = DL.getTypeStoreSize(C->getType());
if (auto *CI = dyn_cast<ConstantInt>(C);
@@ -2925,14 +2925,14 @@ bool AsmPrinter::emitSpecialLLVMGlobal(const GlobalVariable *GV) {
assert(GV->hasInitializer() && "Not a special LLVM global!");
if (GV->getName() == "llvm.global_ctors") {
- emitXXStructorList(GV->getParent()->getDataLayout(), GV->getInitializer(),
+ emitXXStructorList(GV->getDataLayout(), GV->getInitializer(),
/* isCtor */ true);
return true;
}
if (GV->getName() == "llvm.global_dtors") {
- emitXXStructorList(GV->getParent()->getDataLayout(), GV->getInitializer(),
+ emitXXStructorList(GV->getDataLayout(), GV->getInitializer(),
/* isCtor */ false);
return true;
@@ -3146,7 +3146,7 @@ void AsmPrinter::emitLabelPlusOffset(const MCSymbol *Label, uint64_t Offset,
void AsmPrinter::emitAlignment(Align Alignment, const GlobalObject *GV,
unsigned MaxBytesToEmit) const {
if (GV)
- Alignment = getGVAlignment(GV, GV->getParent()->getDataLayout(), Alignment);
+ Alignment = getGVAlignment(GV, GV->getDataLayout(), Alignment);
if (Alignment == Align(1))
return; // 1-byte aligned: no need to emit alignment.
diff --git a/llvm/lib/CodeGen/AssignmentTrackingAnalysis.cpp b/llvm/lib/CodeGen/AssignmentTrackingAnalysis.cpp
index 535be6cab139c..0eef93f1128a6 100644
--- a/llvm/lib/CodeGen/AssignmentTrackingAnalysis.cpp
+++ b/llvm/lib/CodeGen/AssignmentTrackingAnalysis.cpp
@@ -2184,7 +2184,7 @@ static AssignmentTrackingLowering::OverlapMap buildOverlapMapAndRecordDeclares(
if (auto *DII = dyn_cast<DbgVariableIntrinsic>(&I)) {
ProcessDbgRecord(DII, InstDeclares);
} else if (auto Info = getUntaggedStoreAssignmentInfo(
- I, Fn.getParent()->getDataLayout())) {
+ I, Fn.getDataLayout())) {
// Find markers linked to this alloca.
auto HandleDbgAssignForStore = [&](auto *Assign) {
std::optional<DIExpression::FragmentInfo> FragInfo;
@@ -2800,7 +2800,7 @@ DebugAssignmentTrackingAnalysis::run(Function &F,
if (!isAssignmentTrackingEnabled(*F.getParent()))
return FunctionVarLocs();
- auto &DL = F.getParent()->getDataLayout();
+ auto &DL = F.getDataLayout();
FunctionVarLocsBuilder Builder;
analyzeFunction(F, DL, &Builder);
diff --git a/llvm/lib/CodeGen/AtomicExpandPass.cpp b/llvm/lib/CodeGen/AtomicExpandPass.cpp
index f7f9b1cda2ca2..cea09bcb45386 100644
--- a/llvm/lib/CodeGen/AtomicExpandPass.cpp
+++ b/llvm/lib/CodeGen/AtomicExpandPass.cpp
@@ -208,7 +208,7 @@ bool AtomicExpandImpl::run(Function &F, const TargetMachine *TM) {
if (!Subtarget->enableAtomicExpand())
return false;
TLI = Subtarget->getTargetLowering();
- DL = &F.getParent()->getDataLayout();
+ DL = &F.getDataLayout();
SmallVector<Instruction *, 1> AtomicInsts;
@@ -1205,7 +1205,7 @@ Value *AtomicExpandImpl::insertRMWLLSCLoop(
Function *F = BB->getParent();
assert(AddrAlign >=
- F->getParent()->getDataLayout().getTypeStoreSize(ResultTy) &&
+ F->getDataLayout().getTypeStoreSize(ResultTy) &&
"Expected at least natural alignment at this point.");
// Given: atomicrmw some_op iN* %addr, iN %incr ordering
diff --git a/llvm/lib/CodeGen/BasicTargetTransformInfo.cpp b/llvm/lib/CodeGen/BasicTargetTransformInfo.cpp
index 57cefae2066a9..80a4eb86cf9ef 100644
--- a/llvm/lib/CodeGen/BasicTargetTransformInfo.cpp
+++ b/llvm/lib/CodeGen/BasicTargetTransformInfo.cpp
@@ -30,5 +30,5 @@ llvm::PartialUnrollingThreshold("partial-unrolling-threshold", cl::init(0),
cl::Hidden);
BasicTTIImpl::BasicTTIImpl(const TargetMachine *TM, const Function &F)
- : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)),
+ : BaseT(TM, F.getDataLayout()), ST(TM->getSubtargetImpl(F)),
TLI(ST->getTargetLowering()) {}
diff --git a/llvm/lib/CodeGen/CodeGenPrepare.cpp b/llvm/lib/CodeGen/CodeGenPrepare.cpp
index 02cbf011a00a7..5a7d8a5c1f9eb 100644
--- a/llvm/lib/CodeGen/CodeGenPrepare.cpp
+++ b/llvm/lib/CodeGen/CodeGenPrepare.cpp
@@ -509,7 +509,7 @@ bool CodeGenPrepareLegacyPass::runOnFunction(Function &F) {
return false;
auto TM = &getAnalysis<TargetPassConfig>().getTM<TargetMachine>();
CodeGenPrepare CGP(TM);
- CGP.DL = &F.getParent()->getDataLayout();
+ CGP.DL = &F.getDataLayout();
CGP.SubtargetInfo = TM->getSubtargetImpl(F);
CGP.TLI = CGP.SubtargetInfo->getTargetLowering();
CGP.TRI = CGP.SubtargetInfo->getRegisterInfo();
@@ -557,7 +557,7 @@ PreservedAnalyses CodeGenPreparePass::run(Function &F,
}
bool CodeGenPrepare::run(Function &F, FunctionAnalysisManager &AM) {
- DL = &F.getParent()->getDataLayout();
+ DL = &F.getDataLayout();
SubtargetInfo = TM->getSubtargetImpl(F);
TLI = SubtargetInfo->getTargetLowering();
TRI = SubtargetInfo->getRegisterInfo();
@@ -5185,7 +5185,7 @@ static bool IsOperandAMemoryOperand(CallInst *CI, InlineAsm *IA, Value *OpVal,
const TargetRegisterInfo &TRI) {
const Function *F = CI->getFunction();
TargetLowering::AsmOperandInfoVector TargetConstraints =
- TLI.ParseConstraints(F->getParent()->getDataLayout(), &TRI, *CI);
+ TLI.ParseConstraints(F->getDataLayout(), &TRI, *CI);
for (TargetLowering::AsmOperandInfo &OpInfo : TargetConstraints) {
// Compute the constraint code and ConstraintType to use.
diff --git a/llvm/lib/CodeGen/ExpandMemCmp.cpp b/llvm/lib/CodeGen/ExpandMemCmp.cpp
index bb84813569f4d..2758f7be4d505 100644
--- a/llvm/lib/CodeGen/ExpandMemCmp.cpp
+++ b/llvm/lib/CodeGen/ExpandMemCmp.cpp
@@ -970,7 +970,7 @@ PreservedAnalyses runImpl(Function &F, const TargetLibraryInfo *TLI,
if (DT)
DTU.emplace(DT, DomTreeUpdater::UpdateStrategy::Lazy);
- const DataLayout& DL = F.getParent()->getDataLayout();
+ const DataLayout& DL = F.getDataLayout();
bool MadeChanges = false;
for (auto BBIt = F.begin(); BBIt != F.end();) {
if (runOnBlock(*BBIt, TLI, TTI, TL, DL, PSI, BFI, DTU ? &*DTU : nullptr)) {
diff --git a/llvm/lib/CodeGen/ExpandVectorPredication.cpp b/llvm/lib/CodeGen/ExpandVectorPredication.cpp
index dc35f33a3a059..97c6ee4773f22 100644
--- a/llvm/lib/CodeGen/ExpandVectorPredication.cpp
+++ b/llvm/lib/CodeGen/ExpandVectorPredication.cpp
@@ -571,7 +571,7 @@ CachingVPExpander::expandPredicationInMemoryIntrinsic(IRBuilder<> &Builder,
VPIntrinsic &VPI) {
assert(VPI.canIgnoreVectorLengthParam());
- const auto &DL = F.getParent()->getDataLayout();
+ const auto &DL = F.getDataLayout();
Value *MaskParam = VPI.getMaskParam();
Value *PtrParam = VPI.getMemoryPointerParam();
diff --git a/llvm/lib/CodeGen/GlobalISel/CallLowering.cpp b/llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
index 5efb3be0e53ae..1416ea390f81c 100644
--- a/llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
@@ -733,7 +733,7 @@ bool CallLowering::handleAssignments(ValueHandler &Handler,
MachineFunction &MF = MIRBuilder.getMF();
MachineRegisterInfo &MRI = MF.getRegInfo();
const Function &F = MF.getFunction();
- const DataLayout &DL = F.getParent()->getDataLayout();
+ const DataLayout &DL = F.getDataLayout();
const unsigned NumArgs = Args.size();
diff --git a/llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp b/llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
index 2988fa45b2e33..4d22b4c2ed2a8 100644
--- a/llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
@@ -32,7 +32,7 @@ INITIALIZE_PASS(GISelKnownBitsAnalysis, DEBUG_TYPE,
GISelKnownBits::GISelKnownBits(MachineFunction &MF, unsigned MaxDepth)
: MF(MF), MRI(MF.getRegInfo()), TL(*MF.getSubtarget().getTargetLowering()),
- DL(MF.getFunction().getParent()->getDataLayout()), MaxDepth(MaxDepth) {}
+ DL(MF.getFunction().getDataLayout()), MaxDepth(MaxDepth) {}
Align GISelKnownBits::computeKnownAlignment(Register R, unsigned Depth) {
const MachineInstr *MI = MRI.getVRegDef(R);
diff --git a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
index ddf6d3c20f022..e65296e7f9a80 100644
--- a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
@@ -3837,7 +3837,7 @@ bool IRTranslator::runOnMachineFunction(MachineFunction &CurMF) {
CurBuilder->setMF(*MF);
EntryBuilder->setMF(*MF);
MRI = &MF->getRegInfo();
- DL = &F.getParent()->getDataLayout();
+ DL = &F.getDataLayout();
ORE = std::make_unique<OptimizationRemarkEmitter>(&F);
const TargetMachine &TM = MF->getTarget();
TM.resetTargetOptions(F);
diff --git a/llvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp b/llvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp
index 5acf35b37882e..81f25b21a0409 100644
--- a/llvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp
@@ -223,7 +223,7 @@ bool InlineAsmLowering::lowerInlineAsm(
MachineFunction &MF = MIRBuilder.getMF();
const Function &F = MF.getFunction();
- const DataLayout &DL = F.getParent()->getDataLayout();
+ const DataLayout &DL = F.getDataLayout();
const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
MachineRegisterInfo *MRI = MIRBuilder.getMRI();
diff --git a/llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp b/llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp
index 526ea0868af56..0d0c093648eba 100644
--- a/llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp
@@ -318,7 +318,7 @@ bool LoadStoreOpt::mergeStores(SmallVectorImpl<GStore *> &StoresToMerge) {
assert(MRI->getType(StoreMI->getValueReg()) == OrigTy);
#endif
- const auto &DL = MF->getFunction().getParent()->getDataLayout();
+ const auto &DL = MF->getFunction().getDataLayout();
bool AnyMerged = false;
do {
unsigned NumPow2 = llvm::bit_floor(StoresToMerge.size());
@@ -955,7 +955,7 @@ void LoadStoreOpt::initializeStoreMergeTargetInfo(unsigned AddrSpace) {
// Need to reserve at least MaxStoreSizeToForm + 1 bits.
BitVector LegalSizes(MaxStoreSizeToForm * 2);
const auto &LI = *MF->getSubtarget().getLegalizerInfo();
- const auto &DL = MF->getFunction().getParent()->getDataLayout();
+ const auto &DL = MF->getFunction().getDataLayout();
Type *IRPtrTy = PointerType::get(MF->getFunction().getContext(), AddrSpace);
LLT PtrTy = getLLTForType(*IRPtrTy, DL);
// We assume that we're not going to be generating any stores wider than
diff --git a/llvm/lib/CodeGen/HardwareLoops.cpp b/llvm/lib/CodeGen/HardwareLoops.cpp
index cc5aad14e1b56..519b203757371 100644
--- a/llvm/lib/CodeGen/HardwareLoops.cpp
+++ b/llvm/lib/CodeGen/HardwareLoops.cpp
@@ -240,7 +240,7 @@ bool HardwareLoopsLegacy::runOnFunction(Function &F) {
auto &SE = getAnalysis<ScalarEvolutionWrapperPass>().getSE();
auto &DT = getAnalysis<DominatorTreeWrapperPass>().getDomTree();
auto &TTI = getAnalysis<TargetTransformInfoWrapperPass>().getTTI(F);
- auto &DL = F.getParent()->getDataLayout();
+ auto &DL = F.getDataLayout();
auto *ORE = &getAnalysis<OptimizationRemarkEmitterWrapperPass>().getORE();
auto *TLIP = getAnalysisIfAvailable<TargetLibraryInfoWrapperPass>();
auto *TLI = TLIP ? &TLIP->getTLI(F) : nullptr;
@@ -275,7 +275,7 @@ PreservedAnalyses HardwareLoopsPass::run(Function &F,
auto *TLI = &AM.getResult<TargetLibraryAnalysis>(F);
auto &AC = AM.getResult<AssumptionAnalysis>(F);
auto *ORE = &AM.getResult<OptimizationRemarkEmitterAnalysis>(F);
- auto &DL = F.getParent()->getDataLayout();
+ auto &DL = F.getDataLayout();
HardwareLoopsImpl Impl(SE, LI, true, DT, DL, TTI, TLI, AC, ORE, Opts);
bool Changed = Impl.run(F);
diff --git a/llvm/lib/CodeGen/IndirectBrExpandPass.cpp b/llvm/lib/CodeGen/IndirectBrExpandPass.cpp
index 13f595bef8eeb..05a7387b1232c 100644
--- a/llvm/lib/CodeGen/IndirectBrExpandPass.cpp
+++ b/llvm/lib/CodeGen/IndirectBrExpandPass.cpp
@@ -100,7 +100,7 @@ FunctionPass *llvm::createIndirectBrExpandPass() {
}
bool runImpl(Function &F, const TargetLowering *TLI, DomTreeUpdater *DTU) {
- auto &DL = F.getParent()->getDataLayout();
+ auto &DL = F.getDataLayout();
SmallVector<IndirectBrInst *, 1> IndirectBrs;
diff --git a/llvm/lib/CodeGen/InterleavedLoadCombinePass.cpp b/llvm/lib/CodeGen/InterleavedLoadCombinePass.cpp
index fc4be84bca109..10208bb91799d 100644
--- a/llvm/lib/CodeGen/InterleavedLoadCombinePass.cpp
+++ b/llvm/lib/CodeGen/InterleavedLoadCombinePass.cpp
@@ -1256,7 +1256,7 @@ bool InterleavedLoadCombineImpl::run() {
bool changed = false;
unsigned MaxFactor = TLI.getMaxSupportedInterleaveFactor();
- auto &DL = F.getParent()->getDataLayout();
+ auto &DL = F.getDataLayout();
// Start with the highest factor to avoid combining and recombining.
for (unsigned Factor = MaxFactor; Factor >= 2; Factor--) {
diff --git a/llvm/lib/CodeGen/MachineFunction.cpp b/llvm/lib/CodeGen/MachineFunction.cpp
index 4182e75354125..7f6a75208d253 100644
--- a/llvm/lib/CodeGen/MachineFunction.cpp
+++ b/llvm/lib/CodeGen/MachineFunction.cpp
@@ -307,7 +307,7 @@ void MachineFunction::clear() {
}
const DataLayout &MachineFunction::getDataLayout() const {
- return F.getParent()->getDataLayout();
+ return F.getDataLayout();
}
/// Get the JumpTableInfo for this function.
diff --git a/llvm/lib/CodeGen/SafeStack.cpp b/llvm/lib/CodeGen/SafeStack.cpp
index 0a26247a4d165..e41d1bfb0e530 100644
--- a/llvm/lib/CodeGen/SafeStack.cpp
+++ b/llvm/lib/CodeGen/SafeStack.cpp
@@ -886,7 +886,7 @@ class SafeStackLegacyPass : public FunctionPass {
if (!TL)
report_fatal_error("TargetLowering instance is required");
- auto *DL = &F.getParent()->getDataLayout();
+ auto *DL = &F.getDataLayout();
auto &TLI = getAnalysis<TargetLibraryInfoWrapperPass>().getTLI(F);
auto &ACT = getAnalysis<AssumptionCacheTracker>().getAssumptionCache(F);
@@ -946,7 +946,7 @@ PreservedAnalyses SafeStackPass::run(Function &F,
if (!TL)
report_fatal_error("TargetLowering instance is required");
- auto &DL = F.getParent()->getDataLayout();
+ auto &DL = F.getDataLayout();
// preserve DominatorTree
auto &DT = FAM.getResult<DominatorTreeAnalysis>(F);
diff --git a/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp b/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
index de22d230b1c32..8f5b05b662b33 100644
--- a/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
@@ -186,7 +186,7 @@ void FunctionLoweringInfo::set(const Function &fn, MachineFunction &mf,
Register SP = TLI->getStackPointerRegisterToSaveRestore();
const TargetRegisterInfo *TRI = MF->getSubtarget().getRegisterInfo();
std::vector<TargetLowering::AsmOperandInfo> Ops =
- TLI->ParseConstraints(Fn->getParent()->getDataLayout(), TRI,
+ TLI->ParseConstraints(Fn->getDataLayout(), TRI,
*Call);
for (TargetLowering::AsmOperandInfo &Op : Ops) {
if (Op.Type == InlineAsm::isClobber) {
@@ -570,7 +570,7 @@ FunctionLoweringInfo::getValueFromVirtualReg(Register Vreg) {
SmallVector<EVT, 4> ValueVTs;
for (auto &P : ValueMap) {
ValueVTs.clear();
- ComputeValueVTs(*TLI, Fn->getParent()->getDataLayout(),
+ ComputeValueVTs(*TLI, Fn->getDataLayout(),
P.first->getType(), ValueVTs);
unsigned Reg = P.second;
for (EVT VT : ValueVTs) {
diff --git a/llvm/lib/CodeGen/SjLjEHPrepare.cpp b/llvm/lib/CodeGen/SjLjEHPrepare.cpp
index 20c827ce08d84..054f7d7215962 100644
--- a/llvm/lib/CodeGen/SjLjEHPrepare.cpp
+++ b/llvm/lib/CodeGen/SjLjEHPrepare.cpp
@@ -199,7 +199,7 @@ SjLjEHPrepareImpl::setupFunctionContext(Function &F,
// Create an alloca for the incoming jump buffer ptr and the new jump buffer
// that needs to be restored on all exits from the function. This is an alloca
// because the value needs to be added to the global context list.
- auto &DL = F.getParent()->getDataLayout();
+ auto &DL = F.getDataLayout();
const Align Alignment = DL.getPrefTypeAlign(FunctionContextTy);
FuncCtx = new AllocaInst(FunctionContextTy, DL.getAllocaAddrSpace(), nullptr,
Alignment, "fn_context", EntryBB->begin());
diff --git a/llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp b/llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
index 957b2831d308d..1eec346fe1591 100644
--- a/llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
+++ b/llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
@@ -641,7 +641,7 @@ getELFSectionNameForGlobal(const GlobalObject *GO, SectionKind Kind,
// We also need alignment here.
// FIXME: this is getting the alignment of the character, not the
// alignment of the global!
- Align Alignment = GO->getParent()->getDataLayout().getPreferredAlign(
+ Align Alignment = GO->getDataLayout().getPreferredAlign(
cast<GlobalVariable>(GO));
Name += ".str";
@@ -1359,7 +1359,7 @@ MCSection *TargetLoweringObjectFileMachO::SelectSectionForGlobal(
// FIXME: Alignment check should be handled by section classifier.
if (Kind.isMergeable1ByteCString() &&
- GO->getParent()->getDataLayout().getPreferredAlign(
+ GO->getDataLayout().getPreferredAlign(
cast<GlobalVariable>(GO)) < Align(32))
return CStringSection;
@@ -1367,7 +1367,7 @@ MCSection *TargetLoweringObjectFileMachO::SelectSectionForGlobal(
// externally visible label, this runs into issues with certain linker
// versions.
if (Kind.isMergeable2ByteCString() && !GO->hasExternalLinkage() &&
- GO->getParent()->getDataLayout().getPreferredAlign(
+ GO->getDataLayout().getPreferredAlign(
cast<GlobalVariable>(GO)) < Align(32))
return UStringSection;
diff --git a/llvm/lib/CodeGen/TypePromotion.cpp b/llvm/lib/CodeGen/TypePromotion.cpp
index 89aea3a291611..ecc043d8f0bc4 100644
--- a/llvm/lib/CodeGen/TypePromotion.cpp
+++ b/llvm/lib/CodeGen/TypePromotion.cpp
@@ -924,7 +924,7 @@ bool TypePromotionImpl::run(Function &F, const TargetMachine *TM,
SafeToPromote.clear();
SafeWrap.clear();
bool MadeChange = false;
- const DataLayout &DL = F.getParent()->getDataLayout();
+ const DataLayout &DL = F.getDataLayout();
const TargetSubtargetInfo *SubtargetInfo = TM->getSubtargetImpl(F);
TLI = SubtargetInfo->getTargetLowering();
RegisterBitWidth =
diff --git a/llvm/lib/CodeGen/WinEHPrepare.cpp b/llvm/lib/CodeGen/WinEHPrepare.cpp
index 93a18f5bc9e8d..b4f8678963f1d 100644
--- a/llvm/lib/CodeGen/WinEHPrepare.cpp
+++ b/llvm/lib/CodeGen/WinEHPrepare.cpp
@@ -138,7 +138,7 @@ bool WinEHPrepareImpl::runOnFunction(Function &Fn) {
if (!isScopedEHPersonality(Personality))
return false;
- DL = &Fn.getParent()->getDataLayout();
+ DL = &Fn.getDataLayout();
return prepareExplicitEH(Fn);
}
diff --git a/llvm/lib/ExecutionEngine/ExecutionEngine.cpp b/llvm/lib/ExecutionEngine/ExecutionEngine.cpp
index 31c290ad50530..28e4f96df828c 100644
--- a/llvm/lib/ExecutionEngine/ExecutionEngine.cpp
+++ b/llvm/lib/ExecutionEngine/ExecutionEngine.cpp
@@ -192,9 +192,9 @@ std::string ExecutionEngine::getMangledName(const GlobalValue *GV) {
SmallString<128> FullName;
const DataLayout &DL =
- GV->getParent()->getDataLayout().isDefault()
+ GV->getDataLayout().isDefault()
? getDataLayout()
- : GV->getParent()->getDataLayout();
+ : GV->getDataLayout();
Mangler::getNameWithPrefix(FullName, GV->getName(), DL);
return std::string(FullName);
diff --git a/llvm/lib/ExecutionEngine/Orc/ExecutionUtils.cpp b/llvm/lib/ExecutionEngine/Orc/ExecutionUtils.cpp
index 670c8cf996fd6..8a5986c1b88b1 100644
--- a/llvm/lib/ExecutionEngine/Orc/ExecutionUtils.cpp
+++ b/llvm/lib/ExecutionEngine/Orc/ExecutionUtils.cpp
@@ -117,7 +117,7 @@ void CtorDtorRunner::add(iterator_range<CtorDtorIterator> CtorDtors) {
MangleAndInterner Mangle(
JD.getExecutionSession(),
- (*CtorDtors.begin()).Func->getParent()->getDataLayout());
+ (*CtorDtors.begin()).Func->getDataLayout());
for (auto CtorDtor : CtorDtors) {
assert(CtorDtor.Func && CtorDtor.Func->hasName() &&
diff --git a/llvm/lib/ExecutionEngine/Orc/Mangling.cpp b/llvm/lib/ExecutionEngine/Orc/Mangling.cpp
index 9c243c9bf1d29..9abf7c11d5467 100644
--- a/llvm/lib/ExecutionEngine/Orc/Mangling.cpp
+++ b/llvm/lib/ExecutionEngine/Orc/Mangling.cpp
@@ -35,7 +35,7 @@ void IRSymbolMapper::add(ExecutionSession &ES, const ManglingOptions &MO,
if (GVs.empty())
return;
- MangleAndInterner Mangle(ES, GVs[0]->getParent()->getDataLayout());
+ MangleAndInterner Mangle(ES, GVs[0]->getDataLayout());
for (auto *G : GVs) {
assert(G && "GVs cannot contain null elements");
if (!G->hasName() || G->isDeclaration() || G->hasLocalLinkage() ||
diff --git a/llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp b/llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
index 3b29bab64b691..ed06d4e2658e5 100644
--- a/llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
+++ b/llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
@@ -5125,7 +5125,7 @@ void OpenMPIRBuilder::applySimd(CanonicalLoopInfo *CanonicalLoop,
for (auto &AlignedItem : AlignedVars) {
Value *AlignedPtr = AlignedItem.first;
Value *Alignment = AlignedItem.second;
- Builder.CreateAlignmentAssumption(F->getParent()->getDataLayout(),
+ Builder.CreateAlignmentAssumption(F->getDataLayout(),
AlignedPtr, Alignment);
}
Builder.restoreIP(IP);
@@ -5977,7 +5977,7 @@ OpenMPIRBuilder::createTargetInit(const LocationDescription &Loc, bool IsSPMD,
Function *Fn = getOrCreateRuntimeFunctionPtr(
omp::RuntimeFunction::OMPRTL___kmpc_target_init);
- const DataLayout &DL = Fn->getParent()->getDataLayout();
+ const DataLayout &DL = Fn->getDataLayout();
Twine DynamicEnvironmentName = KernelName + "_dynamic_environment";
Constant *DynamicEnvironmentInitializer =
diff --git a/llvm/lib/IR/DebugInfo.cpp b/llvm/lib/IR/DebugInfo.cpp
index e57c3fe8c825d..7f1489ebbd740 100644
--- a/llvm/lib/IR/DebugInfo.cpp
+++ b/llvm/lib/IR/DebugInfo.cpp
@@ -2271,7 +2271,7 @@ bool AssignmentTrackingPass::runOnFunction(Function &F) {
return /*Changed*/ false;
bool Changed = false;
- auto *DL = &F.getParent()->getDataLayout();
+ auto *DL = &F.getDataLayout();
// Collect a map of {backing storage : dbg.declares} (currently "backing
// storage" is limited to Allocas). We'll use this to find dbg.declares to
// delete after running `trackAssignments`.
diff --git a/llvm/lib/IR/Mangler.cpp b/llvm/lib/IR/Mangler.cpp
index 019fe844e286c..e6c3ea9d56883 100644
--- a/llvm/lib/IR/Mangler.cpp
+++ b/llvm/lib/IR/Mangler.cpp
@@ -128,7 +128,7 @@ void Mangler::getNameWithPrefix(raw_ostream &OS, const GlobalValue *GV,
PrefixTy = Private;
}
- const DataLayout &DL = GV->getParent()->getDataLayout();
+ const DataLayout &DL = GV->getDataLayout();
if (!GV->hasName()) {
// Get the ID for the global, assigning a new one if we haven't got one
// already.
@@ -227,7 +227,7 @@ void llvm::emitLinkerFlagsForGlobalCOFF(raw_ostream &OS, const GlobalValue *GV,
raw_string_ostream FlagOS(Flag);
Mangler.getNameWithPrefix(FlagOS, GV, false);
FlagOS.flush();
- if (Flag[0] == GV->getParent()->getDataLayout().getGlobalPrefix())
+ if (Flag[0] == GV->getDataLayout().getGlobalPrefix())
OS << Flag.substr(1);
else
OS << Flag;
@@ -266,7 +266,7 @@ void llvm::emitLinkerFlagsForGlobalCOFF(raw_ostream &OS, const GlobalValue *GV,
raw_string_ostream FlagOS(Flag);
Mangler.getNameWithPrefix(FlagOS, GV, false);
FlagOS.flush();
- if (Flag[0] == GV->getParent()->getDataLayout().getGlobalPrefix())
+ if (Flag[0] == GV->getDataLayout().getGlobalPrefix())
OS << Flag.substr(1);
else
OS << Flag;
diff --git a/llvm/lib/Linker/LinkModules.cpp b/llvm/lib/Linker/LinkModules.cpp
index 4fe1f1a0f5183..485ac106d4ebb 100644
--- a/llvm/lib/Linker/LinkModules.cpp
+++ b/llvm/lib/Linker/LinkModules.cpp
@@ -291,7 +291,7 @@ bool ModuleLinker::shouldLinkFromSource(bool &LinkFromSrc,
return false;
}
- const DataLayout &DL = Dest.getParent()->getDataLayout();
+ const DataLayout &DL = Dest.getDataLayout();
uint64_t DestSize = DL.getTypeAllocSize(Dest.getValueType());
uint64_t SrcSize = DL.getTypeAllocSize(Src.getValueType());
LinkFromSrc = SrcSize > DestSize;
diff --git a/llvm/lib/Object/IRSymtab.cpp b/llvm/lib/Object/IRSymtab.cpp
index 18fc2e4d4a37b..7e29da4d5e948 100644
--- a/llvm/lib/Object/IRSymtab.cpp
+++ b/llvm/lib/Object/IRSymtab.cpp
@@ -295,7 +295,7 @@ Error Builder::addSymbol(const ModuleSymbolTable &Msymtab,
return make_error<StringError>("Only variables can have common linkage!",
inconvertibleErrorCode());
Uncommon().CommonSize =
- GV->getParent()->getDataLayout().getTypeAllocSize(GV->getValueType());
+ GV->getDataLayout().getTypeAllocSize(GV->getValueType());
Uncommon().CommonAlign = GVar->getAlign() ? GVar->getAlign()->value() : 0;
}
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index 61de30cdcaef6..b05c2410a8a7b 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -15411,7 +15411,7 @@ bool AArch64TargetLowering::isProfitableToHoist(Instruction *I) const {
const TargetOptions &Options = getTargetMachine().Options;
const Function *F = I->getFunction();
- const DataLayout &DL = F->getParent()->getDataLayout();
+ const DataLayout &DL = F->getDataLayout();
Type *Ty = User->getOperand(0)->getType();
return !(isFMAFasterThanFMulAndFAdd(*F, Ty) &&
@@ -15901,7 +15901,7 @@ bool AArch64TargetLowering::shouldSinkOperands(
// the backend to generate a umull.
unsigned Bitwidth = I->getType()->getScalarSizeInBits();
APInt UpperMask = APInt::getHighBitsSet(Bitwidth, Bitwidth / 2);
- const DataLayout &DL = I->getFunction()->getParent()->getDataLayout();
+ const DataLayout &DL = I->getFunction()->getDataLayout();
if (!MaskedValueIsZero(OperandInstr, UpperMask, DL))
continue;
NumZExts++;
@@ -24012,7 +24012,7 @@ static SDValue performGlobalAddressCombine(SDNode *N, SelectionDAG &DAG,
const GlobalValue *GV = GN->getGlobal();
Type *T = GV->getValueType();
if (!T->isSized() ||
- Offset > GV->getParent()->getDataLayout().getTypeAllocSize(T))
+ Offset > GV->getDataLayout().getTypeAllocSize(T))
return SDValue();
SDLoc DL(GN);
diff --git a/llvm/lib/Target/AArch64/AArch64StackTagging.cpp b/llvm/lib/Target/AArch64/AArch64StackTagging.cpp
index a1ced770bfbbf..96218ab8cf02e 100644
--- a/llvm/lib/Target/AArch64/AArch64StackTagging.cpp
+++ b/llvm/lib/Target/AArch64/AArch64StackTagging.cpp
@@ -528,7 +528,7 @@ bool AArch64StackTagging::runOnFunction(Function &Fn) {
if (UseStackSafety)
SSI = &getAnalysis<StackSafetyGlobalInfoWrapperPass>().getResult();
F = &Fn;
- DL = &Fn.getParent()->getDataLayout();
+ DL = &Fn.getDataLayout();
if (MergeInit)
AA = &getAnalysis<AAResultsWrapperPass>().getAAResults();
diff --git a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
index 1180225ce0096..3eb9aa963c018 100644
--- a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
+++ b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
@@ -71,7 +71,7 @@ class AArch64TTIImpl : public BasicTTIImplBase<AArch64TTIImpl> {
public:
explicit AArch64TTIImpl(const AArch64TargetMachine *TM, const Function &F)
- : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)),
+ : BaseT(TM, F.getDataLayout()), ST(TM->getSubtargetImpl(F)),
TLI(ST->getTargetLowering()) {}
bool areInlineCompatible(const Function *Caller,
diff --git a/llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp b/llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
index 1fb50a089ea38..5206ba46260ed 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
@@ -372,7 +372,7 @@ bool AArch64CallLowering::lowerReturn(MachineIRBuilder &MIRBuilder,
MachineRegisterInfo &MRI = MF.getRegInfo();
const AArch64TargetLowering &TLI = *getTLI<AArch64TargetLowering>();
CCAssignFn *AssignFn = TLI.CCAssignFnForReturn(F.getCallingConv());
- auto &DL = F.getParent()->getDataLayout();
+ auto &DL = F.getDataLayout();
LLVMContext &Ctx = Val->getType()->getContext();
SmallVector<EVT, 4> SplitEVTs;
@@ -639,7 +639,7 @@ bool AArch64CallLowering::lowerFormalArguments(
MachineFunction &MF = MIRBuilder.getMF();
MachineBasicBlock &MBB = MIRBuilder.getMBB();
MachineRegisterInfo &MRI = MF.getRegInfo();
- auto &DL = F.getParent()->getDataLayout();
+ auto &DL = F.getDataLayout();
auto &Subtarget = MF.getSubtarget<AArch64Subtarget>();
// Arm64EC has extra requirements for varargs calls which are only implemented
@@ -1257,7 +1257,7 @@ bool AArch64CallLowering::lowerCall(MachineIRBuilder &MIRBuilder,
MachineFunction &MF = MIRBuilder.getMF();
const Function &F = MF.getFunction();
MachineRegisterInfo &MRI = MF.getRegInfo();
- auto &DL = F.getParent()->getDataLayout();
+ auto &DL = F.getDataLayout();
const AArch64TargetLowering &TLI = *getTLI<AArch64TargetLowering>();
const AArch64Subtarget &Subtarget = MF.getSubtarget<AArch64Subtarget>();
diff --git a/llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp b/llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp
index e9b25924b35f7..8a50cb26b2c2f 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp
@@ -184,7 +184,7 @@ bool matchFoldGlobalOffset(MachineInstr &MI, MachineRegisterInfo &MRI,
Type *T = GV->getValueType();
if (!T->isSized() ||
- NewOffset > GV->getParent()->getDataLayout().getTypeAllocSize(T))
+ NewOffset > GV->getDataLayout().getTypeAllocSize(T))
return false;
MatchInfo = std::make_pair(NewOffset, MinOffset);
return true;
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUAliasAnalysis.h b/llvm/lib/Target/AMDGPU/AMDGPUAliasAnalysis.h
index 8ce7000222fa0..05fd411b35e54 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUAliasAnalysis.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPUAliasAnalysis.h
@@ -52,7 +52,7 @@ class AMDGPUAA : public AnalysisInfoMixin<AMDGPUAA> {
using Result = AMDGPUAAResult;
AMDGPUAAResult run(Function &F, AnalysisManager<Function> &AM) {
- return AMDGPUAAResult(F.getParent()->getDataLayout());
+ return AMDGPUAAResult(F.getDataLayout());
}
};
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp b/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
index e49925f86bd9a..eb67963c1d660 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
@@ -324,7 +324,7 @@ void AMDGPUAsmPrinter::emitGlobalVariable(const GlobalVariable *GV) {
report_fatal_error("symbol '" + Twine(GVSym->getName()) +
"' is already defined");
- const DataLayout &DL = GV->getParent()->getDataLayout();
+ const DataLayout &DL = GV->getDataLayout();
uint64_t Size = DL.getTypeAllocSize(GV->getValueType());
Align Alignment = GV->getAlign().value_or(Align(4));
@@ -862,7 +862,7 @@ void AMDGPUAsmPrinter::getSIProgramInfo(SIProgramInfo &ProgInfo,
// FIXME: We should be using the number of registers determined during
// calling convention lowering to legalize the types.
- const DataLayout &DL = F.getParent()->getDataLayout();
+ const DataLayout &DL = F.getDataLayout();
unsigned PSArgCount = 0;
unsigned IntermediateVGPR = 0;
for (auto &Arg : F.args()) {
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp b/llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp
index d7ef6f3c5dc43..8062bc13f9a93 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp
@@ -116,7 +116,7 @@ bool AMDGPUAtomicOptimizer::runOnFunction(Function &F) {
const UniformityInfo *UA =
&getAnalysis<UniformityInfoWrapperPass>().getUniformityInfo();
- const DataLayout *DL = &F.getParent()->getDataLayout();
+ const DataLayout *DL = &F.getDataLayout();
DominatorTreeWrapperPass *const DTW =
getAnalysisIfAvailable<DominatorTreeWrapperPass>();
@@ -137,7 +137,7 @@ PreservedAnalyses AMDGPUAtomicOptimizerPass::run(Function &F,
FunctionAnalysisManager &AM) {
const auto *UA = &AM.getResult<UniformityInfoAnalysis>(F);
- const DataLayout *DL = &F.getParent()->getDataLayout();
+ const DataLayout *DL = &F.getDataLayout();
DomTreeUpdater DTU(&AM.getResult<DominatorTreeAnalysis>(F),
DomTreeUpdater::UpdateStrategy::Lazy);
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp b/llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
index 7e1f041fa1093..b113904ce242f 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
@@ -416,7 +416,7 @@ void AMDGPUCallLowering::lowerParameter(MachineIRBuilder &B, ArgInfo &OrigArg,
Align Alignment) const {
MachineFunction &MF = B.getMF();
const Function &F = MF.getFunction();
- const DataLayout &DL = F.getParent()->getDataLayout();
+ const DataLayout &DL = F.getDataLayout();
MachinePointerInfo PtrInfo(AMDGPUAS::CONSTANT_ADDRESS);
LLT PtrTy = LLT::pointer(AMDGPUAS::CONSTANT_ADDRESS, 64);
@@ -516,7 +516,7 @@ bool AMDGPUCallLowering::lowerFormalArgumentsKernel(
SIMachineFunctionInfo *Info = MF.getInfo<SIMachineFunctionInfo>();
const SIRegisterInfo *TRI = Subtarget->getRegisterInfo();
const SITargetLowering &TLI = *getTLI<SITargetLowering>();
- const DataLayout &DL = F.getParent()->getDataLayout();
+ const DataLayout &DL = F.getDataLayout();
SmallVector<CCValAssign, 16> ArgLocs;
CCState CCInfo(F.getCallingConv(), F.isVarArg(), MF, ArgLocs, F.getContext());
@@ -598,7 +598,7 @@ bool AMDGPUCallLowering::lowerFormalArguments(
SIMachineFunctionInfo *Info = MF.getInfo<SIMachineFunctionInfo>();
const GCNSubtarget &Subtarget = MF.getSubtarget<GCNSubtarget>();
const SIRegisterInfo *TRI = Subtarget.getRegisterInfo();
- const DataLayout &DL = F.getParent()->getDataLayout();
+ const DataLayout &DL = F.getDataLayout();
SmallVector<CCValAssign, 16> ArgLocs;
CCState CCInfo(CC, F.isVarArg(), MF, ArgLocs, F.getContext());
@@ -1353,7 +1353,7 @@ bool AMDGPUCallLowering::lowerChainCall(MachineIRBuilder &MIRBuilder,
MachineFunction &MF = MIRBuilder.getMF();
const Function &F = MF.getFunction();
- const DataLayout &DL = F.getParent()->getDataLayout();
+ const DataLayout &DL = F.getDataLayout();
// The function to jump to is actually the first argument, so we'll change the
// Callee and other info to match that before using our existing helper.
@@ -1407,7 +1407,7 @@ bool AMDGPUCallLowering::lowerCall(MachineIRBuilder &MIRBuilder,
const Function &F = MF.getFunction();
MachineRegisterInfo &MRI = MF.getRegInfo();
const SITargetLowering &TLI = *getTLI<SITargetLowering>();
- const DataLayout &DL = F.getParent()->getDataLayout();
+ const DataLayout &DL = F.getDataLayout();
SmallVector<ArgInfo, 8> OutArgs;
for (auto &OrigArg : Info.OrigArgs)
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp b/llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp
index efe47b2c3eed9..1aaf514ae8f62 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp
@@ -312,7 +312,7 @@ void MetadataStreamerMsgPackV4::emitKernelArg(const Argument &Arg,
if (Node && ArgNo < Node->getNumOperands())
TypeQual = cast<MDString>(Node->getOperand(ArgNo))->getString();
- const DataLayout &DL = Func->getParent()->getDataLayout();
+ const DataLayout &DL = Func->getDataLayout();
MaybeAlign PointeeAlign;
Type *Ty = Arg.hasByRefAttr() ? Arg.getParamByRefType() : Arg.getType();
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
index 522b3a34161cd..747cedb111d31 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
@@ -1158,7 +1158,7 @@ void AMDGPUTargetLowering::analyzeFormalArgumentsCompute(
Align MaxAlign = Align(1);
uint64_t ExplicitArgOffset = 0;
- const DataLayout &DL = Fn.getParent()->getDataLayout();
+ const DataLayout &DL = Fn.getDataLayout();
unsigned InIndex = 0;
@@ -6015,7 +6015,7 @@ AMDGPUTargetLowering::shouldExpandAtomicRMWInIR(AtomicRMWInst *RMW) const {
case AtomicRMWInst::FMin:
return AtomicExpansionKind::CmpXChg;
case AtomicRMWInst::Xchg: {
- const DataLayout &DL = RMW->getFunction()->getParent()->getDataLayout();
+ const DataLayout &DL = RMW->getFunction()->getDataLayout();
unsigned ValSize = DL.getTypeSizeInBits(RMW->getType());
if (ValSize == 32 || ValSize == 64)
return AtomicExpansionKind::None;
diff --git a/llvm/lib/Target/AMDGPU/AMDGPULowerKernelArguments.cpp b/llvm/lib/Target/AMDGPU/AMDGPULowerKernelArguments.cpp
index 1873fdb4d2596..83cce6021693a 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPULowerKernelArguments.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPULowerKernelArguments.cpp
@@ -104,7 +104,7 @@ static bool lowerKernelArguments(Function &F, const TargetMachine &TM) {
const GCNSubtarget &ST = TM.getSubtarget<GCNSubtarget>(F);
LLVMContext &Ctx = F.getParent()->getContext();
- const DataLayout &DL = F.getParent()->getDataLayout();
+ const DataLayout &DL = F.getDataLayout();
BasicBlock &EntryBlock = *F.begin();
IRBuilder<> Builder(&EntryBlock, getInsertPt(EntryBlock));
diff --git a/llvm/lib/Target/AMDGPU/AMDGPULowerKernelAttributes.cpp b/llvm/lib/Target/AMDGPU/AMDGPULowerKernelAttributes.cpp
index bf7f67c086f2c..e91d05954a1c9 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPULowerKernelAttributes.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPULowerKernelAttributes.cpp
@@ -101,7 +101,7 @@ static bool processUse(CallInst *CI, bool IsV5OrAbove) {
Value *Remainders[3] = {nullptr, nullptr, nullptr};
Value *GridSizes[3] = {nullptr, nullptr, nullptr};
- const DataLayout &DL = F->getParent()->getDataLayout();
+ const DataLayout &DL = F->getDataLayout();
// We expect to see several GEP users, casted to the appropriate type and
// loaded.
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp b/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
index a8e26f104f588..b46adb9f1a0b3 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
@@ -597,7 +597,7 @@ uint64_t AMDGPUSubtarget::getExplicitKernArgSize(const Function &F,
assert(F.getCallingConv() == CallingConv::AMDGPU_KERNEL ||
F.getCallingConv() == CallingConv::SPIR_KERNEL);
- const DataLayout &DL = F.getParent()->getDataLayout();
+ const DataLayout &DL = F.getDataLayout();
uint64_t ExplicitArgBytes = 0;
MaxAlign = Align(1);
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
index 2d8b427c0cf9a..0b1ecc002ae25 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
@@ -95,7 +95,7 @@ static bool dependsOnLocalPhi(const Loop *L, const Value *Cond,
}
AMDGPUTTIImpl::AMDGPUTTIImpl(const AMDGPUTargetMachine *TM, const Function &F)
- : BaseT(TM, F.getParent()->getDataLayout()),
+ : BaseT(TM, F.getDataLayout()),
TargetTriple(TM->getTargetTriple()),
ST(static_cast<const GCNSubtarget *>(TM->getSubtargetImpl(F))),
TLI(ST->getTargetLowering()) {}
@@ -292,7 +292,7 @@ const FeatureBitset GCNTTIImpl::InlineFeatureIgnoreList = {
AMDGPU::FeatureFastFMAF32, AMDGPU::HalfRate64Ops};
GCNTTIImpl::GCNTTIImpl(const AMDGPUTargetMachine *TM, const Function &F)
- : BaseT(TM, F.getParent()->getDataLayout()),
+ : BaseT(TM, F.getDataLayout()),
ST(static_cast<const GCNSubtarget *>(TM->getSubtargetImpl(F))),
TLI(ST->getTargetLowering()), CommonTTI(TM, F),
IsGraphics(AMDGPU::isGraphics(F.getCallingConv())) {
@@ -978,7 +978,7 @@ bool GCNTTIImpl::isAlwaysUniform(const Value *V) const {
if (match(V, m_c_And(m_Intrinsic<Intrinsic::amdgcn_workitem_id_x>(),
m_Value(Mask)))) {
const Function *F = cast<Instruction>(V)->getFunction();
- const DataLayout &DL = F->getParent()->getDataLayout();
+ const DataLayout &DL = F->getDataLayout();
return computeKnownBits(Mask, DL).countMinTrailingZeros() >=
ST->getWavefrontSizeLog2() &&
ST->getMaxWorkitemID(*F, 1) == 0 && ST->getMaxWorkitemID(*F, 2) == 0;
diff --git a/llvm/lib/Target/AMDGPU/R600TargetTransformInfo.cpp b/llvm/lib/Target/AMDGPU/R600TargetTransformInfo.cpp
index 1a1be4a442857..ad4aaa8fdef84 100644
--- a/llvm/lib/Target/AMDGPU/R600TargetTransformInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/R600TargetTransformInfo.cpp
@@ -24,7 +24,7 @@ using namespace llvm;
#define DEBUG_TYPE "R600tti"
R600TTIImpl::R600TTIImpl(const AMDGPUTargetMachine *TM, const Function &F)
- : BaseT(TM, F.getParent()->getDataLayout()),
+ : BaseT(TM, F.getDataLayout()),
ST(static_cast<const R600Subtarget *>(TM->getSubtargetImpl(F))),
TLI(ST->getTargetLowering()), CommonTTI(TM, F) {}
diff --git a/llvm/lib/Target/ARC/ARCTargetTransformInfo.h b/llvm/lib/Target/ARC/ARCTargetTransformInfo.h
index 3e34008902b5c..24c0dd053efd8 100644
--- a/llvm/lib/Target/ARC/ARCTargetTransformInfo.h
+++ b/llvm/lib/Target/ARC/ARCTargetTransformInfo.h
@@ -38,7 +38,7 @@ class ARCTTIImpl : public BasicTTIImplBase<ARCTTIImpl> {
public:
explicit ARCTTIImpl(const ARCTargetMachine *TM, const Function &F)
- : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl()),
+ : BaseT(TM, F.getDataLayout()), ST(TM->getSubtargetImpl()),
TLI(ST->getTargetLowering()) {}
// Provide value semantics. MSVC requires that we spell all of these out.
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index 37f1f435292c1..3c52028dfaf60 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -21043,7 +21043,7 @@ bool ARMTargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
case Intrinsic::arm_neon_vld4dup: {
Info.opc = ISD::INTRINSIC_W_CHAIN;
// Conservatively set memVT to the entire set of vectors loaded.
- auto &DL = I.getCalledFunction()->getParent()->getDataLayout();
+ auto &DL = I.getCalledFunction()->getDataLayout();
uint64_t NumElts = DL.getTypeSizeInBits(I.getType()) / 64;
Info.memVT = EVT::getVectorVT(I.getType()->getContext(), MVT::i64, NumElts);
Info.ptrVal = I.getArgOperand(0);
@@ -21059,7 +21059,7 @@ bool ARMTargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
case Intrinsic::arm_neon_vld1x4: {
Info.opc = ISD::INTRINSIC_W_CHAIN;
// Conservatively set memVT to the entire set of vectors loaded.
- auto &DL = I.getCalledFunction()->getParent()->getDataLayout();
+ auto &DL = I.getCalledFunction()->getDataLayout();
uint64_t NumElts = DL.getTypeSizeInBits(I.getType()) / 64;
Info.memVT = EVT::getVectorVT(I.getType()->getContext(), MVT::i64, NumElts);
Info.ptrVal = I.getArgOperand(I.arg_size() - 1);
@@ -21078,7 +21078,7 @@ bool ARMTargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
case Intrinsic::arm_neon_vst4lane: {
Info.opc = ISD::INTRINSIC_VOID;
// Conservatively set memVT to the entire set of vectors stored.
- auto &DL = I.getCalledFunction()->getParent()->getDataLayout();
+ auto &DL = I.getCalledFunction()->getDataLayout();
unsigned NumElts = 0;
for (unsigned ArgI = 1, ArgE = I.arg_size(); ArgI < ArgE; ++ArgI) {
Type *ArgTy = I.getArgOperand(ArgI)->getType();
@@ -21100,7 +21100,7 @@ bool ARMTargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
case Intrinsic::arm_neon_vst1x4: {
Info.opc = ISD::INTRINSIC_VOID;
// Conservatively set memVT to the entire set of vectors stored.
- auto &DL = I.getCalledFunction()->getParent()->getDataLayout();
+ auto &DL = I.getCalledFunction()->getDataLayout();
unsigned NumElts = 0;
for (unsigned ArgI = 1, ArgE = I.arg_size(); ArgI < ArgE; ++ArgI) {
Type *ArgTy = I.getArgOperand(ArgI)->getType();
@@ -21206,7 +21206,7 @@ bool ARMTargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
}
case Intrinsic::arm_ldaex:
case Intrinsic::arm_ldrex: {
- auto &DL = I.getCalledFunction()->getParent()->getDataLayout();
+ auto &DL = I.getCalledFunction()->getDataLayout();
Type *ValTy = I.getParamElementType(0);
Info.opc = ISD::INTRINSIC_W_CHAIN;
Info.memVT = MVT::getVT(ValTy);
@@ -21218,7 +21218,7 @@ bool ARMTargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
}
case Intrinsic::arm_stlex:
case Intrinsic::arm_strex: {
- auto &DL = I.getCalledFunction()->getParent()->getDataLayout();
+ auto &DL = I.getCalledFunction()->getDataLayout();
Type *ValTy = I.getParamElementType(1);
Info.opc = ISD::INTRINSIC_W_CHAIN;
Info.memVT = MVT::getVT(ValTy);
diff --git a/llvm/lib/Target/ARM/ARMTargetTransformInfo.h b/llvm/lib/Target/ARM/ARMTargetTransformInfo.h
index 8c4b92b856888..bea088065172e 100644
--- a/llvm/lib/Target/ARM/ARMTargetTransformInfo.h
+++ b/llvm/lib/Target/ARM/ARMTargetTransformInfo.h
@@ -101,7 +101,7 @@ class ARMTTIImpl : public BasicTTIImplBase<ARMTTIImpl> {
public:
explicit ARMTTIImpl(const ARMBaseTargetMachine *TM, const Function &F)
- : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)),
+ : BaseT(TM, F.getDataLayout()), ST(TM->getSubtargetImpl(F)),
TLI(ST->getTargetLowering()) {}
bool areInlineCompatible(const Function *Caller,
diff --git a/llvm/lib/Target/ARM/MVEGatherScatterLowering.cpp b/llvm/lib/Target/ARM/MVEGatherScatterLowering.cpp
index 924a4580aa5fd..72a14556dc39c 100644
--- a/llvm/lib/Target/ARM/MVEGatherScatterLowering.cpp
+++ b/llvm/lib/Target/ARM/MVEGatherScatterLowering.cpp
@@ -1257,7 +1257,7 @@ bool MVEGatherScatterLowering::runOnFunction(Function &F) {
if (!ST->hasMVEIntegerOps())
return false;
LI = &getAnalysis<LoopInfoWrapperPass>().getLoopInfo();
- DL = &F.getParent()->getDataLayout();
+ DL = &F.getDataLayout();
SmallVector<IntrinsicInst *, 4> Gathers;
SmallVector<IntrinsicInst *, 4> Scatters;
diff --git a/llvm/lib/Target/BPF/BPFTargetTransformInfo.h b/llvm/lib/Target/BPF/BPFTargetTransformInfo.h
index 0ecff32a7525f..13dcae7e67bcf 100644
--- a/llvm/lib/Target/BPF/BPFTargetTransformInfo.h
+++ b/llvm/lib/Target/BPF/BPFTargetTransformInfo.h
@@ -34,7 +34,7 @@ class BPFTTIImpl : public BasicTTIImplBase<BPFTTIImpl> {
public:
explicit BPFTTIImpl(const BPFTargetMachine *TM, const Function &F)
- : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)),
+ : BaseT(TM, F.getDataLayout()), ST(TM->getSubtargetImpl(F)),
TLI(ST->getTargetLowering()) {}
int getIntImmCost(const APInt &Imm, Type *Ty, TTI::TargetCostKind CostKind) {
diff --git a/llvm/lib/Target/BPF/BTFDebug.cpp b/llvm/lib/Target/BPF/BTFDebug.cpp
index b6d3b460005c9..541974a2285ff 100644
--- a/llvm/lib/Target/BPF/BTFDebug.cpp
+++ b/llvm/lib/Target/BPF/BTFDebug.cpp
@@ -1489,7 +1489,7 @@ void BTFDebug::processGlobals(bool ProcessingMapDef) {
}
// Calculate symbol size
- const DataLayout &DL = Global.getParent()->getDataLayout();
+ const DataLayout &DL = Global.getDataLayout();
uint32_t Size = DL.getTypeAllocSize(Global.getValueType());
DataSecEntries[std::string(SecName)]->addDataSecEntry(VarId,
diff --git a/llvm/lib/Target/DirectX/DirectXAsmPrinter.cpp b/llvm/lib/Target/DirectX/DirectXAsmPrinter.cpp
index 3c45d0d5e0088..15def3637c5a7 100644
--- a/llvm/lib/Target/DirectX/DirectXAsmPrinter.cpp
+++ b/llvm/lib/Target/DirectX/DirectXAsmPrinter.cpp
@@ -49,7 +49,7 @@ void DXILAsmPrinter::emitGlobalVariable(const GlobalVariable *GV) {
SectionKind GVKind = TargetLoweringObjectFile::getKindForGlobal(GV, TM);
MCSection *TheSection = getObjFileLowering().SectionForGlobal(GV, GVKind, TM);
OutStreamer->switchSection(TheSection);
- emitGlobalConstant(GV->getParent()->getDataLayout(), GV->getInitializer());
+ emitGlobalConstant(GV->getDataLayout(), GV->getInitializer());
}
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeDirectXAsmPrinter() {
diff --git a/llvm/lib/Target/DirectX/DirectXTargetTransformInfo.h b/llvm/lib/Target/DirectX/DirectXTargetTransformInfo.h
index a0c09684dc67d..ed98355fad002 100644
--- a/llvm/lib/Target/DirectX/DirectXTargetTransformInfo.h
+++ b/llvm/lib/Target/DirectX/DirectXTargetTransformInfo.h
@@ -31,7 +31,7 @@ class DirectXTTIImpl : public BasicTTIImplBase<DirectXTTIImpl> {
public:
explicit DirectXTTIImpl(const DirectXTargetMachine *TM, const Function &F)
- : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)),
+ : BaseT(TM, F.getDataLayout()), ST(TM->getSubtargetImpl(F)),
TLI(ST->getTargetLowering()) {}
unsigned getMinVectorRegisterBitWidth() const { return 32; }
};
diff --git a/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp b/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
index 22a88734afd44..b40098cf4307b 100644
--- a/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
@@ -2110,7 +2110,7 @@ bool HexagonTargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
case Intrinsic::hexagon_L2_loadrb_pbr:
case Intrinsic::hexagon_L2_loadrub_pbr: {
Info.opc = ISD::INTRINSIC_W_CHAIN;
- auto &DL = I.getCalledFunction()->getParent()->getDataLayout();
+ auto &DL = I.getCalledFunction()->getDataLayout();
auto &Cont = I.getCalledFunction()->getParent()->getContext();
// The intrinsic function call is of the form { ElTy, i8* }
// @llvm.hexagon.L2.loadXX.pbr(i8*, i32). The pointer and memory access type
diff --git a/llvm/lib/Target/Hexagon/HexagonTargetObjectFile.cpp b/llvm/lib/Target/Hexagon/HexagonTargetObjectFile.cpp
index 35188ff2e97f4..e5d10a75728bf 100644
--- a/llvm/lib/Target/Hexagon/HexagonTargetObjectFile.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonTargetObjectFile.cpp
@@ -254,7 +254,7 @@ bool HexagonTargetObjectFile::isGlobalInSmallSection(const GlobalObject *GO,
}
}
- unsigned Size = GVar->getParent()->getDataLayout().getTypeAllocSize(GType);
+ unsigned Size = GVar->getDataLayout().getTypeAllocSize(GType);
if (Size == 0) {
LLVM_DEBUG(dbgs() << "no, has size 0\n");
return false;
@@ -317,7 +317,7 @@ unsigned HexagonTargetObjectFile::getSmallestAddressableSize(const Type *Ty,
case Type::FloatTyID:
case Type::DoubleTyID:
case Type::IntegerTyID: {
- const DataLayout &DL = GV->getParent()->getDataLayout();
+ const DataLayout &DL = GV->getDataLayout();
// It is unfortunate that DL's function take non-const Type*.
return DL.getTypeAllocSize(const_cast<Type*>(Ty));
}
diff --git a/llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h b/llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h
index 90c402876a57c..b6f36b920da77 100644
--- a/llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h
+++ b/llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h
@@ -52,7 +52,7 @@ class HexagonTTIImpl : public BasicTTIImplBase<HexagonTTIImpl> {
public:
explicit HexagonTTIImpl(const HexagonTargetMachine *TM, const Function &F)
- : BaseT(TM, F.getParent()->getDataLayout()),
+ : BaseT(TM, F.getDataLayout()),
ST(*TM->getSubtargetImpl(F)), TLI(*ST.getTargetLowering()) {}
/// \name Scalar TTI Implementations
diff --git a/llvm/lib/Target/Hexagon/HexagonVectorCombine.cpp b/llvm/lib/Target/Hexagon/HexagonVectorCombine.cpp
index 797b798520aa1..847646a00a9f6 100644
--- a/llvm/lib/Target/Hexagon/HexagonVectorCombine.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonVectorCombine.cpp
@@ -74,7 +74,7 @@ class HexagonVectorCombine {
HexagonVectorCombine(Function &F_, AliasAnalysis &AA_, AssumptionCache &AC_,
DominatorTree &DT_, ScalarEvolution &SE_,
TargetLibraryInfo &TLI_, const TargetMachine &TM_)
- : F(F_), DL(F.getParent()->getDataLayout()), AA(AA_), AC(AC_), DT(DT_),
+ : F(F_), DL(F.getDataLayout()), AA(AA_), AC(AC_), DT(DT_),
SE(SE_), TLI(TLI_),
HST(static_cast<const HexagonSubtarget &>(*TM_.getSubtargetImpl(F))) {}
diff --git a/llvm/lib/Target/Lanai/LanaiTargetObjectFile.cpp b/llvm/lib/Target/Lanai/LanaiTargetObjectFile.cpp
index a366a89af8636..e90706cd3ab5a 100644
--- a/llvm/lib/Target/Lanai/LanaiTargetObjectFile.cpp
+++ b/llvm/lib/Target/Lanai/LanaiTargetObjectFile.cpp
@@ -95,7 +95,7 @@ bool LanaiTargetObjectFile::isGlobalInSmallSectionImpl(
Type *Ty = GVA->getValueType();
return isInSmallSection(
- GVA->getParent()->getDataLayout().getTypeAllocSize(Ty));
+ GVA->getDataLayout().getTypeAllocSize(Ty));
}
MCSection *LanaiTargetObjectFile::SelectSectionForGlobal(
diff --git a/llvm/lib/Target/Lanai/LanaiTargetTransformInfo.h b/llvm/lib/Target/Lanai/LanaiTargetTransformInfo.h
index b064f4d5b1edf..7dec962789d53 100644
--- a/llvm/lib/Target/Lanai/LanaiTargetTransformInfo.h
+++ b/llvm/lib/Target/Lanai/LanaiTargetTransformInfo.h
@@ -38,7 +38,7 @@ class LanaiTTIImpl : public BasicTTIImplBase<LanaiTTIImpl> {
public:
explicit LanaiTTIImpl(const LanaiTargetMachine *TM, const Function &F)
- : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)),
+ : BaseT(TM, F.getDataLayout()), ST(TM->getSubtargetImpl(F)),
TLI(ST->getTargetLowering()) {}
bool shouldBuildLookupTables() const { return false; }
diff --git a/llvm/lib/Target/LoongArch/LoongArchTargetTransformInfo.h b/llvm/lib/Target/LoongArch/LoongArchTargetTransformInfo.h
index 06a03d29931d1..b2eef80dd9d3d 100644
--- a/llvm/lib/Target/LoongArch/LoongArchTargetTransformInfo.h
+++ b/llvm/lib/Target/LoongArch/LoongArchTargetTransformInfo.h
@@ -37,7 +37,7 @@ class LoongArchTTIImpl : public BasicTTIImplBase<LoongArchTTIImpl> {
public:
explicit LoongArchTTIImpl(const LoongArchTargetMachine *TM, const Function &F)
- : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)),
+ : BaseT(TM, F.getDataLayout()), ST(TM->getSubtargetImpl(F)),
TLI(ST->getTargetLowering()) {}
TypeSize getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const;
diff --git a/llvm/lib/Target/M68k/GISel/M68kCallLowering.cpp b/llvm/lib/Target/M68k/GISel/M68kCallLowering.cpp
index e7e6295164941..f3813afa616cc 100644
--- a/llvm/lib/Target/M68k/GISel/M68kCallLowering.cpp
+++ b/llvm/lib/Target/M68k/GISel/M68kCallLowering.cpp
@@ -103,7 +103,7 @@ bool M68kCallLowering::lowerReturn(MachineIRBuilder &MIRBuilder,
const M68kTargetLowering &TLI = *getTLI<M68kTargetLowering>();
CCAssignFn *AssignFn =
TLI.getCCAssignFn(F.getCallingConv(), true, F.isVarArg());
- auto &DL = F.getParent()->getDataLayout();
+ auto &DL = F.getDataLayout();
if (!VRegs.empty()) {
SmallVector<ArgInfo, 8> SplitArgs;
ArgInfo OrigArg{VRegs, Val->getType(), 0};
@@ -125,7 +125,7 @@ bool M68kCallLowering::lowerFormalArguments(MachineIRBuilder &MIRBuilder,
FunctionLoweringInfo &FLI) const {
MachineFunction &MF = MIRBuilder.getMF();
MachineRegisterInfo &MRI = MF.getRegInfo();
- const auto &DL = F.getParent()->getDataLayout();
+ const auto &DL = F.getDataLayout();
auto &TLI = *getTLI<M68kTargetLowering>();
SmallVector<ArgInfo, 8> SplitArgs;
@@ -191,7 +191,7 @@ bool M68kCallLowering::lowerCall(MachineIRBuilder &MIRBuilder,
MachineFunction &MF = MIRBuilder.getMF();
Function &F = MF.getFunction();
MachineRegisterInfo &MRI = MF.getRegInfo();
- auto &DL = F.getParent()->getDataLayout();
+ auto &DL = F.getDataLayout();
const M68kTargetLowering &TLI = *getTLI<M68kTargetLowering>();
const M68kSubtarget &STI = MF.getSubtarget<M68kSubtarget>();
const TargetInstrInfo &TII = *STI.getInstrInfo();
diff --git a/llvm/lib/Target/Mips/MipsTargetMachine.cpp b/llvm/lib/Target/Mips/MipsTargetMachine.cpp
index 9515e506c73e5..7802767e31c2f 100644
--- a/llvm/lib/Target/Mips/MipsTargetMachine.cpp
+++ b/llvm/lib/Target/Mips/MipsTargetMachine.cpp
@@ -287,7 +287,7 @@ MipsTargetMachine::getTargetTransformInfo(const Function &F) const {
if (Subtarget->allowMixed16_32()) {
LLVM_DEBUG(errs() << "No Target Transform Info Pass Added\n");
// FIXME: This is no longer necessary as the TTI returned is per-function.
- return TargetTransformInfo(F.getParent()->getDataLayout());
+ return TargetTransformInfo(F.getDataLayout());
}
LLVM_DEBUG(errs() << "Target Transform Info Pass Added\n");
diff --git a/llvm/lib/Target/Mips/MipsTargetObjectFile.cpp b/llvm/lib/Target/Mips/MipsTargetObjectFile.cpp
index 481157a8aa89a..61b88eb1b2390 100644
--- a/llvm/lib/Target/Mips/MipsTargetObjectFile.cpp
+++ b/llvm/lib/Target/Mips/MipsTargetObjectFile.cpp
@@ -143,7 +143,7 @@ IsGlobalInSmallSectionImpl(const GlobalObject *GO,
return false;
return IsInSmallSection(
- GVA->getParent()->getDataLayout().getTypeAllocSize(Ty));
+ GVA->getDataLayout().getTypeAllocSize(Ty));
}
MCSection *MipsTargetObjectFile::SelectSectionForGlobal(
diff --git a/llvm/lib/Target/Mips/MipsTargetTransformInfo.h b/llvm/lib/Target/Mips/MipsTargetTransformInfo.h
index 6f52eaa2f8339..4c6a0cc32686f 100644
--- a/llvm/lib/Target/Mips/MipsTargetTransformInfo.h
+++ b/llvm/lib/Target/Mips/MipsTargetTransformInfo.h
@@ -29,7 +29,7 @@ class MipsTTIImpl : public BasicTTIImplBase<MipsTTIImpl> {
public:
explicit MipsTTIImpl(const MipsTargetMachine *TM, const Function &F)
- : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)),
+ : BaseT(TM, F.getDataLayout()), ST(TM->getSubtargetImpl(F)),
TLI(ST->getTargetLowering()) {}
bool hasDivRemOp(Type *DataType, bool IsSigned);
diff --git a/llvm/lib/Target/NVPTX/NVPTXLowerAggrCopies.cpp b/llvm/lib/Target/NVPTX/NVPTXLowerAggrCopies.cpp
index 6ee4b160e90aa..9aa97fb30c488 100644
--- a/llvm/lib/Target/NVPTX/NVPTXLowerAggrCopies.cpp
+++ b/llvm/lib/Target/NVPTX/NVPTXLowerAggrCopies.cpp
@@ -60,7 +60,7 @@ bool NVPTXLowerAggrCopies::runOnFunction(Function &F) {
SmallVector<LoadInst *, 4> AggrLoads;
SmallVector<MemIntrinsic *, 4> MemCalls;
- const DataLayout &DL = F.getParent()->getDataLayout();
+ const DataLayout &DL = F.getDataLayout();
LLVMContext &Context = F.getParent()->getContext();
const TargetTransformInfo &TTI =
getAnalysis<TargetTransformInfoWrapperPass>().getTTI(F);
diff --git a/llvm/lib/Target/NVPTX/NVPTXLowerArgs.cpp b/llvm/lib/Target/NVPTX/NVPTXLowerArgs.cpp
index e63c7a61c6f26..78cef7cb824c7 100644
--- a/llvm/lib/Target/NVPTX/NVPTXLowerArgs.cpp
+++ b/llvm/lib/Target/NVPTX/NVPTXLowerArgs.cpp
@@ -369,7 +369,7 @@ void NVPTXLowerArgs::handleByValParam(const NVPTXTargetMachine &TM,
return;
}
- const DataLayout &DL = Func->getParent()->getDataLayout();
+ const DataLayout &DL = Func->getDataLayout();
unsigned AS = DL.getAllocaAddrSpace();
if (isParamGridConstant(*Arg)) {
// Writes to a grid constant are undefined behaviour. We do not need a
diff --git a/llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.h b/llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.h
index 5a4fbab97f952..4160f5f6bfae7 100644
--- a/llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.h
+++ b/llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.h
@@ -38,7 +38,7 @@ class NVPTXTTIImpl : public BasicTTIImplBase<NVPTXTTIImpl> {
public:
explicit NVPTXTTIImpl(const NVPTXTargetMachine *TM, const Function &F)
- : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl()),
+ : BaseT(TM, F.getDataLayout()), ST(TM->getSubtargetImpl()),
TLI(ST->getTargetLowering()) {}
bool hasBranchDivergence(const Function *F = nullptr) { return true; }
diff --git a/llvm/lib/Target/NVPTX/NVVMReflect.cpp b/llvm/lib/Target/NVPTX/NVVMReflect.cpp
index 4024953bb51db..d653f80d7f3c3 100644
--- a/llvm/lib/Target/NVPTX/NVVMReflect.cpp
+++ b/llvm/lib/Target/NVPTX/NVVMReflect.cpp
@@ -192,7 +192,7 @@ static bool runNVVMReflect(Function &F, unsigned SmVersion) {
while (!ToSimplify.empty()) {
Instruction *I = ToSimplify.pop_back_val();
if (Constant *C =
- ConstantFoldInstruction(I, F.getParent()->getDataLayout())) {
+ ConstantFoldInstruction(I, F.getDataLayout())) {
for (User *U : I->users())
if (Instruction *I = dyn_cast<Instruction>(U))
ToSimplify.push_back(I);
diff --git a/llvm/lib/Target/PowerPC/GISel/PPCCallLowering.cpp b/llvm/lib/Target/PowerPC/GISel/PPCCallLowering.cpp
index 99ecc3fe360d1..a56e2aaec061f 100644
--- a/llvm/lib/Target/PowerPC/GISel/PPCCallLowering.cpp
+++ b/llvm/lib/Target/PowerPC/GISel/PPCCallLowering.cpp
@@ -80,7 +80,7 @@ bool PPCCallLowering::lowerReturn(MachineIRBuilder &MIRBuilder,
MachineFunction &MF = MIRBuilder.getMF();
const Function &F = MF.getFunction();
MachineRegisterInfo &MRI = MF.getRegInfo();
- auto &DL = F.getParent()->getDataLayout();
+ auto &DL = F.getDataLayout();
if (!VRegs.empty()) {
// Setup the information about the return value.
ArgInfo OrigArg{VRegs, Val->getType(), 0};
@@ -117,7 +117,7 @@ bool PPCCallLowering::lowerFormalArguments(MachineIRBuilder &MIRBuilder,
FunctionLoweringInfo &FLI) const {
MachineFunction &MF = MIRBuilder.getMF();
MachineRegisterInfo &MRI = MF.getRegInfo();
- const auto &DL = F.getParent()->getDataLayout();
+ const auto &DL = F.getDataLayout();
auto &TLI = *getTLI<PPCTargetLowering>();
// Loop over each arg, set flags and split to single value types
diff --git a/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp b/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
index bc0ae7a32c051..d74143b487880 100644
--- a/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
+++ b/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
@@ -1613,7 +1613,7 @@ void PPCAsmPrinter::emitInstruction(const MachineInstr *MI) {
}
const MachineOperand &MO = MI->getOperand(OpNum);
if (MO.isGlobal()) {
- const DataLayout &DL = MO.getGlobal()->getParent()->getDataLayout();
+ const DataLayout &DL = MO.getGlobal()->getDataLayout();
if (MO.getGlobal()->getPointerAlignment(DL) < 4)
llvm_unreachable("Global must be word-aligned for LD, STD, LWA!");
}
@@ -2732,7 +2732,7 @@ static void tocDataChecks(unsigned PointerSize, const GlobalVariable *GV) {
Type *GVType = GV->getValueType();
assert(GVType->isSized() && "A GlobalVariable's size must be known to be "
"supported by the toc data transformation.");
- if (GV->getParent()->getDataLayout().getTypeSizeInBits(GVType) >
+ if (GV->getDataLayout().getTypeSizeInBits(GVType) >
PointerSize * 8)
report_fatal_error(
"A GlobalVariable with size larger than a TOC entry is not currently "
@@ -2750,7 +2750,7 @@ void PPCAIXAsmPrinter::emitGlobalVariable(const GlobalVariable *GV) {
// If the Global Variable has the toc-data attribute, it needs to be emitted
// when we emit the .toc section.
if (GV->hasAttribute("toc-data")) {
- unsigned PointerSize = GV->getParent()->getDataLayout().getPointerSize();
+ unsigned PointerSize = GV->getDataLayout().getPointerSize();
tocDataChecks(PointerSize, GV);
TOCDataGlobalVars.push_back(GV);
return;
@@ -2794,7 +2794,7 @@ void PPCAIXAsmPrinter::emitGlobalVariableHelper(const GlobalVariable *GV) {
// Switch to the containing csect.
OutStreamer->switchSection(Csect);
- const DataLayout &DL = GV->getParent()->getDataLayout();
+ const DataLayout &DL = GV->getDataLayout();
// Handle common and zero-initialized local symbols.
if (GV->hasCommonLinkage() || GVKind.isBSSLocal() ||
@@ -2837,7 +2837,7 @@ void PPCAIXAsmPrinter::emitGlobalVariableHelper(const GlobalVariable *GV) {
// No alias to emit.
if (!GOAliasMap[GV].size()) {
- emitGlobalConstant(GV->getParent()->getDataLayout(), GV->getInitializer());
+ emitGlobalConstant(GV->getDataLayout(), GV->getInitializer());
return;
}
@@ -2848,7 +2848,7 @@ void PPCAIXAsmPrinter::emitGlobalVariableHelper(const GlobalVariable *GV) {
AliasList[getAliasOffset(GA->getAliasee())].push_back(GA);
// Emit alias label and element value for global variable.
- emitGlobalConstant(GV->getParent()->getDataLayout(), GV->getInitializer(),
+ emitGlobalConstant(GV->getDataLayout(), GV->getInitializer(),
&AliasList);
}
@@ -3007,7 +3007,7 @@ bool PPCAIXAsmPrinter::doInitialization(Module &M) {
MCSectionXCOFF *Csect = cast<MCSectionXCOFF>(
getObjFileLowering().SectionForGlobal(GO, GOKind, TM));
- Align GOAlign = getGVAlignment(GO, GO->getParent()->getDataLayout());
+ Align GOAlign = getGVAlignment(GO, GO->getDataLayout());
Csect->ensureMinAlignment(GOAlign);
};
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
index 9e56b8522fa63..4d4008ac0ba70 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -3467,7 +3467,7 @@ SDValue PPCTargetLowering::LowerGlobalTLSAddressAIX(SDValue Op,
IsTLSLocalExecModel) {
Type *GVType = GV->getValueType();
if (GVType->isSized() && !GVType->isEmptyTy() &&
- GV->getParent()->getDataLayout().getTypeAllocSize(GVType) <=
+ GV->getDataLayout().getTypeAllocSize(GVType) <=
AIXSmallTlsPolicySizeLimit)
return DAG.getNode(PPCISD::Lo, dl, PtrVT, VariableOffsetTGA, TLSReg);
}
@@ -3530,7 +3530,7 @@ SDValue PPCTargetLowering::LowerGlobalTLSAddressAIX(SDValue Op,
if (HasAIXSmallLocalDynamicTLS) {
Type *GVType = GV->getValueType();
if (GVType->isSized() && !GVType->isEmptyTy() &&
- GV->getParent()->getDataLayout().getTypeAllocSize(GVType) <=
+ GV->getDataLayout().getTypeAllocSize(GVType) <=
AIXSmallTlsPolicySizeLimit)
return DAG.getNode(PPCISD::Lo, dl, PtrVT, VariableOffsetTGA,
ModuleHandle);
@@ -5873,7 +5873,7 @@ bool PPCTargetLowering::supportsTailCallFor(const CallBase *CB) const {
GetReturnInfo(CalleeCC, CalleeFunc->getReturnType(),
CalleeFunc->getAttributes(), Outs, *this,
- CalleeFunc->getParent()->getDataLayout());
+ CalleeFunc->getDataLayout());
return isEligibleForTCO(CalleeGV, CalleeCC, CallerCC, CB,
CalleeFunc->isVarArg(), Outs, Ins, CallerFunc,
@@ -17543,7 +17543,7 @@ bool PPCTargetLowering::isProfitableToHoist(Instruction *I) const {
const TargetOptions &Options = getTargetMachine().Options;
const Function *F = I->getFunction();
- const DataLayout &DL = F->getParent()->getDataLayout();
+ const DataLayout &DL = F->getDataLayout();
Type *Ty = User->getOperand(0)->getType();
return !(
diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
index 85bbfabf5d3c9..e3f59f3bd28df 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
+++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
@@ -4519,7 +4519,7 @@ bool PPCInstrInfo::isImmElgibleForForwarding(const MachineOperand &ImmMO,
// load. A DForm load cannot be represented if it is a multiple of say 2.
// XForm loads do not have this restriction.
if (ImmMO.isGlobal()) {
- const DataLayout &DL = ImmMO.getGlobal()->getParent()->getDataLayout();
+ const DataLayout &DL = ImmMO.getGlobal()->getDataLayout();
if (ImmMO.getGlobal()->getPointerAlignment(DL) < III.ImmMustBeMultipleOf)
return false;
}
diff --git a/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h b/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h
index 061f5da5daf53..5be093f81d3f6 100644
--- a/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h
+++ b/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h
@@ -37,7 +37,7 @@ class PPCTTIImpl : public BasicTTIImplBase<PPCTTIImpl> {
public:
explicit PPCTTIImpl(const PPCTargetMachine *TM, const Function &F)
- : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)),
+ : BaseT(TM, F.getDataLayout()), ST(TM->getSubtargetImpl(F)),
TLI(ST->getTargetLowering()) {}
std::optional<Instruction *> instCombineIntrinsic(InstCombiner & IC,
diff --git a/llvm/lib/Target/RISCV/RISCVCodeGenPrepare.cpp b/llvm/lib/Target/RISCV/RISCVCodeGenPrepare.cpp
index 53fcc527e615d..6e0f429c34b2f 100644
--- a/llvm/lib/Target/RISCV/RISCVCodeGenPrepare.cpp
+++ b/llvm/lib/Target/RISCV/RISCVCodeGenPrepare.cpp
@@ -163,7 +163,7 @@ bool RISCVCodeGenPrepare::runOnFunction(Function &F) {
auto &TM = TPC.getTM<RISCVTargetMachine>();
ST = &TM.getSubtarget<RISCVSubtarget>(F);
- DL = &F.getParent()->getDataLayout();
+ DL = &F.getDataLayout();
bool MadeChange = false;
for (auto &BB : F)
diff --git a/llvm/lib/Target/RISCV/RISCVGatherScatterLowering.cpp b/llvm/lib/Target/RISCV/RISCVGatherScatterLowering.cpp
index cff46e15251bc..d9971791a2cfa 100644
--- a/llvm/lib/Target/RISCV/RISCVGatherScatterLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVGatherScatterLowering.cpp
@@ -548,7 +548,7 @@ bool RISCVGatherScatterLowering::runOnFunction(Function &F) {
return false;
TLI = ST->getTargetLowering();
- DL = &F.getParent()->getDataLayout();
+ DL = &F.getDataLayout();
LI = &getAnalysis<LoopInfoWrapperPass>().getLoopInfo();
StridedAddrs.clear();
diff --git a/llvm/lib/Target/RISCV/RISCVTargetObjectFile.cpp b/llvm/lib/Target/RISCV/RISCVTargetObjectFile.cpp
index e7c1a7e5d8bca..bbae129b99c41 100644
--- a/llvm/lib/Target/RISCV/RISCVTargetObjectFile.cpp
+++ b/llvm/lib/Target/RISCV/RISCVTargetObjectFile.cpp
@@ -98,7 +98,7 @@ bool RISCVELFTargetObjectFile::isGlobalInSmallSection(
return false;
return isInSmallSection(
- GVA->getParent()->getDataLayout().getTypeAllocSize(Ty));
+ GVA->getDataLayout().getTypeAllocSize(Ty));
}
MCSection *RISCVELFTargetObjectFile::SelectSectionForGlobal(
diff --git a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
index a4d1390875095..c4d10aada1f4c 100644
--- a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
+++ b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
@@ -57,7 +57,7 @@ class RISCVTTIImpl : public BasicTTIImplBase<RISCVTTIImpl> {
TTI::TargetCostKind CostKind);
public:
explicit RISCVTTIImpl(const RISCVTargetMachine *TM, const Function &F)
- : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)),
+ : BaseT(TM, F.getDataLayout()), ST(TM->getSubtargetImpl(F)),
TLI(ST->getTargetLowering()) {}
bool areInlineCompatible(const Function *Caller,
diff --git a/llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp b/llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
index dd5884096b85d..3eab6f5a07186 100644
--- a/llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
@@ -1070,7 +1070,7 @@ Instruction *SPIRVEmitIntrinsics::visitLoadInst(LoadInst &I) {
TrackConstants = false;
const auto *TLI = TM->getSubtargetImpl()->getTargetLowering();
MachineMemOperand::Flags Flags =
- TLI->getLoadMemOperandFlags(I, F->getParent()->getDataLayout());
+ TLI->getLoadMemOperandFlags(I, F->getDataLayout());
auto *NewI =
B.CreateIntrinsic(Intrinsic::spv_load, {I.getOperand(0)->getType()},
{I.getPointerOperand(), B.getInt16(Flags),
@@ -1087,7 +1087,7 @@ Instruction *SPIRVEmitIntrinsics::visitStoreInst(StoreInst &I) {
TrackConstants = false;
const auto *TLI = TM->getSubtargetImpl()->getTargetLowering();
MachineMemOperand::Flags Flags =
- TLI->getStoreMemOperandFlags(I, F->getParent()->getDataLayout());
+ TLI->getStoreMemOperandFlags(I, F->getDataLayout());
auto *PtrOp = I.getPointerOperand();
auto *NewI = B.CreateIntrinsic(
Intrinsic::spv_store, {I.getValueOperand()->getType(), PtrOp->getType()},
diff --git a/llvm/lib/Target/SPIRV/SPIRVTargetTransformInfo.h b/llvm/lib/Target/SPIRV/SPIRVTargetTransformInfo.h
index ac351cf42f5ca..2fbb4381da263 100644
--- a/llvm/lib/Target/SPIRV/SPIRVTargetTransformInfo.h
+++ b/llvm/lib/Target/SPIRV/SPIRVTargetTransformInfo.h
@@ -35,7 +35,7 @@ class SPIRVTTIImpl : public BasicTTIImplBase<SPIRVTTIImpl> {
public:
explicit SPIRVTTIImpl(const SPIRVTargetMachine *TM, const Function &F)
- : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)),
+ : BaseT(TM, F.getDataLayout()), ST(TM->getSubtargetImpl(F)),
TLI(ST->getTargetLowering()) {}
};
diff --git a/llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp b/llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
index 6c6a9b490d917..90d7bd934af40 100644
--- a/llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
@@ -1554,7 +1554,7 @@ bool SystemZDAGToDAGISel::storeLoadIsAligned(SDNode *N) const {
// The alignment of the symbol itself must be at least the store size.
const GlobalValue *GV = GA->getGlobal();
- const DataLayout &DL = GV->getParent()->getDataLayout();
+ const DataLayout &DL = GV->getDataLayout();
if (GV->getPointerAlignment(DL).value() < StoreSize)
return false;
}
diff --git a/llvm/lib/Target/SystemZ/SystemZSubtarget.cpp b/llvm/lib/Target/SystemZ/SystemZSubtarget.cpp
index d0badd3692e40..80dbe5fb2b0ca 100644
--- a/llvm/lib/Target/SystemZ/SystemZSubtarget.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZSubtarget.cpp
@@ -116,7 +116,7 @@ bool SystemZSubtarget::isPC32DBLSymbol(const GlobalValue *GV,
//
// FIXME: Explicitly check for functions: the datalayout is currently
// missing information about function pointers.
- const DataLayout &DL = GV->getParent()->getDataLayout();
+ const DataLayout &DL = GV->getDataLayout();
if (GV->getPointerAlignment(DL) == 1 && !GV->getValueType()->isFunctionTy())
return false;
diff --git a/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.h b/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.h
index 3cf4a69ac2818..47db8f132337f 100644
--- a/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.h
+++ b/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.h
@@ -32,7 +32,7 @@ class SystemZTTIImpl : public BasicTTIImplBase<SystemZTTIImpl> {
public:
explicit SystemZTTIImpl(const SystemZTargetMachine *TM, const Function &F)
- : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)),
+ : BaseT(TM, F.getDataLayout()), ST(TM->getSubtargetImpl(F)),
TLI(ST->getTargetLowering()) {}
/// \name Scalar TTI Implementations
diff --git a/llvm/lib/Target/TargetLoweringObjectFile.cpp b/llvm/lib/Target/TargetLoweringObjectFile.cpp
index 26e9f9eb3f327..7d9b926f4c42b 100644
--- a/llvm/lib/Target/TargetLoweringObjectFile.cpp
+++ b/llvm/lib/Target/TargetLoweringObjectFile.cpp
@@ -129,7 +129,7 @@ MCSymbol *TargetLoweringObjectFile::getSymbolWithGlobalValueBase(
assert(!Suffix.empty());
SmallString<60> NameStr;
- NameStr += GV->getParent()->getDataLayout().getPrivateGlobalPrefix();
+ NameStr += GV->getDataLayout().getPrivateGlobalPrefix();
TM.getNameWithPrefix(NameStr, GV, *Mang);
NameStr.append(Suffix.begin(), Suffix.end());
return getContext().getOrCreateSymbol(NameStr);
@@ -284,7 +284,7 @@ SectionKind TargetLoweringObjectFile::getKindForGlobal(const GlobalObject *GO,
// a section for this size, use it, otherwise use the arbitrary sized
// mergable section.
switch (
- GVar->getParent()->getDataLayout().getTypeAllocSize(C->getType())) {
+ GVar->getDataLayout().getTypeAllocSize(C->getType())) {
case 4: return SectionKind::getMergeableConst4();
case 8: return SectionKind::getMergeableConst8();
case 16: return SectionKind::getMergeableConst16();
@@ -350,7 +350,7 @@ TargetLoweringObjectFile::SectionForGlobal(const GlobalObject *GO,
MCSection *TargetLoweringObjectFile::getSectionForJumpTable(
const Function &F, const TargetMachine &TM) const {
Align Alignment(1);
- return getSectionForConstant(F.getParent()->getDataLayout(),
+ return getSectionForConstant(F.getDataLayout(),
SectionKind::getReadOnly(), /*C=*/nullptr,
Alignment);
}
diff --git a/llvm/lib/Target/TargetMachine.cpp b/llvm/lib/Target/TargetMachine.cpp
index 8ddc742004292..eab9bc95d25a4 100644
--- a/llvm/lib/Target/TargetMachine.cpp
+++ b/llvm/lib/Target/TargetMachine.cpp
@@ -105,7 +105,7 @@ bool TargetMachine::isLargeGlobalValue(const GlobalValue *GVal) const {
GV->getName().starts_with("__start_") ||
GV->getName().starts_with("__stop_")))
return true;
- const DataLayout &DL = GV->getParent()->getDataLayout();
+ const DataLayout &DL = GV->getDataLayout();
uint64_t Size = DL.getTypeAllocSize(GV->getValueType());
return Size == 0 || Size > LargeDataThreshold;
}
@@ -268,7 +268,7 @@ void TargetMachine::setOptLevel(CodeGenOptLevel Level) { OptLevel = Level; }
TargetTransformInfo
TargetMachine::getTargetTransformInfo(const Function &F) const {
- return TargetTransformInfo(F.getParent()->getDataLayout());
+ return TargetTransformInfo(F.getDataLayout());
}
void TargetMachine::getNameWithPrefix(SmallVectorImpl<char> &Name,
diff --git a/llvm/lib/Target/VE/VETargetTransformInfo.h b/llvm/lib/Target/VE/VETargetTransformInfo.h
index c688447088782..7a73280e76d95 100644
--- a/llvm/lib/Target/VE/VETargetTransformInfo.h
+++ b/llvm/lib/Target/VE/VETargetTransformInfo.h
@@ -82,7 +82,7 @@ class VETTIImpl : public BasicTTIImplBase<VETTIImpl> {
public:
explicit VETTIImpl(const VETargetMachine *TM, const Function &F)
- : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)),
+ : BaseT(TM, F.getDataLayout()), ST(TM->getSubtargetImpl(F)),
TLI(ST->getTargetLowering()) {}
unsigned getNumberOfRegisters(unsigned ClassID) const {
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
index b0a97c725c872..13e87032ac020 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
@@ -195,7 +195,7 @@ void WebAssemblyAsmPrinter::emitGlobalVariable(const GlobalVariable *GV) {
// can actually calculate the legal VTs.
const WebAssemblyTargetLowering &TLI = *Subtarget->getTargetLowering();
computeLegalValueVTs(TLI, GV->getParent()->getContext(),
- GV->getParent()->getDataLayout(), GlobalVT, VTs);
+ GV->getDataLayout(), GlobalVT, VTs);
}
WebAssembly::wasmSymbolSetType(Sym, GlobalVT, VTs);
}
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.cpp
index 7505c2995cf7e..3a5dda946adfb 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.cpp
@@ -56,7 +56,7 @@ void llvm::computeLegalValueVTs(const WebAssemblyTargetLowering &TLI,
void llvm::computeLegalValueVTs(const Function &F, const TargetMachine &TM,
Type *Ty, SmallVectorImpl<MVT> &ValueVTs) {
- const DataLayout &DL(F.getParent()->getDataLayout());
+ const DataLayout &DL(F.getDataLayout());
const WebAssemblyTargetLowering &TLI =
*TM.getSubtarget<WebAssemblySubtarget>(F).getTargetLowering();
computeLegalValueVTs(TLI, F.getContext(), DL, Ty, ValueVTs);
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.h b/llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.h
index 801f905d377ed..e10f0928ed531 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.h
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.h
@@ -38,7 +38,7 @@ class WebAssemblyTTIImpl final : public BasicTTIImplBase<WebAssemblyTTIImpl> {
public:
WebAssemblyTTIImpl(const WebAssemblyTargetMachine *TM, const Function &F)
- : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)),
+ : BaseT(TM, F.getDataLayout()), ST(TM->getSubtargetImpl(F)),
TLI(ST->getTargetLowering()) {}
/// \name Scalar TTI Implementations
diff --git a/llvm/lib/Target/X86/GISel/X86CallLowering.cpp b/llvm/lib/Target/X86/GISel/X86CallLowering.cpp
index 48830769fdf6c..8e5a23d95683b 100644
--- a/llvm/lib/Target/X86/GISel/X86CallLowering.cpp
+++ b/llvm/lib/Target/X86/GISel/X86CallLowering.cpp
@@ -309,7 +309,7 @@ bool X86CallLowering::lowerCall(MachineIRBuilder &MIRBuilder,
MachineFunction &MF = MIRBuilder.getMF();
const Function &F = MF.getFunction();
MachineRegisterInfo &MRI = MF.getRegInfo();
- const DataLayout &DL = F.getParent()->getDataLayout();
+ const DataLayout &DL = F.getDataLayout();
const X86Subtarget &STI = MF.getSubtarget<X86Subtarget>();
const TargetInstrInfo &TII = *STI.getInstrInfo();
const X86RegisterInfo *TRI = STI.getRegisterInfo();
diff --git a/llvm/lib/Target/X86/X86PartialReduction.cpp b/llvm/lib/Target/X86/X86PartialReduction.cpp
index a11be9507cead..5bbfabcbd67bc 100644
--- a/llvm/lib/Target/X86/X86PartialReduction.cpp
+++ b/llvm/lib/Target/X86/X86PartialReduction.cpp
@@ -508,7 +508,7 @@ bool X86PartialReduction::runOnFunction(Function &F) {
auto &TM = TPC->getTM<X86TargetMachine>();
ST = TM.getSubtargetImpl(F);
- DL = &F.getParent()->getDataLayout();
+ DL = &F.getDataLayout();
bool MadeChange = false;
for (auto &BB : F) {
diff --git a/llvm/lib/Target/X86/X86TargetTransformInfo.h b/llvm/lib/Target/X86/X86TargetTransformInfo.h
index e6bb4720071d5..5eccb1aea308d 100644
--- a/llvm/lib/Target/X86/X86TargetTransformInfo.h
+++ b/llvm/lib/Target/X86/X86TargetTransformInfo.h
@@ -111,7 +111,7 @@ class X86TTIImpl : public BasicTTIImplBase<X86TTIImpl> {
public:
explicit X86TTIImpl(const X86TargetMachine *TM, const Function &F)
- : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)),
+ : BaseT(TM, F.getDataLayout()), ST(TM->getSubtargetImpl(F)),
TLI(ST->getTargetLowering()) {}
/// \name Scalar TTI Implementations
diff --git a/llvm/lib/Target/XCore/XCoreISelLowering.cpp b/llvm/lib/Target/XCore/XCoreISelLowering.cpp
index 18feeaadb03c8..f889f0b26e9af 100644
--- a/llvm/lib/Target/XCore/XCoreISelLowering.cpp
+++ b/llvm/lib/Target/XCore/XCoreISelLowering.cpp
@@ -264,7 +264,7 @@ static bool IsSmallObject(const GlobalValue *GV, const XCoreTargetLowering &XTL)
if (!ObjType->isSized())
return false;
- auto &DL = GV->getParent()->getDataLayout();
+ auto &DL = GV->getDataLayout();
unsigned ObjSize = DL.getTypeAllocSize(ObjType);
return ObjSize < CodeModelLargeSize && ObjSize != 0;
}
diff --git a/llvm/lib/Target/XCore/XCoreTargetObjectFile.cpp b/llvm/lib/Target/XCore/XCoreTargetObjectFile.cpp
index ae697f43b0eed..d0f9cce105e14 100644
--- a/llvm/lib/Target/XCore/XCoreTargetObjectFile.cpp
+++ b/llvm/lib/Target/XCore/XCoreTargetObjectFile.cpp
@@ -118,7 +118,7 @@ MCSection *XCoreTargetObjectFile::SelectSectionForGlobal(
if (Kind.isMergeableConst16()) return MergeableConst16Section;
}
Type *ObjType = GO->getValueType();
- auto &DL = GO->getParent()->getDataLayout();
+ auto &DL = GO->getDataLayout();
if (TM.getCodeModel() == CodeModel::Small || !ObjType->isSized() ||
DL.getTypeAllocSize(ObjType) < CodeModelLargeSize) {
if (Kind.isReadOnly()) return UseCPRel? ReadOnlySection
diff --git a/llvm/lib/Target/XCore/XCoreTargetTransformInfo.h b/llvm/lib/Target/XCore/XCoreTargetTransformInfo.h
index 58df1f290ec9d..2f39884c1c917 100644
--- a/llvm/lib/Target/XCore/XCoreTargetTransformInfo.h
+++ b/llvm/lib/Target/XCore/XCoreTargetTransformInfo.h
@@ -37,7 +37,7 @@ class XCoreTTIImpl : public BasicTTIImplBase<XCoreTTIImpl> {
public:
explicit XCoreTTIImpl(const XCoreTargetMachine *TM, const Function &F)
- : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl()),
+ : BaseT(TM, F.getDataLayout()), ST(TM->getSubtargetImpl()),
TLI(ST->getTargetLowering()) {}
unsigned getNumberOfRegisters(unsigned ClassID) const {
diff --git a/llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp b/llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
index c7e84a009221f..8e4c50d22a20d 100644
--- a/llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
+++ b/llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
@@ -1152,7 +1152,7 @@ static bool foldUnusualPatterns(Function &F, DominatorTree &DT,
if (!DT.isReachableFromEntry(&BB))
continue;
- const DataLayout &DL = F.getParent()->getDataLayout();
+ const DataLayout &DL = F.getDataLayout();
// Walk the block backwards for efficiency. We're matching a chain of
// use->defs, so we're more likely to succeed by starting from the bottom.
@@ -1188,7 +1188,7 @@ static bool runImpl(Function &F, AssumptionCache &AC, TargetTransformInfo &TTI,
TargetLibraryInfo &TLI, DominatorTree &DT,
AliasAnalysis &AA, bool &MadeCFGChange) {
bool MadeChange = false;
- const DataLayout &DL = F.getParent()->getDataLayout();
+ const DataLayout &DL = F.getDataLayout();
TruncInstCombine TIC(AC, TLI, DL, DT);
MadeChange |= TIC.run(F);
MadeChange |= foldUnusualPatterns(F, DT, TTI, TLI, AA, AC, MadeCFGChange);
diff --git a/llvm/lib/Transforms/Coroutines/CoroElide.cpp b/llvm/lib/Transforms/Coroutines/CoroElide.cpp
index 74b5ccb7b9b71..598ef7779d771 100644
--- a/llvm/lib/Transforms/Coroutines/CoroElide.cpp
+++ b/llvm/lib/Transforms/Coroutines/CoroElide.cpp
@@ -236,7 +236,7 @@ void CoroIdElider::elideHeapAllocations(uint64_t FrameSize, Align FrameAlign) {
// is spilled into the coroutine frame and recreate the alignment information
// here. Possibly we will need to do a mini SROA here and break the coroutine
// frame into individual AllocaInst recreating the original alignment.
- const DataLayout &DL = FEI.ContainingFunction->getParent()->getDataLayout();
+ const DataLayout &DL = FEI.ContainingFunction->getDataLayout();
auto FrameTy = ArrayType::get(Type::getInt8Ty(C), FrameSize);
auto *Frame = new AllocaInst(FrameTy, DL.getAllocaAddrSpace(), "", InsertPt);
Frame->setAlignment(FrameAlign);
diff --git a/llvm/lib/Transforms/Coroutines/CoroFrame.cpp b/llvm/lib/Transforms/Coroutines/CoroFrame.cpp
index 495dd1091210a..73e30ea00a0e2 100644
--- a/llvm/lib/Transforms/Coroutines/CoroFrame.cpp
+++ b/llvm/lib/Transforms/Coroutines/CoroFrame.cpp
@@ -1153,7 +1153,7 @@ static void buildFrameDebugInfo(Function &F, coro::Shape &Shape,
llvm::DINodeArray());
StructType *FrameTy = Shape.FrameTy;
SmallVector<Metadata *, 16> Elements;
- DataLayout Layout = F.getParent()->getDataLayout();
+ DataLayout Layout = F.getDataLayout();
DenseMap<Value *, DILocalVariable *> DIVarCache;
cacheDIVar(FrameData, DIVarCache);
@@ -1300,7 +1300,7 @@ static void buildFrameDebugInfo(Function &F, coro::Shape &Shape,
static StructType *buildFrameType(Function &F, coro::Shape &Shape,
FrameDataInfo &FrameData) {
LLVMContext &C = F.getContext();
- const DataLayout &DL = F.getParent()->getDataLayout();
+ const DataLayout &DL = F.getDataLayout();
StructType *FrameTy = [&] {
SmallString<32> Name(F.getName());
Name.append(".Frame");
diff --git a/llvm/lib/Transforms/Coroutines/CoroSplit.cpp b/llvm/lib/Transforms/Coroutines/CoroSplit.cpp
index 5a58a99d2879e..299b514d34f1c 100644
--- a/llvm/lib/Transforms/Coroutines/CoroSplit.cpp
+++ b/llvm/lib/Transforms/Coroutines/CoroSplit.cpp
@@ -1790,7 +1790,7 @@ static void splitRetconCoroutine(Function &F, coro::Shape &Shape,
IRBuilder<> Builder(Id);
// Determine the size of the frame.
- const DataLayout &DL = F.getParent()->getDataLayout();
+ const DataLayout &DL = F.getDataLayout();
auto Size = DL.getTypeAllocSize(Shape.FrameTy);
// Allocate. We don't need to update the call graph node because we're
diff --git a/llvm/lib/Transforms/IPO/ArgumentPromotion.cpp b/llvm/lib/Transforms/IPO/ArgumentPromotion.cpp
index 3aa8ea3f51471..6985a67c06862 100644
--- a/llvm/lib/Transforms/IPO/ArgumentPromotion.cpp
+++ b/llvm/lib/Transforms/IPO/ArgumentPromotion.cpp
@@ -203,7 +203,7 @@ doPromotion(Function *F, FunctionAnalysisManager &FAM,
// Loop over all the callers of the function, transforming the call sites to
// pass in the loaded pointers.
SmallVector<Value *, 16> Args;
- const DataLayout &DL = F->getParent()->getDataLayout();
+ const DataLayout &DL = F->getDataLayout();
SmallVector<WeakTrackingVH, 16> DeadArgs;
while (!F->use_empty()) {
@@ -426,7 +426,7 @@ static bool allCallersPassValidPointerForArgument(Argument *Arg,
Align NeededAlign,
uint64_t NeededDerefBytes) {
Function *Callee = Arg->getParent();
- const DataLayout &DL = Callee->getParent()->getDataLayout();
+ const DataLayout &DL = Callee->getDataLayout();
APInt Bytes(64, NeededDerefBytes);
// Check if the argument itself is marked dereferenceable and aligned.
@@ -754,7 +754,7 @@ static Function *promoteArguments(Function *F, FunctionAnalysisManager &FAM,
if (BB.getTerminatingMustTailCall())
return nullptr;
- const DataLayout &DL = F->getParent()->getDataLayout();
+ const DataLayout &DL = F->getDataLayout();
auto &AAR = FAM.getResult<AAManager>(*F);
const auto &TTI = FAM.getResult<TargetIRAnalysis>(*F);
diff --git a/llvm/lib/Transforms/IPO/AttributorAttributes.cpp b/llvm/lib/Transforms/IPO/AttributorAttributes.cpp
index a0be24bb8c6d2..7997bd8686472 100644
--- a/llvm/lib/Transforms/IPO/AttributorAttributes.cpp
+++ b/llvm/lib/Transforms/IPO/AttributorAttributes.cpp
@@ -7470,7 +7470,7 @@ struct AAPrivatizablePtrArgument final : public AAPrivatizablePtrImpl {
assert(PrivType && "Expected privatizable type!");
IRBuilder<NoFolder> IRB(IP->getParent(), IP);
- const DataLayout &DL = F.getParent()->getDataLayout();
+ const DataLayout &DL = F.getDataLayout();
// Traverse the type, build GEPs and stores.
if (auto *PrivStructType = dyn_cast<StructType>(PrivType)) {
diff --git a/llvm/lib/Transforms/IPO/ConstantMerge.cpp b/llvm/lib/Transforms/IPO/ConstantMerge.cpp
index ced04bd6f599c..a1face0a6a9c3 100644
--- a/llvm/lib/Transforms/IPO/ConstantMerge.cpp
+++ b/llvm/lib/Transforms/IPO/ConstantMerge.cpp
@@ -85,7 +85,7 @@ static void copyDebugLocMetadata(const GlobalVariable *From,
static Align getAlign(GlobalVariable *GV) {
return GV->getAlign().value_or(
- GV->getParent()->getDataLayout().getPreferredAlign(GV));
+ GV->getDataLayout().getPreferredAlign(GV));
}
static bool
diff --git a/llvm/lib/Transforms/IPO/FunctionAttrs.cpp b/llvm/lib/Transforms/IPO/FunctionAttrs.cpp
index 26a4508aa1513..7b419d0f098b5 100644
--- a/llvm/lib/Transforms/IPO/FunctionAttrs.cpp
+++ b/llvm/lib/Transforms/IPO/FunctionAttrs.cpp
@@ -1169,7 +1169,7 @@ static bool isReturnNonNull(Function *F, const SCCNodeSet &SCCNodes,
if (auto *Ret = dyn_cast<ReturnInst>(BB.getTerminator()))
FlowsToReturn.insert(Ret->getReturnValue());
- auto &DL = F->getParent()->getDataLayout();
+ auto &DL = F->getDataLayout();
for (unsigned i = 0; i != FlowsToReturn.size(); ++i) {
Value *RetVal = FlowsToReturn[i];
@@ -1311,7 +1311,7 @@ static void addNoUndefAttrs(const SCCNodeSet &SCCNodes,
if (F->getReturnType()->isVoidTy())
continue;
- const DataLayout &DL = F->getParent()->getDataLayout();
+ const DataLayout &DL = F->getDataLayout();
if (all_of(*F, [&](BasicBlock &BB) {
if (auto *Ret = dyn_cast<ReturnInst>(BB.getTerminator())) {
// TODO: perform context-sensitive analysis?
diff --git a/llvm/lib/Transforms/IPO/GlobalOpt.cpp b/llvm/lib/Transforms/IPO/GlobalOpt.cpp
index 411a8454bf18b..ab1e41ebf9a9d 100644
--- a/llvm/lib/Transforms/IPO/GlobalOpt.cpp
+++ b/llvm/lib/Transforms/IPO/GlobalOpt.cpp
@@ -1213,7 +1213,7 @@ static bool TryToShrinkGlobalToBoolean(GlobalVariable *GV, Constant *OtherVal) {
for(auto *GVe : GVs){
DIGlobalVariable *DGV = GVe->getVariable();
DIExpression *E = GVe->getExpression();
- const DataLayout &DL = GV->getParent()->getDataLayout();
+ const DataLayout &DL = GV->getDataLayout();
unsigned SizeInOctets =
DL.getTypeAllocSizeInBits(NewGV->getValueType()) / 8;
@@ -1356,7 +1356,7 @@ static bool isPointerValueDeadOnEntryToFunction(
//
// We don't do an exhaustive search for memory operations - simply look
// through bitcasts as they're quite common and benign.
- const DataLayout &DL = GV->getParent()->getDataLayout();
+ const DataLayout &DL = GV->getDataLayout();
SmallVector<LoadInst *, 4> Loads;
SmallVector<StoreInst *, 4> Stores;
for (auto *U : GV->users()) {
@@ -1452,7 +1452,7 @@ processInternalGlobal(GlobalVariable *GV, const GlobalStatus &GS,
function_ref<TargetTransformInfo &(Function &)> GetTTI,
function_ref<TargetLibraryInfo &(Function &)> GetTLI,
function_ref<DominatorTree &(Function &)> LookupDomTree) {
- auto &DL = GV->getParent()->getDataLayout();
+ auto &DL = GV->getDataLayout();
// If this is a first class global and has only one accessing function and
// this function is non-recursive, we replace the global with a local alloca
// in this function.
@@ -1469,7 +1469,7 @@ processInternalGlobal(GlobalVariable *GV, const GlobalStatus &GS,
GS.AccessingFunction->doesNotRecurse() &&
isPointerValueDeadOnEntryToFunction(GS.AccessingFunction, GV,
LookupDomTree)) {
- const DataLayout &DL = GV->getParent()->getDataLayout();
+ const DataLayout &DL = GV->getDataLayout();
LLVM_DEBUG(dbgs() << "LOCALIZING GLOBAL: " << *GV << "\n");
BasicBlock::iterator FirstI =
@@ -1540,7 +1540,7 @@ processInternalGlobal(GlobalVariable *GV, const GlobalStatus &GS,
++NumMarked;
}
if (!GV->getInitializer()->getType()->isSingleValueType()) {
- const DataLayout &DL = GV->getParent()->getDataLayout();
+ const DataLayout &DL = GV->getDataLayout();
if (SRAGlobal(GV, DL))
return true;
}
diff --git a/llvm/lib/Transforms/IPO/GlobalSplit.cpp b/llvm/lib/Transforms/IPO/GlobalSplit.cpp
index dced3a5fdc787..fd49b745fd750 100644
--- a/llvm/lib/Transforms/IPO/GlobalSplit.cpp
+++ b/llvm/lib/Transforms/IPO/GlobalSplit.cpp
@@ -47,7 +47,7 @@ static bool splitGlobal(GlobalVariable &GV) {
if (!Init)
return false;
- const DataLayout &DL = GV.getParent()->getDataLayout();
+ const DataLayout &DL = GV.getDataLayout();
const StructLayout *SL = DL.getStructLayout(Init->getType());
ArrayRef<TypeSize> MemberOffsets = SL->getMemberOffsets();
unsigned IndexWidth = DL.getIndexTypeSizeInBits(GV.getType());
diff --git a/llvm/lib/Transforms/IPO/PartialInlining.cpp b/llvm/lib/Transforms/IPO/PartialInlining.cpp
index aa4f205ec5bdf..3ca095e1520f3 100644
--- a/llvm/lib/Transforms/IPO/PartialInlining.cpp
+++ b/llvm/lib/Transforms/IPO/PartialInlining.cpp
@@ -764,7 +764,7 @@ bool PartialInlinerImpl::shouldPartialInline(
});
return false;
}
- const DataLayout &DL = Caller->getParent()->getDataLayout();
+ const DataLayout &DL = Caller->getDataLayout();
// The savings of eliminating the call:
int NonWeightedSavings = getCallsiteCost(CalleeTTI, CB, DL);
@@ -804,7 +804,7 @@ InstructionCost
PartialInlinerImpl::computeBBInlineCost(BasicBlock *BB,
TargetTransformInfo *TTI) {
InstructionCost InlineCost = 0;
- const DataLayout &DL = BB->getParent()->getParent()->getDataLayout();
+ const DataLayout &DL = BB->getDataLayout();
int InstrCost = InlineConstants::getInstrCost();
for (Instruction &I : BB->instructionsWithoutDebug()) {
// Skip free instructions.
diff --git a/llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp b/llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
index 9929ebb96dcaf..9de0432695b50 100644
--- a/llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
+++ b/llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
@@ -311,7 +311,7 @@ void wholeprogramdevirt::setAfterReturnValues(
VirtualCallTarget::VirtualCallTarget(GlobalValue *Fn, const TypeMemberInfo *TM)
: Fn(Fn), TM(TM),
- IsBigEndian(Fn->getParent()->getDataLayout().isBigEndian()),
+ IsBigEndian(Fn->getDataLayout().isBigEndian()),
WasDevirt(false) {}
namespace {
diff --git a/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp b/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
index 2aecedc51f032..0908a60cb259f 100644
--- a/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
@@ -5342,7 +5342,7 @@ static bool combineInstructionsOverFunction(
DominatorTree &DT, OptimizationRemarkEmitter &ORE, BlockFrequencyInfo *BFI,
BranchProbabilityInfo *BPI, ProfileSummaryInfo *PSI, LoopInfo *LI,
const InstCombineOptions &Opts) {
- auto &DL = F.getParent()->getDataLayout();
+ auto &DL = F.getDataLayout();
/// Builder - This is an IRBuilder that automatically inserts new
/// instructions into the worklist when they are created.
diff --git a/llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp b/llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
index 62aff78a8f169..adf77f20cb1c7 100644
--- a/llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
+++ b/llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
@@ -3042,7 +3042,7 @@ bool AddressSanitizer::instrumentFunction(Function &F,
bool UseCalls = (InstrumentationWithCallsThreshold >= 0 &&
OperandsToInstrument.size() + IntrinToInstrument.size() >
(unsigned)InstrumentationWithCallsThreshold);
- const DataLayout &DL = F.getParent()->getDataLayout();
+ const DataLayout &DL = F.getDataLayout();
ObjectSizeOpts ObjSizeOpts;
ObjSizeOpts.RoundToAlign = true;
ObjectSizeOffsetVisitor ObjSizeVis(DL, TLI, F.getContext(), ObjSizeOpts);
@@ -3052,7 +3052,7 @@ bool AddressSanitizer::instrumentFunction(Function &F,
for (auto &Operand : OperandsToInstrument) {
if (!suppressInstrumentationSiteForDebug(NumInstrumented))
instrumentMop(ObjSizeVis, Operand, UseCalls,
- F.getParent()->getDataLayout(), RTCI);
+ F.getDataLayout(), RTCI);
FunctionModified = true;
}
for (auto *Inst : IntrinToInstrument) {
@@ -3148,7 +3148,7 @@ void FunctionStackPoisoner::copyToShadowInline(ArrayRef<uint8_t> ShadowMask,
const size_t LargestStoreSizeInBytes =
std::min<size_t>(sizeof(uint64_t), ASan.LongSize / 8);
- const bool IsLittleEndian = F.getParent()->getDataLayout().isLittleEndian();
+ const bool IsLittleEndian = F.getDataLayout().isLittleEndian();
// Poison given range in shadow using larges store size with out leading and
// trailing zeros in ShadowMask. Zeros never change, so they need neither
@@ -3246,7 +3246,7 @@ void FunctionStackPoisoner::copyArgsPassedByValToAllocas() {
assert(CopyInsertPoint);
}
IRBuilder<> IRB(CopyInsertPoint);
- const DataLayout &DL = F.getParent()->getDataLayout();
+ const DataLayout &DL = F.getDataLayout();
for (Argument &Arg : F.args()) {
if (Arg.hasByValAttr()) {
Type *Ty = Arg.getParamByValType();
@@ -3704,7 +3704,7 @@ void FunctionStackPoisoner::handleDynamicAllocaCall(AllocaInst *AI) {
// ElementSize size, get allocated memory size in bytes by
// OldSize * ElementSize.
const unsigned ElementSize =
- F.getParent()->getDataLayout().getTypeAllocSize(AI->getAllocatedType());
+ F.getDataLayout().getTypeAllocSize(AI->getAllocatedType());
Value *OldSize =
IRB.CreateMul(IRB.CreateIntCast(AI->getArraySize(), IntptrTy, false),
ConstantInt::get(IntptrTy, ElementSize));
diff --git a/llvm/lib/Transforms/Instrumentation/BoundsChecking.cpp b/llvm/lib/Transforms/Instrumentation/BoundsChecking.cpp
index cfa8ae26c6257..618b6fe1aea47 100644
--- a/llvm/lib/Transforms/Instrumentation/BoundsChecking.cpp
+++ b/llvm/lib/Transforms/Instrumentation/BoundsChecking.cpp
@@ -144,7 +144,7 @@ static bool addBoundsChecking(Function &F, TargetLibraryInfo &TLI,
if (F.hasFnAttribute(Attribute::NoSanitizeBounds))
return false;
- const DataLayout &DL = F.getParent()->getDataLayout();
+ const DataLayout &DL = F.getDataLayout();
ObjectSizeOpts EvalOpts;
EvalOpts.RoundToAlign = true;
EvalOpts.EvalMode = ObjectSizeOpts::Mode::ExactUnderlyingSizeAndOffset;
diff --git a/llvm/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp b/llvm/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp
index 33371af133c2a..113d39b4f2af7 100644
--- a/llvm/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp
+++ b/llvm/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp
@@ -789,7 +789,7 @@ class DFSanVisitor : public InstVisitor<DFSanVisitor> {
DFSanVisitor(DFSanFunction &DFSF) : DFSF(DFSF) {}
const DataLayout &getDataLayout() const {
- return DFSF.F->getParent()->getDataLayout();
+ return DFSF.F->getDataLayout();
}
// Combines shadow values and origins for all of I's operands.
@@ -1843,7 +1843,7 @@ void DFSanFunction::setOrigin(Instruction *I, Value *Origin) {
Value *DFSanFunction::getShadowForTLSArgument(Argument *A) {
unsigned ArgOffset = 0;
- const DataLayout &DL = F->getParent()->getDataLayout();
+ const DataLayout &DL = F->getDataLayout();
for (auto &FArg : F->args()) {
if (!FArg.getType()->isSized()) {
if (A == &FArg)
@@ -2470,7 +2470,7 @@ Value *DFSanFunction::updateOrigin(Value *V, IRBuilder<> &IRB) {
Value *DFSanFunction::originToIntptr(IRBuilder<> &IRB, Value *Origin) {
const unsigned OriginSize = DataFlowSanitizer::OriginWidthBytes;
- const DataLayout &DL = F->getParent()->getDataLayout();
+ const DataLayout &DL = F->getDataLayout();
unsigned IntptrSize = DL.getTypeStoreSize(DFS.IntptrTy);
if (IntptrSize == OriginSize)
return Origin;
@@ -2483,7 +2483,7 @@ void DFSanFunction::paintOrigin(IRBuilder<> &IRB, Value *Origin,
Value *StoreOriginAddr,
uint64_t StoreOriginSize, Align Alignment) {
const unsigned OriginSize = DataFlowSanitizer::OriginWidthBytes;
- const DataLayout &DL = F->getParent()->getDataLayout();
+ const DataLayout &DL = F->getDataLayout();
const Align IntptrAlignment = DL.getABITypeAlign(DFS.IntptrTy);
unsigned IntptrSize = DL.getTypeStoreSize(DFS.IntptrTy);
assert(IntptrAlignment >= MinOriginAlignment);
diff --git a/llvm/lib/Transforms/Instrumentation/MemProfiler.cpp b/llvm/lib/Transforms/Instrumentation/MemProfiler.cpp
index 1880928b0d522..5d5e205d45462 100644
--- a/llvm/lib/Transforms/Instrumentation/MemProfiler.cpp
+++ b/llvm/lib/Transforms/Instrumentation/MemProfiler.cpp
@@ -652,7 +652,7 @@ bool MemProfiler::instrumentFunction(Function &F) {
std::optional<InterestingMemoryAccess> Access =
isInterestingMemoryAccess(Inst);
if (Access)
- instrumentMop(Inst, F.getParent()->getDataLayout(), *Access);
+ instrumentMop(Inst, F.getDataLayout(), *Access);
else
instrumentMemIntrinsic(cast<MemIntrinsic>(Inst));
}
diff --git a/llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp b/llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
index f11c1c5933327..905d2671aa43e 100644
--- a/llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
+++ b/llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
@@ -1218,7 +1218,7 @@ struct MemorySanitizerVisitor : public InstVisitor<MemorySanitizerVisitor> {
}
Value *originToIntptr(IRBuilder<> &IRB, Value *Origin) {
- const DataLayout &DL = F.getParent()->getDataLayout();
+ const DataLayout &DL = F.getDataLayout();
unsigned IntptrSize = DL.getTypeStoreSize(MS.IntptrTy);
if (IntptrSize == kOriginSize)
return Origin;
@@ -1230,7 +1230,7 @@ struct MemorySanitizerVisitor : public InstVisitor<MemorySanitizerVisitor> {
/// Fill memory range with the given origin value.
void paintOrigin(IRBuilder<> &IRB, Value *Origin, Value *OriginPtr,
TypeSize TS, Align Alignment) {
- const DataLayout &DL = F.getParent()->getDataLayout();
+ const DataLayout &DL = F.getDataLayout();
const Align IntptrAlignment = DL.getABITypeAlign(MS.IntptrTy);
unsigned IntptrSize = DL.getTypeStoreSize(MS.IntptrTy);
assert(IntptrAlignment >= kMinOriginAlignment);
@@ -1280,7 +1280,7 @@ struct MemorySanitizerVisitor : public InstVisitor<MemorySanitizerVisitor> {
void storeOrigin(IRBuilder<> &IRB, Value *Addr, Value *Shadow, Value *Origin,
Value *OriginPtr, Align Alignment) {
- const DataLayout &DL = F.getParent()->getDataLayout();
+ const DataLayout &DL = F.getDataLayout();
const Align OriginAlignment = std::max(kMinOriginAlignment, Alignment);
TypeSize StoreSize = DL.getTypeStoreSize(Shadow->getType());
Value *ConvertedShadow = convertShadowToScalar(Shadow, IRB);
@@ -1392,7 +1392,7 @@ struct MemorySanitizerVisitor : public InstVisitor<MemorySanitizerVisitor> {
void materializeOneCheck(IRBuilder<> &IRB, Value *ConvertedShadow,
Value *Origin) {
- const DataLayout &DL = F.getParent()->getDataLayout();
+ const DataLayout &DL = F.getDataLayout();
TypeSize TypeSizeInBits = DL.getTypeSizeInBits(ConvertedShadow->getType());
unsigned SizeIndex = TypeSizeToSizeIndex(TypeSizeInBits);
if (instrumentWithCalls(ConvertedShadow) &&
@@ -1419,7 +1419,7 @@ struct MemorySanitizerVisitor : public InstVisitor<MemorySanitizerVisitor> {
void materializeInstructionChecks(
ArrayRef<ShadowOriginAndInsertPoint> InstructionChecks) {
- const DataLayout &DL = F.getParent()->getDataLayout();
+ const DataLayout &DL = F.getDataLayout();
// Disable combining in some cases. TrackOrigins checks each shadow to pick
// correct origin.
bool Combine = !MS.TrackOrigins;
@@ -1579,7 +1579,7 @@ struct MemorySanitizerVisitor : public InstVisitor<MemorySanitizerVisitor> {
// This may return weird-sized types like i1.
if (IntegerType *IT = dyn_cast<IntegerType>(OrigTy))
return IT;
- const DataLayout &DL = F.getParent()->getDataLayout();
+ const DataLayout &DL = F.getDataLayout();
if (VectorType *VT = dyn_cast<VectorType>(OrigTy)) {
uint32_t EltSize = DL.getTypeSizeInBits(VT->getElementType());
return VectorType::get(IntegerType::get(*MS.C, EltSize),
@@ -1775,7 +1775,7 @@ struct MemorySanitizerVisitor : public InstVisitor<MemorySanitizerVisitor> {
Type *ShadowTy,
bool isStore) {
Value *ShadowOriginPtrs;
- const DataLayout &DL = F.getParent()->getDataLayout();
+ const DataLayout &DL = F.getDataLayout();
TypeSize Size = DL.getTypeStoreSize(ShadowTy);
FunctionCallee Getter = MS.getKmsanShadowOriginAccessFn(isStore, Size);
@@ -1963,7 +1963,7 @@ struct MemorySanitizerVisitor : public InstVisitor<MemorySanitizerVisitor> {
Function *F = A->getParent();
IRBuilder<> EntryIRB(FnPrologueEnd);
unsigned ArgOffset = 0;
- const DataLayout &DL = F->getParent()->getDataLayout();
+ const DataLayout &DL = F->getDataLayout();
for (auto &FArg : F->args()) {
if (!FArg.getType()->isSized() || FArg.getType()->isScalableTy()) {
LLVM_DEBUG(dbgs() << (FArg.getType()->isScalableTy()
@@ -3676,7 +3676,7 @@ struct MemorySanitizerVisitor : public InstVisitor<MemorySanitizerVisitor> {
if (!MS.TrackOrigins)
return;
- auto &DL = F.getParent()->getDataLayout();
+ auto &DL = F.getDataLayout();
paintOrigin(IRB, getOrigin(V), OriginPtr,
DL.getTypeStoreSize(Shadow->getType()),
std::max(Alignment, kMinOriginAlignment));
@@ -4340,7 +4340,7 @@ struct MemorySanitizerVisitor : public InstVisitor<MemorySanitizerVisitor> {
}
unsigned Size = 0;
- const DataLayout &DL = F.getParent()->getDataLayout();
+ const DataLayout &DL = F.getDataLayout();
bool ByVal = CB.paramHasAttr(i, Attribute::ByVal);
bool NoUndef = CB.paramHasAttr(i, Attribute::NoUndef);
@@ -4576,7 +4576,7 @@ struct MemorySanitizerVisitor : public InstVisitor<MemorySanitizerVisitor> {
if (!InsPoint)
InsPoint = &I;
NextNodeIRBuilder IRB(InsPoint);
- const DataLayout &DL = F.getParent()->getDataLayout();
+ const DataLayout &DL = F.getDataLayout();
TypeSize TS = DL.getTypeAllocSize(I.getAllocatedType());
Value *Len = IRB.CreateTypeSize(MS.IntptrTy, TS);
if (I.isArrayAllocation())
@@ -4798,7 +4798,7 @@ struct MemorySanitizerVisitor : public InstVisitor<MemorySanitizerVisitor> {
// The total number of asm() arguments in the source is nR+nO+nI, and the
// corresponding CallInst has nO+nI+1 operands (the last operand is the
// function to be called).
- const DataLayout &DL = F.getParent()->getDataLayout();
+ const DataLayout &DL = F.getDataLayout();
CallBase *CB = cast<CallBase>(&I);
IRBuilder<> IRB(&I);
InlineAsm *IA = cast<InlineAsm>(CB->getCalledOperand());
@@ -4986,7 +4986,7 @@ struct VarArgAMD64Helper : public VarArgHelperBase {
unsigned GpOffset = 0;
unsigned FpOffset = AMD64GpEndOffset;
unsigned OverflowOffset = AMD64FpEndOffset;
- const DataLayout &DL = F.getParent()->getDataLayout();
+ const DataLayout &DL = F.getDataLayout();
for (const auto &[ArgNo, A] : llvm::enumerate(CB.args())) {
bool IsFixed = ArgNo < CB.getFunctionType()->getNumParams();
@@ -5173,7 +5173,7 @@ struct VarArgMIPS64Helper : public VarArgHelperBase {
void visitCallBase(CallBase &CB, IRBuilder<> &IRB) override {
unsigned VAArgOffset = 0;
- const DataLayout &DL = F.getParent()->getDataLayout();
+ const DataLayout &DL = F.getDataLayout();
for (Value *A :
llvm::drop_begin(CB.args(), CB.getFunctionType()->getNumParams())) {
Triple TargetTriple(F.getParent()->getTargetTriple());
@@ -5304,7 +5304,7 @@ struct VarArgAArch64Helper : public VarArgHelperBase {
unsigned VrOffset = AArch64VrBegOffset;
unsigned OverflowOffset = AArch64VAEndOffset;
- const DataLayout &DL = F.getParent()->getDataLayout();
+ const DataLayout &DL = F.getDataLayout();
for (const auto &[ArgNo, A] : llvm::enumerate(CB.args())) {
bool IsFixed = ArgNo < CB.getFunctionType()->getNumParams();
auto [AK, RegNum] = classifyArgument(A->getType());
@@ -5515,7 +5515,7 @@ struct VarArgPowerPC64Helper : public VarArgHelperBase {
else
VAArgBase = 32;
unsigned VAArgOffset = VAArgBase;
- const DataLayout &DL = F.getParent()->getDataLayout();
+ const DataLayout &DL = F.getDataLayout();
for (const auto &[ArgNo, A] : llvm::enumerate(CB.args())) {
bool IsFixed = ArgNo < CB.getFunctionType()->getNumParams();
bool IsByVal = CB.paramHasAttr(ArgNo, Attribute::ByVal);
@@ -5706,7 +5706,7 @@ struct VarArgSystemZHelper : public VarArgHelperBase {
unsigned FpOffset = SystemZFpOffset;
unsigned VrIndex = 0;
unsigned OverflowOffset = SystemZOverflowOffset;
- const DataLayout &DL = F.getParent()->getDataLayout();
+ const DataLayout &DL = F.getDataLayout();
for (const auto &[ArgNo, A] : llvm::enumerate(CB.args())) {
bool IsFixed = ArgNo < CB.getFunctionType()->getNumParams();
// SystemZABIInfo does not produce ByVal parameters.
diff --git a/llvm/lib/Transforms/Instrumentation/ThreadSanitizer.cpp b/llvm/lib/Transforms/Instrumentation/ThreadSanitizer.cpp
index 2f3de199f51d4..92e533d2281af 100644
--- a/llvm/lib/Transforms/Instrumentation/ThreadSanitizer.cpp
+++ b/llvm/lib/Transforms/Instrumentation/ThreadSanitizer.cpp
@@ -511,7 +511,7 @@ bool ThreadSanitizer::sanitizeFunction(Function &F,
bool Res = false;
bool HasCalls = false;
bool SanitizeFunction = F.hasFnAttribute(Attribute::SanitizeThread);
- const DataLayout &DL = F.getParent()->getDataLayout();
+ const DataLayout &DL = F.getDataLayout();
// Traverse all instructions, collect loads/stores/returns, check for calls.
for (auto &BB : F) {
diff --git a/llvm/lib/Transforms/Scalar/AnnotationRemarks.cpp b/llvm/lib/Transforms/Scalar/AnnotationRemarks.cpp
index b182f46cc5150..5d9a7bca7efec 100644
--- a/llvm/lib/Transforms/Scalar/AnnotationRemarks.cpp
+++ b/llvm/lib/Transforms/Scalar/AnnotationRemarks.cpp
@@ -33,7 +33,7 @@ static void tryEmitAutoInitRemark(ArrayRef<Instruction *> Instructions,
continue;
Function &F = *I->getParent()->getParent();
- const DataLayout &DL = F.getParent()->getDataLayout();
+ const DataLayout &DL = F.getDataLayout();
AutoInitRemark Remark(ORE, REMARK_PASS, DL, TLI);
Remark.visit(I);
}
diff --git a/llvm/lib/Transforms/Scalar/ConstantHoisting.cpp b/llvm/lib/Transforms/Scalar/ConstantHoisting.cpp
index 68774cf31ce9b..1b406515c7883 100644
--- a/llvm/lib/Transforms/Scalar/ConstantHoisting.cpp
+++ b/llvm/lib/Transforms/Scalar/ConstantHoisting.cpp
@@ -948,7 +948,7 @@ bool ConstantHoistingPass::runImpl(Function &Fn, TargetTransformInfo &TTI,
this->TTI = &TTI;
this->DT = &DT;
this->BFI = BFI;
- this->DL = &Fn.getParent()->getDataLayout();
+ this->DL = &Fn.getDataLayout();
this->Ctx = &Fn.getContext();
this->Entry = &Entry;
this->PSI = PSI;
diff --git a/llvm/lib/Transforms/Scalar/ConstraintElimination.cpp b/llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
index 70bfa469193bf..05012321d7244 100644
--- a/llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
+++ b/llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
@@ -1640,7 +1640,7 @@ static bool eliminateConstraints(Function &F, DominatorTree &DT, LoopInfo &LI,
SmallVector<Value *> FunctionArgs;
for (Value &Arg : F.args())
FunctionArgs.push_back(&Arg);
- ConstraintInfo Info(F.getParent()->getDataLayout(), FunctionArgs);
+ ConstraintInfo Info(F.getDataLayout(), FunctionArgs);
State S(DT, LI, SE);
std::unique_ptr<Module> ReproducerModule(
DumpReproducers ? new Module(F.getName(), F.getContext()) : nullptr);
diff --git a/llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp b/llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
index 8cad040813ac7..5457f6c13174d 100644
--- a/llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
+++ b/llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
@@ -870,7 +870,7 @@ struct DSEState {
PostDominatorTree &PDT, const TargetLibraryInfo &TLI,
const LoopInfo &LI)
: F(F), AA(AA), EI(DT, &LI), BatchAA(AA, &EI), MSSA(MSSA), DT(DT),
- PDT(PDT), TLI(TLI), DL(F.getParent()->getDataLayout()), LI(LI) {
+ PDT(PDT), TLI(TLI), DL(F.getDataLayout()), LI(LI) {
// Collect blocks with throwing instructions not modeled in MemorySSA and
// alloc-like objects.
unsigned PO = 0;
diff --git a/llvm/lib/Transforms/Scalar/EarlyCSE.cpp b/llvm/lib/Transforms/Scalar/EarlyCSE.cpp
index f736d429cb638..cf11f5bc885a7 100644
--- a/llvm/lib/Transforms/Scalar/EarlyCSE.cpp
+++ b/llvm/lib/Transforms/Scalar/EarlyCSE.cpp
@@ -1833,7 +1833,7 @@ PreservedAnalyses EarlyCSEPass::run(Function &F,
auto *MSSA =
UseMemorySSA ? &AM.getResult<MemorySSAAnalysis>(F).getMSSA() : nullptr;
- EarlyCSE CSE(F.getParent()->getDataLayout(), TLI, TTI, DT, AC, MSSA);
+ EarlyCSE CSE(F.getDataLayout(), TLI, TTI, DT, AC, MSSA);
if (!CSE.run())
return PreservedAnalyses::all();
@@ -1887,7 +1887,7 @@ class EarlyCSELegacyCommonPass : public FunctionPass {
auto *MSSA =
UseMemorySSA ? &getAnalysis<MemorySSAWrapperPass>().getMSSA() : nullptr;
- EarlyCSE CSE(F.getParent()->getDataLayout(), TLI, TTI, DT, AC, MSSA);
+ EarlyCSE CSE(F.getDataLayout(), TLI, TTI, DT, AC, MSSA);
return CSE.run();
}
diff --git a/llvm/lib/Transforms/Scalar/Float2Int.cpp b/llvm/lib/Transforms/Scalar/Float2Int.cpp
index da4d39b4e3ed4..a4a1438dbe41a 100644
--- a/llvm/lib/Transforms/Scalar/Float2Int.cpp
+++ b/llvm/lib/Transforms/Scalar/Float2Int.cpp
@@ -497,7 +497,7 @@ bool Float2IntPass::runImpl(Function &F, const DominatorTree &DT) {
walkBackwards();
walkForwards();
- const DataLayout &DL = F.getParent()->getDataLayout();
+ const DataLayout &DL = F.getDataLayout();
bool Modified = validateAndTransform(DL);
if (Modified)
cleanup();
diff --git a/llvm/lib/Transforms/Scalar/GVN.cpp b/llvm/lib/Transforms/Scalar/GVN.cpp
index f2eaf48338e1e..db39d8621d077 100644
--- a/llvm/lib/Transforms/Scalar/GVN.cpp
+++ b/llvm/lib/Transforms/Scalar/GVN.cpp
@@ -2477,7 +2477,7 @@ bool GVNPass::propagateEquality(Value *LHS, Value *RHS,
assert((isa<Argument>(LHS) || isa<Instruction>(LHS)) && "Unexpected value!");
const DataLayout &DL =
isa<Argument>(LHS)
- ? cast<Argument>(LHS)->getParent()->getParent()->getDataLayout()
+ ? cast<Argument>(LHS)->getParent()->getDataLayout()
: cast<Instruction>(LHS)->getDataLayout();
// If there is no obvious reason to prefer the left-hand side over the
diff --git a/llvm/lib/Transforms/Scalar/IndVarSimplify.cpp b/llvm/lib/Transforms/Scalar/IndVarSimplify.cpp
index e22d29ef8f092..5e2131b0b1807 100644
--- a/llvm/lib/Transforms/Scalar/IndVarSimplify.cpp
+++ b/llvm/lib/Transforms/Scalar/IndVarSimplify.cpp
@@ -2062,7 +2062,7 @@ PreservedAnalyses IndVarSimplifyPass::run(Loop &L, LoopAnalysisManager &AM,
LoopStandardAnalysisResults &AR,
LPMUpdater &) {
Function *F = L.getHeader()->getParent();
- const DataLayout &DL = F->getParent()->getDataLayout();
+ const DataLayout &DL = F->getDataLayout();
IndVarSimplify IVS(&AR.LI, &AR.SE, &AR.DT, DL, &AR.TLI, &AR.TTI, AR.MSSA,
WidenIndVars && AllowIVWidening);
diff --git a/llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp b/llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp
index fbefd0e9368b2..5074d049d2521 100644
--- a/llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp
+++ b/llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp
@@ -821,7 +821,7 @@ unsigned InferAddressSpacesImpl::joinAddressSpaces(unsigned AS1,
}
bool InferAddressSpacesImpl::run(Function &F) {
- DL = &F.getParent()->getDataLayout();
+ DL = &F.getDataLayout();
if (AssumeDefaultIsFlatAddressSpace)
FlatAddrSpace = 0;
diff --git a/llvm/lib/Transforms/Scalar/InferAlignment.cpp b/llvm/lib/Transforms/Scalar/InferAlignment.cpp
index b75b8d486fbbe..6e0c206bd1980 100644
--- a/llvm/lib/Transforms/Scalar/InferAlignment.cpp
+++ b/llvm/lib/Transforms/Scalar/InferAlignment.cpp
@@ -48,7 +48,7 @@ static bool tryToImproveAlign(
}
bool inferAlignment(Function &F, AssumptionCache &AC, DominatorTree &DT) {
- const DataLayout &DL = F.getParent()->getDataLayout();
+ const DataLayout &DL = F.getDataLayout();
bool Changed = false;
// Enforce preferred type alignment if possible. We do this as a separate
diff --git a/llvm/lib/Transforms/Scalar/InstSimplifyPass.cpp b/llvm/lib/Transforms/Scalar/InstSimplifyPass.cpp
index ee9452ce1c7d4..326849a4eb395 100644
--- a/llvm/lib/Transforms/Scalar/InstSimplifyPass.cpp
+++ b/llvm/lib/Transforms/Scalar/InstSimplifyPass.cpp
@@ -99,7 +99,7 @@ struct InstSimplifyLegacyPass : public FunctionPass {
&getAnalysis<TargetLibraryInfoWrapperPass>().getTLI(F);
AssumptionCache *AC =
&getAnalysis<AssumptionCacheTracker>().getAssumptionCache(F);
- const DataLayout &DL = F.getParent()->getDataLayout();
+ const DataLayout &DL = F.getDataLayout();
const SimplifyQuery SQ(DL, TLI, DT, AC);
return runImpl(F, SQ);
}
@@ -125,7 +125,7 @@ PreservedAnalyses InstSimplifyPass::run(Function &F,
auto &DT = AM.getResult<DominatorTreeAnalysis>(F);
auto &TLI = AM.getResult<TargetLibraryAnalysis>(F);
auto &AC = AM.getResult<AssumptionAnalysis>(F);
- const DataLayout &DL = F.getParent()->getDataLayout();
+ const DataLayout &DL = F.getDataLayout();
const SimplifyQuery SQ(DL, &TLI, &DT, &AC);
bool Changed = runImpl(F, SQ);
if (!Changed)
diff --git a/llvm/lib/Transforms/Scalar/JumpTableToSwitch.cpp b/llvm/lib/Transforms/Scalar/JumpTableToSwitch.cpp
index f9712dbbf68a6..2a4f68e125252 100644
--- a/llvm/lib/Transforms/Scalar/JumpTableToSwitch.cpp
+++ b/llvm/lib/Transforms/Scalar/JumpTableToSwitch.cpp
@@ -53,7 +53,7 @@ static std::optional<JumpTableTy> parseJumpTable(GetElementPtrInst *GEP,
return std::nullopt;
Function &F = *GEP->getParent()->getParent();
- const DataLayout &DL = F.getParent()->getDataLayout();
+ const DataLayout &DL = F.getDataLayout();
const unsigned BitWidth =
DL.getIndexSizeInBits(GEP->getPointerAddressSpace());
MapVector<Value *, APInt> VariableOffsets;
diff --git a/llvm/lib/Transforms/Scalar/LoopBoundSplit.cpp b/llvm/lib/Transforms/Scalar/LoopBoundSplit.cpp
index 9a27a08c86eb4..6092cd1bc08be 100644
--- a/llvm/lib/Transforms/Scalar/LoopBoundSplit.cpp
+++ b/llvm/lib/Transforms/Scalar/LoopBoundSplit.cpp
@@ -405,7 +405,7 @@ static bool splitLoopBound(Loop &L, DominatorTree &DT, LoopInfo &LI,
: SE.getUMinExpr(NewBoundSCEV, SplitBoundSCEV);
SCEVExpander Expander(
- SE, L.getHeader()->getParent()->getParent()->getDataLayout(), "split");
+ SE, L.getHeader()->getDataLayout(), "split");
Instruction *InsertPt = SplitLoopPH->getTerminator();
Value *NewBoundValue =
Expander.expandCodeFor(NewBoundSCEV, NewBoundSCEV->getType(), InsertPt);
diff --git a/llvm/lib/Transforms/Scalar/LoopFlatten.cpp b/llvm/lib/Transforms/Scalar/LoopFlatten.cpp
index bb9632ff73a42..715f63b836c68 100644
--- a/llvm/lib/Transforms/Scalar/LoopFlatten.cpp
+++ b/llvm/lib/Transforms/Scalar/LoopFlatten.cpp
@@ -644,7 +644,7 @@ static bool checkIVUsers(FlattenInfo &FI) {
static OverflowResult checkOverflow(FlattenInfo &FI, DominatorTree *DT,
AssumptionCache *AC) {
Function *F = FI.OuterLoop->getHeader()->getParent();
- const DataLayout &DL = F->getParent()->getDataLayout();
+ const DataLayout &DL = F->getDataLayout();
// For debugging/testing.
if (AssumeNoOverflow)
diff --git a/llvm/lib/Transforms/Scalar/LoopFuse.cpp b/llvm/lib/Transforms/Scalar/LoopFuse.cpp
index e0b224d5ef735..22ae970a52ea7 100644
--- a/llvm/lib/Transforms/Scalar/LoopFuse.cpp
+++ b/llvm/lib/Transforms/Scalar/LoopFuse.cpp
@@ -2072,7 +2072,7 @@ PreservedAnalyses LoopFusePass::run(Function &F, FunctionAnalysisManager &AM) {
auto &ORE = AM.getResult<OptimizationRemarkEmitterAnalysis>(F);
auto &AC = AM.getResult<AssumptionAnalysis>(F);
const TargetTransformInfo &TTI = AM.getResult<TargetIRAnalysis>(F);
- const DataLayout &DL = F.getParent()->getDataLayout();
+ const DataLayout &DL = F.getDataLayout();
// Ensure loops are in simplifed form which is a pre-requisite for loop fusion
// pass. Added only for new PM since the legacy PM has already added
diff --git a/llvm/lib/Transforms/Scalar/LowerConstantIntrinsics.cpp b/llvm/lib/Transforms/Scalar/LowerConstantIntrinsics.cpp
index b167120a906df..939c36164f781 100644
--- a/llvm/lib/Transforms/Scalar/LowerConstantIntrinsics.cpp
+++ b/llvm/lib/Transforms/Scalar/LowerConstantIntrinsics.cpp
@@ -103,7 +103,7 @@ static bool lowerConstantIntrinsics(Function &F, const TargetLibraryInfo &TLI,
DTU.emplace(DT, DomTreeUpdater::UpdateStrategy::Lazy);
bool HasDeadBlocks = false;
- const auto &DL = F.getParent()->getDataLayout();
+ const auto &DL = F.getDataLayout();
SmallVector<WeakTrackingVH, 8> Worklist;
ReversePostOrderTraversal<Function *> RPOT(&F);
diff --git a/llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp b/llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp
index cb97ed5401edf..6a681fd933971 100644
--- a/llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp
+++ b/llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp
@@ -521,7 +521,7 @@ class LowerMatrixIntrinsics {
LowerMatrixIntrinsics(Function &F, TargetTransformInfo &TTI,
AliasAnalysis *AA, DominatorTree *DT, LoopInfo *LI,
OptimizationRemarkEmitter *ORE)
- : Func(F), DL(F.getParent()->getDataLayout()), TTI(TTI), AA(AA), DT(DT),
+ : Func(F), DL(F.getDataLayout()), TTI(TTI), AA(AA), DT(DT),
LI(LI), ORE(ORE) {}
unsigned getNumOps(Type *VT) {
@@ -2462,7 +2462,7 @@ class LowerMatrixIntrinsics {
RemarkGenerator(const MapVector<Value *, MatrixTy> &Inst2Matrix,
OptimizationRemarkEmitter &ORE, Function &Func)
: Inst2Matrix(Inst2Matrix), ORE(ORE), Func(Func),
- DL(Func.getParent()->getDataLayout()) {}
+ DL(Func.getDataLayout()) {}
/// Return all leaves of the expressions in \p ExprsInSubprogram. Those are
/// instructions in Inst2Matrix returning void or without any users in
diff --git a/llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp b/llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
index 04d908312cff2..2d75a6f14d72a 100644
--- a/llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
+++ b/llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
@@ -1815,7 +1815,7 @@ bool MemCpyOptPass::processMemMove(MemMoveInst *M) {
/// This is called on every byval argument in call sites.
bool MemCpyOptPass::processByValArgument(CallBase &CB, unsigned ArgNo) {
- const DataLayout &DL = CB.getCaller()->getParent()->getDataLayout();
+ const DataLayout &DL = CB.getCaller()->getDataLayout();
// Find out what feeds this byval argument.
Value *ByValArg = CB.getArgOperand(ArgNo);
Type *ByValTy = CB.getParamByValType(ArgNo);
@@ -1902,7 +1902,7 @@ bool MemCpyOptPass::processImmutArgument(CallBase &CB, unsigned ArgNo) {
if (!(CB.paramHasAttr(ArgNo, Attribute::NoAlias) &&
CB.paramHasAttr(ArgNo, Attribute::NoCapture)))
return false;
- const DataLayout &DL = CB.getCaller()->getParent()->getDataLayout();
+ const DataLayout &DL = CB.getCaller()->getDataLayout();
Value *ImmutArg = CB.getArgOperand(ArgNo);
// 2. Check that arg is alloca
diff --git a/llvm/lib/Transforms/Scalar/NaryReassociate.cpp b/llvm/lib/Transforms/Scalar/NaryReassociate.cpp
index 224cd24915fac..94e0b026eeef8 100644
--- a/llvm/lib/Transforms/Scalar/NaryReassociate.cpp
+++ b/llvm/lib/Transforms/Scalar/NaryReassociate.cpp
@@ -205,7 +205,7 @@ bool NaryReassociatePass::runImpl(Function &F, AssumptionCache *AC_,
SE = SE_;
TLI = TLI_;
TTI = TTI_;
- DL = &F.getParent()->getDataLayout();
+ DL = &F.getDataLayout();
bool Changed = false, ChangedInThisIteration;
do {
diff --git a/llvm/lib/Transforms/Scalar/NewGVN.cpp b/llvm/lib/Transforms/Scalar/NewGVN.cpp
index 3e2f99acdc9a6..4cba196ed688a 100644
--- a/llvm/lib/Transforms/Scalar/NewGVN.cpp
+++ b/llvm/lib/Transforms/Scalar/NewGVN.cpp
@@ -4237,7 +4237,7 @@ PreservedAnalyses NewGVNPass::run(Function &F, AnalysisManager<Function> &AM) {
auto &AA = AM.getResult<AAManager>(F);
auto &MSSA = AM.getResult<MemorySSAAnalysis>(F).getMSSA();
bool Changed =
- NewGVN(F, &DT, &AC, &TLI, &AA, &MSSA, F.getParent()->getDataLayout())
+ NewGVN(F, &DT, &AC, &TLI, &AA, &MSSA, F.getDataLayout())
.runGVN();
if (!Changed)
return PreservedAnalyses::all();
diff --git a/llvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp b/llvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp
index 47751189abd3c..2b99e28acb4e9 100644
--- a/llvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp
+++ b/llvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp
@@ -2030,7 +2030,7 @@ static void relocationViaAlloca(
// Emit alloca for "LiveValue" and record it in "allocaMap" and
// "PromotableAllocas"
- const DataLayout &DL = F.getParent()->getDataLayout();
+ const DataLayout &DL = F.getDataLayout();
auto emitAllocaFor = [&](Value *LiveValue) {
AllocaInst *Alloca =
new AllocaInst(LiveValue->getType(), DL.getAllocaAddrSpace(), "",
@@ -2601,7 +2601,7 @@ static bool inlineGetBaseAndOffset(Function &F,
DefiningValueMapTy &DVCache,
IsKnownBaseMapTy &KnownBases) {
auto &Context = F.getContext();
- auto &DL = F.getParent()->getDataLayout();
+ auto &DL = F.getDataLayout();
bool Changed = false;
for (auto *Callsite : Intrinsics)
diff --git a/llvm/lib/Transforms/Scalar/SCCP.cpp b/llvm/lib/Transforms/Scalar/SCCP.cpp
index 8a491e74b91c6..ce45c58e624e4 100644
--- a/llvm/lib/Transforms/Scalar/SCCP.cpp
+++ b/llvm/lib/Transforms/Scalar/SCCP.cpp
@@ -119,7 +119,7 @@ static bool runSCCP(Function &F, const DataLayout &DL,
}
PreservedAnalyses SCCPPass::run(Function &F, FunctionAnalysisManager &AM) {
- const DataLayout &DL = F.getParent()->getDataLayout();
+ const DataLayout &DL = F.getDataLayout();
auto &TLI = AM.getResult<TargetLibraryAnalysis>(F);
auto *DT = AM.getCachedResult<DominatorTreeAnalysis>(F);
DomTreeUpdater DTU(DT, DomTreeUpdater::UpdateStrategy::Lazy);
diff --git a/llvm/lib/Transforms/Scalar/SROA.cpp b/llvm/lib/Transforms/Scalar/SROA.cpp
index 44aa502c7c1ea..4d8fd5d3b9f5c 100644
--- a/llvm/lib/Transforms/Scalar/SROA.cpp
+++ b/llvm/lib/Transforms/Scalar/SROA.cpp
@@ -5357,7 +5357,7 @@ bool SROA::promoteAllocas(Function &F) {
std::pair<bool /*Changed*/, bool /*CFGChanged*/> SROA::runSROA(Function &F) {
LLVM_DEBUG(dbgs() << "SROA function: " << F.getName() << "\n");
- const DataLayout &DL = F.getParent()->getDataLayout();
+ const DataLayout &DL = F.getDataLayout();
BasicBlock &EntryBB = F.getEntryBlock();
for (BasicBlock::iterator I = EntryBB.begin(), E = std::prev(EntryBB.end());
I != E; ++I) {
diff --git a/llvm/lib/Transforms/Scalar/ScalarizeMaskedMemIntrin.cpp b/llvm/lib/Transforms/Scalar/ScalarizeMaskedMemIntrin.cpp
index 8f820a3bba2b3..8eadf8900020d 100644
--- a/llvm/lib/Transforms/Scalar/ScalarizeMaskedMemIntrin.cpp
+++ b/llvm/lib/Transforms/Scalar/ScalarizeMaskedMemIntrin.cpp
@@ -933,7 +933,7 @@ static bool runImpl(Function &F, const TargetTransformInfo &TTI,
bool EverMadeChange = false;
bool MadeChange = true;
- auto &DL = F.getParent()->getDataLayout();
+ auto &DL = F.getDataLayout();
while (MadeChange) {
MadeChange = false;
for (BasicBlock &BB : llvm::make_early_inc_range(F)) {
diff --git a/llvm/lib/Transforms/Scalar/SeparateConstOffsetFromGEP.cpp b/llvm/lib/Transforms/Scalar/SeparateConstOffsetFromGEP.cpp
index 4e6636d746b7f..111157b5b326f 100644
--- a/llvm/lib/Transforms/Scalar/SeparateConstOffsetFromGEP.cpp
+++ b/llvm/lib/Transforms/Scalar/SeparateConstOffsetFromGEP.cpp
@@ -1179,7 +1179,7 @@ bool SeparateConstOffsetFromGEP::run(Function &F) {
if (DisableSeparateConstOffsetFromGEP)
return false;
- DL = &F.getParent()->getDataLayout();
+ DL = &F.getDataLayout();
bool Changed = false;
for (BasicBlock &B : F) {
if (!DT->isReachableFromEntry(&B))
diff --git a/llvm/lib/Transforms/Scalar/StraightLineStrengthReduce.cpp b/llvm/lib/Transforms/Scalar/StraightLineStrengthReduce.cpp
index 75910d7b698aa..9be60721bebb5 100644
--- a/llvm/lib/Transforms/Scalar/StraightLineStrengthReduce.cpp
+++ b/llvm/lib/Transforms/Scalar/StraightLineStrengthReduce.cpp
@@ -715,7 +715,7 @@ namespace llvm {
PreservedAnalyses
StraightLineStrengthReducePass::run(Function &F, FunctionAnalysisManager &AM) {
- const DataLayout *DL = &F.getParent()->getDataLayout();
+ const DataLayout *DL = &F.getDataLayout();
auto *DT = &AM.getResult<DominatorTreeAnalysis>(F);
auto *SE = &AM.getResult<ScalarEvolutionAnalysis>(F);
auto *TTI = &AM.getResult<TargetIRAnalysis>(F);
diff --git a/llvm/lib/Transforms/Scalar/StructurizeCFG.cpp b/llvm/lib/Transforms/Scalar/StructurizeCFG.cpp
index 7d96a3478858b..9c711ec183821 100644
--- a/llvm/lib/Transforms/Scalar/StructurizeCFG.cpp
+++ b/llvm/lib/Transforms/Scalar/StructurizeCFG.cpp
@@ -772,7 +772,7 @@ void StructurizeCFG::simplifyAffectedPhis() {
bool Changed;
do {
Changed = false;
- SimplifyQuery Q(Func->getParent()->getDataLayout());
+ SimplifyQuery Q(Func->getDataLayout());
Q.DT = DT;
// Setting CanUseUndef to true might extend value liveness, set it to false
// to achieve better register pressure.
diff --git a/llvm/lib/Transforms/Scalar/TailRecursionElimination.cpp b/llvm/lib/Transforms/Scalar/TailRecursionElimination.cpp
index eb51a998b27dd..1b3e6d9549b82 100644
--- a/llvm/lib/Transforms/Scalar/TailRecursionElimination.cpp
+++ b/llvm/lib/Transforms/Scalar/TailRecursionElimination.cpp
@@ -594,7 +594,7 @@ void TailRecursionEliminator::copyByValueOperandIntoLocalTemp(CallInst *CI,
int OpndIdx) {
Type *AggTy = CI->getParamByValType(OpndIdx);
assert(AggTy);
- const DataLayout &DL = F.getParent()->getDataLayout();
+ const DataLayout &DL = F.getDataLayout();
// Get alignment of byVal operand.
Align Alignment(CI->getParamAlign(OpndIdx).valueOrOne());
@@ -621,7 +621,7 @@ void TailRecursionEliminator::copyLocalTempOfByValueOperandIntoArguments(
CallInst *CI, int OpndIdx) {
Type *AggTy = CI->getParamByValType(OpndIdx);
assert(AggTy);
- const DataLayout &DL = F.getParent()->getDataLayout();
+ const DataLayout &DL = F.getDataLayout();
// Get alignment of byVal operand.
Align Alignment(CI->getParamAlign(OpndIdx).valueOrOne());
@@ -749,7 +749,7 @@ void TailRecursionEliminator::cleanupAndFinalize() {
// call.
for (PHINode *PN : ArgumentPHIs) {
// If the PHI Node is a dynamic constant, replace it with the value it is.
- if (Value *PNV = simplifyInstruction(PN, F.getParent()->getDataLayout())) {
+ if (Value *PNV = simplifyInstruction(PN, F.getDataLayout())) {
PN->replaceAllUsesWith(PNV);
PN->eraseFromParent();
}
diff --git a/llvm/lib/Transforms/Utils/CallPromotionUtils.cpp b/llvm/lib/Transforms/Utils/CallPromotionUtils.cpp
index dda80d419999d..df9bd8001367e 100644
--- a/llvm/lib/Transforms/Utils/CallPromotionUtils.cpp
+++ b/llvm/lib/Transforms/Utils/CallPromotionUtils.cpp
@@ -395,7 +395,7 @@ bool llvm::isLegalToPromote(const CallBase &CB, Function *Callee,
const char **FailureReason) {
assert(!CB.getCalledFunction() && "Only indirect call sites can be promoted");
- auto &DL = Callee->getParent()->getDataLayout();
+ auto &DL = Callee->getDataLayout();
// Check the return type. The callee's return value type must be bitcast
// compatible with the call site's type.
diff --git a/llvm/lib/Transforms/Utils/CloneFunction.cpp b/llvm/lib/Transforms/Utils/CloneFunction.cpp
index bc432d6e8e21b..47e3c03288d97 100644
--- a/llvm/lib/Transforms/Utils/CloneFunction.cpp
+++ b/llvm/lib/Transforms/Utils/CloneFunction.cpp
@@ -818,7 +818,7 @@ void llvm::CloneAndPruneIntoFromInst(Function *NewFunc, const Function *OldFunc,
// As phi-nodes have been now remapped, allow incremental simplification of
// newly-cloned instructions.
- const DataLayout &DL = NewFunc->getParent()->getDataLayout();
+ const DataLayout &DL = NewFunc->getDataLayout();
for (const auto &BB : *OldFunc) {
for (const auto &I : BB) {
auto *NewI = dyn_cast_or_null<Instruction>(VMap.lookup(&I));
diff --git a/llvm/lib/Transforms/Utils/DemoteRegToStack.cpp b/llvm/lib/Transforms/Utils/DemoteRegToStack.cpp
index 239fcb9d8f154..62b8e0b7f455e 100644
--- a/llvm/lib/Transforms/Utils/DemoteRegToStack.cpp
+++ b/llvm/lib/Transforms/Utils/DemoteRegToStack.cpp
@@ -27,7 +27,7 @@ AllocaInst *llvm::DemoteRegToStack(Instruction &I, bool VolatileLoads,
}
Function *F = I.getParent()->getParent();
- const DataLayout &DL = F->getParent()->getDataLayout();
+ const DataLayout &DL = F->getDataLayout();
// Create a stack slot to hold the value.
AllocaInst *Slot;
diff --git a/llvm/lib/Transforms/Utils/FunctionComparator.cpp b/llvm/lib/Transforms/Utils/FunctionComparator.cpp
index 012cdd627866f..47d4e167b1c8f 100644
--- a/llvm/lib/Transforms/Utils/FunctionComparator.cpp
+++ b/llvm/lib/Transforms/Utils/FunctionComparator.cpp
@@ -524,7 +524,7 @@ int FunctionComparator::cmpTypes(Type *TyL, Type *TyR) const {
PointerType *PTyL = dyn_cast<PointerType>(TyL);
PointerType *PTyR = dyn_cast<PointerType>(TyR);
- const DataLayout &DL = FnL->getParent()->getDataLayout();
+ const DataLayout &DL = FnL->getDataLayout();
if (PTyL && PTyL->getAddressSpace() == 0)
TyL = DL.getIntPtrType(TyL);
if (PTyR && PTyR->getAddressSpace() == 0)
@@ -805,7 +805,7 @@ int FunctionComparator::cmpGEPs(const GEPOperator *GEPL,
// When we have target data, we can reduce the GEP down to the value in bytes
// added to the address.
- const DataLayout &DL = FnL->getParent()->getDataLayout();
+ const DataLayout &DL = FnL->getDataLayout();
unsigned OffsetBitWidth = DL.getIndexSizeInBits(ASL);
APInt OffsetL(OffsetBitWidth, 0), OffsetR(OffsetBitWidth, 0);
if (GEPL->accumulateConstantOffset(DL, OffsetL) &&
diff --git a/llvm/lib/Transforms/Utils/InlineFunction.cpp b/llvm/lib/Transforms/Utils/InlineFunction.cpp
index 39e3a2c5809c8..0bf335a2da2a2 100644
--- a/llvm/lib/Transforms/Utils/InlineFunction.cpp
+++ b/llvm/lib/Transforms/Utils/InlineFunction.cpp
@@ -1575,7 +1575,7 @@ static void AddAlignmentAssumptions(CallBase &CB, InlineFunctionInfo &IFI) {
return;
AssumptionCache *AC = &IFI.GetAssumptionCache(*CB.getCaller());
- auto &DL = CB.getCaller()->getParent()->getDataLayout();
+ auto &DL = CB.getCaller()->getDataLayout();
// To avoid inserting redundant assumptions, we should check for assumptions
// already in the caller. To do this, we might need a DT of the caller.
@@ -1638,7 +1638,7 @@ static Value *HandleByValArgument(Type *ByValType, Value *Arg,
InlineFunctionInfo &IFI,
MaybeAlign ByValAlignment) {
Function *Caller = TheCall->getFunction();
- const DataLayout &DL = Caller->getParent()->getDataLayout();
+ const DataLayout &DL = Caller->getDataLayout();
// If the called function is readonly, then it could not mutate the caller's
// copy of the byval'd memory. In this case, it is safe to elide the copy and
@@ -2293,7 +2293,7 @@ llvm::InlineResult llvm::InlineFunction(CallBase &CB, InlineFunctionInfo &IFI,
// callee.
ScopedAliasMetadataDeepCloner SAMetadataCloner(CB.getCalledFunction());
- auto &DL = Caller->getParent()->getDataLayout();
+ auto &DL = Caller->getDataLayout();
// Calculate the vector of arguments to pass into the function cloner, which
// matches up the formal to the actual argument values.
@@ -2627,7 +2627,7 @@ llvm::InlineResult llvm::InlineFunction(CallBase &CB, InlineFunctionInfo &IFI,
ConstantInt *AllocaSize = nullptr;
if (ConstantInt *AIArraySize =
dyn_cast<ConstantInt>(AI->getArraySize())) {
- auto &DL = Caller->getParent()->getDataLayout();
+ auto &DL = Caller->getDataLayout();
Type *AllocaType = AI->getAllocatedType();
TypeSize AllocaTypeSize = DL.getTypeAllocSize(AllocaType);
uint64_t AllocaArraySize = AIArraySize->getLimitedValue();
@@ -3033,7 +3033,7 @@ llvm::InlineResult llvm::InlineFunction(CallBase &CB, InlineFunctionInfo &IFI,
if (PHI) {
AssumptionCache *AC =
IFI.GetAssumptionCache ? &IFI.GetAssumptionCache(*Caller) : nullptr;
- auto &DL = Caller->getParent()->getDataLayout();
+ auto &DL = Caller->getDataLayout();
if (Value *V = simplifyInstruction(PHI, {DL, nullptr, nullptr, AC})) {
PHI->replaceAllUsesWith(V);
PHI->eraseFromParent();
diff --git a/llvm/lib/Transforms/Utils/LoopConstrainer.cpp b/llvm/lib/Transforms/Utils/LoopConstrainer.cpp
index 2d9e0045b2c58..4ae2baca327c7 100644
--- a/llvm/lib/Transforms/Utils/LoopConstrainer.cpp
+++ b/llvm/lib/Transforms/Utils/LoopConstrainer.cpp
@@ -733,7 +733,7 @@ bool LoopConstrainer::run() {
bool Increasing = MainLoopStructure.IndVarIncreasing;
IntegerType *IVTy = cast<IntegerType>(RangeTy);
- SCEVExpander Expander(SE, F.getParent()->getDataLayout(), "loop-constrainer");
+ SCEVExpander Expander(SE, F.getDataLayout(), "loop-constrainer");
Instruction *InsertPt = OriginalPreheader->getTerminator();
// It would have been better to make `PreLoop' and `PostLoop'
diff --git a/llvm/lib/Transforms/Utils/LowerMemIntrinsics.cpp b/llvm/lib/Transforms/Utils/LowerMemIntrinsics.cpp
index acd3f2802031e..d84e9f094e03a 100644
--- a/llvm/lib/Transforms/Utils/LowerMemIntrinsics.cpp
+++ b/llvm/lib/Transforms/Utils/LowerMemIntrinsics.cpp
@@ -34,7 +34,7 @@ void llvm::createMemCpyLoopKnownSize(
BasicBlock *PostLoopBB = nullptr;
Function *ParentFunc = PreLoopBB->getParent();
LLVMContext &Ctx = PreLoopBB->getContext();
- const DataLayout &DL = ParentFunc->getParent()->getDataLayout();
+ const DataLayout &DL = ParentFunc->getDataLayout();
MDBuilder MDB(Ctx);
MDNode *NewDomain = MDB.createAnonymousAliasScopeDomain("MemCopyDomain");
StringRef Name = "MemCopyAliasScope";
@@ -186,7 +186,7 @@ void llvm::createMemCpyLoopUnknownSize(
PreLoopBB->splitBasicBlock(InsertBefore, "post-loop-memcpy-expansion");
Function *ParentFunc = PreLoopBB->getParent();
- const DataLayout &DL = ParentFunc->getParent()->getDataLayout();
+ const DataLayout &DL = ParentFunc->getDataLayout();
LLVMContext &Ctx = PreLoopBB->getContext();
MDBuilder MDB(Ctx);
MDNode *NewDomain = MDB.createAnonymousAliasScopeDomain("MemCopyDomain");
@@ -374,7 +374,7 @@ static void createMemMoveLoop(Instruction *InsertBefore, Value *SrcAddr,
Type *TypeOfCopyLen = CopyLen->getType();
BasicBlock *OrigBB = InsertBefore->getParent();
Function *F = OrigBB->getParent();
- const DataLayout &DL = F->getParent()->getDataLayout();
+ const DataLayout &DL = F->getDataLayout();
// TODO: Use different element type if possible?
Type *EltTy = Type::getInt8Ty(F->getContext());
@@ -461,7 +461,7 @@ static void createMemSetLoop(Instruction *InsertBefore, Value *DstAddr,
Type *TypeOfCopyLen = CopyLen->getType();
BasicBlock *OrigBB = InsertBefore->getParent();
Function *F = OrigBB->getParent();
- const DataLayout &DL = F->getParent()->getDataLayout();
+ const DataLayout &DL = F->getDataLayout();
BasicBlock *NewBB =
OrigBB->splitBasicBlock(InsertBefore, "split");
BasicBlock *LoopBB
diff --git a/llvm/lib/Transforms/Utils/LowerSwitch.cpp b/llvm/lib/Transforms/Utils/LowerSwitch.cpp
index f4ef6d02abf0c..55f35448af637 100644
--- a/llvm/lib/Transforms/Utils/LowerSwitch.cpp
+++ b/llvm/lib/Transforms/Utils/LowerSwitch.cpp
@@ -407,7 +407,7 @@ void ProcessSwitchInst(SwitchInst *SI,
// 2. even if limited to icmp instructions only, it will have to process
// roughly C icmp's per switch, where C is the number of cases in the
// switch, while LowerSwitch only needs to call LVI once per switch.
- const DataLayout &DL = F->getParent()->getDataLayout();
+ const DataLayout &DL = F->getDataLayout();
KnownBits Known = computeKnownBits(Val, DL, /*Depth=*/0, AC, SI);
// TODO Shouldn't this create a signed range?
ConstantRange KnownBitsRange =
diff --git a/llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp b/llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp
index a1210ac0f88ac..6f62545241e9e 100644
--- a/llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp
+++ b/llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp
@@ -397,7 +397,7 @@ struct PromoteMem2Reg {
AssumptionCache *AC)
: Allocas(Allocas.begin(), Allocas.end()), DT(DT),
DIB(*DT.getRoot()->getParent()->getParent(), /*AllowUnresolved*/ false),
- AC(AC), SQ(DT.getRoot()->getParent()->getParent()->getDataLayout(),
+ AC(AC), SQ(DT.getRoot()->getDataLayout(),
nullptr, &DT, AC) {}
void run();
diff --git a/llvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp b/llvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp
index 6ba278794b7fb..c91911ecad745 100644
--- a/llvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp
+++ b/llvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp
@@ -252,7 +252,7 @@ class Vectorizer {
Vectorizer(Function &F, AliasAnalysis &AA, AssumptionCache &AC,
DominatorTree &DT, ScalarEvolution &SE, TargetTransformInfo &TTI)
: F(F), AA(AA), AC(AC), DT(DT), SE(SE), TTI(TTI),
- DL(F.getParent()->getDataLayout()), Builder(SE.getContext()) {}
+ DL(F.getDataLayout()), Builder(SE.getContext()) {}
bool run();
diff --git a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
index 7516e3ecbd287..f9c0c66e6e0af 100644
--- a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+++ b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
@@ -5116,7 +5116,7 @@ std::pair<unsigned, unsigned>
LoopVectorizationCostModel::getSmallestAndWidestTypes() {
unsigned MinWidth = -1U;
unsigned MaxWidth = 8;
- const DataLayout &DL = TheFunction->getParent()->getDataLayout();
+ const DataLayout &DL = TheFunction->getDataLayout();
// For in-loop reductions, no element types are added to ElementTypesInLoop
// if there are no loads/stores in the loop. In this case, check through the
// reduction variables to determine the maximum width.
@@ -9581,7 +9581,7 @@ static bool processLoopInVPlanNativePath(
bool AddBranchWeights =
hasBranchWeightMD(*L->getLoopLatch()->getTerminator());
GeneratedRTChecks Checks(*PSE.getSE(), DT, LI, TTI,
- F->getParent()->getDataLayout(), AddBranchWeights);
+ F->getDataLayout(), AddBranchWeights);
InnerLoopVectorizer LB(L, PSE, LI, DT, TLI, TTI, AC, ORE, VF.Width,
VF.Width, 1, LVL, &CM, BFI, PSI, Checks);
LLVM_DEBUG(dbgs() << "Vectorizing outer loop in \""
@@ -9925,7 +9925,7 @@ bool LoopVectorizePass::processLoop(Loop *L) {
bool AddBranchWeights =
hasBranchWeightMD(*L->getLoopLatch()->getTerminator());
GeneratedRTChecks Checks(*PSE.getSE(), DT, LI, TTI,
- F->getParent()->getDataLayout(), AddBranchWeights);
+ F->getDataLayout(), AddBranchWeights);
if (MaybeVF) {
VF = *MaybeVF;
// Select the interleave count.
diff --git a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
index 974f966d46e81..4cd61ee165aad 100644
--- a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+++ b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
@@ -15551,7 +15551,7 @@ bool SLPVectorizerPass::runImpl(Function &F, ScalarEvolution *SE_,
DT = DT_;
AC = AC_;
DB = DB_;
- DL = &F.getParent()->getDataLayout();
+ DL = &F.getDataLayout();
Stores.clear();
GEPs.clear();
diff --git a/llvm/lib/Transforms/Vectorize/VectorCombine.cpp b/llvm/lib/Transforms/Vectorize/VectorCombine.cpp
index 7fa1b433ef11d..757e5eca54452 100644
--- a/llvm/lib/Transforms/Vectorize/VectorCombine.cpp
+++ b/llvm/lib/Transforms/Vectorize/VectorCombine.cpp
@@ -2584,7 +2584,7 @@ PreservedAnalyses VectorCombinePass::run(Function &F,
TargetTransformInfo &TTI = FAM.getResult<TargetIRAnalysis>(F);
DominatorTree &DT = FAM.getResult<DominatorTreeAnalysis>(F);
AAResults &AA = FAM.getResult<AAManager>(F);
- const DataLayout *DL = &F.getParent()->getDataLayout();
+ const DataLayout *DL = &F.getDataLayout();
VectorCombine Combiner(F, TTI, DT, AA, AC, DL, TryEarlyFoldsOnly);
if (!Combiner.run())
return PreservedAnalyses::all();
diff --git a/llvm/unittests/Transforms/Utils/ScalarEvolutionExpanderTest.cpp b/llvm/unittests/Transforms/Utils/ScalarEvolutionExpanderTest.cpp
index eb27e69da47fa..9e80c6d39c3c1 100644
--- a/llvm/unittests/Transforms/Utils/ScalarEvolutionExpanderTest.cpp
+++ b/llvm/unittests/Transforms/Utils/ScalarEvolutionExpanderTest.cpp
@@ -96,7 +96,7 @@ TEST_F(ScalarEvolutionExpanderTest, ExpandPtrTypeSCEV) {
// %bitcast2 = bitcast i8* %select to i32*
// br i1 undef, label %loop, label %exit
- const DataLayout &DL = F->getParent()->getDataLayout();
+ const DataLayout &DL = F->getDataLayout();
BranchInst *Br = BranchInst::Create(
LoopBB, ExitBB, UndefValue::get(Type::getInt1Ty(Context)), LoopBB);
AllocaInst *Alloca =
>From 82ed136d13d7593a48f3a43884b77824dbab7d67 Mon Sep 17 00:00:00 2001
From: Nikita Popov <npopov at redhat.com>
Date: Thu, 27 Jun 2024 18:05:13 +0200
Subject: [PATCH 3/3] apply suggestions
---
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 2 +-
llvm/lib/Target/ARM/ARMISelLowering.cpp | 12 ++++++------
llvm/lib/Target/Hexagon/HexagonISelLowering.cpp | 2 +-
llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp | 4 ++--
llvm/lib/Transforms/Utils/InlineFunction.cpp | 2 +-
5 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index b05c2410a8a7b..a37c7c9133127 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -15901,7 +15901,7 @@ bool AArch64TargetLowering::shouldSinkOperands(
// the backend to generate a umull.
unsigned Bitwidth = I->getType()->getScalarSizeInBits();
APInt UpperMask = APInt::getHighBitsSet(Bitwidth, Bitwidth / 2);
- const DataLayout &DL = I->getFunction()->getDataLayout();
+ const DataLayout &DL = I->getDataLayout();
if (!MaskedValueIsZero(OperandInstr, UpperMask, DL))
continue;
NumZExts++;
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index 3c52028dfaf60..a3fd72fe1351c 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -21043,7 +21043,7 @@ bool ARMTargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
case Intrinsic::arm_neon_vld4dup: {
Info.opc = ISD::INTRINSIC_W_CHAIN;
// Conservatively set memVT to the entire set of vectors loaded.
- auto &DL = I.getCalledFunction()->getDataLayout();
+ auto &DL = I.getDataLayout();
uint64_t NumElts = DL.getTypeSizeInBits(I.getType()) / 64;
Info.memVT = EVT::getVectorVT(I.getType()->getContext(), MVT::i64, NumElts);
Info.ptrVal = I.getArgOperand(0);
@@ -21059,7 +21059,7 @@ bool ARMTargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
case Intrinsic::arm_neon_vld1x4: {
Info.opc = ISD::INTRINSIC_W_CHAIN;
// Conservatively set memVT to the entire set of vectors loaded.
- auto &DL = I.getCalledFunction()->getDataLayout();
+ auto &DL = I.getDataLayout();
uint64_t NumElts = DL.getTypeSizeInBits(I.getType()) / 64;
Info.memVT = EVT::getVectorVT(I.getType()->getContext(), MVT::i64, NumElts);
Info.ptrVal = I.getArgOperand(I.arg_size() - 1);
@@ -21078,7 +21078,7 @@ bool ARMTargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
case Intrinsic::arm_neon_vst4lane: {
Info.opc = ISD::INTRINSIC_VOID;
// Conservatively set memVT to the entire set of vectors stored.
- auto &DL = I.getCalledFunction()->getDataLayout();
+ auto &DL = I.getDataLayout();
unsigned NumElts = 0;
for (unsigned ArgI = 1, ArgE = I.arg_size(); ArgI < ArgE; ++ArgI) {
Type *ArgTy = I.getArgOperand(ArgI)->getType();
@@ -21100,7 +21100,7 @@ bool ARMTargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
case Intrinsic::arm_neon_vst1x4: {
Info.opc = ISD::INTRINSIC_VOID;
// Conservatively set memVT to the entire set of vectors stored.
- auto &DL = I.getCalledFunction()->getDataLayout();
+ auto &DL = I.getDataLayout();
unsigned NumElts = 0;
for (unsigned ArgI = 1, ArgE = I.arg_size(); ArgI < ArgE; ++ArgI) {
Type *ArgTy = I.getArgOperand(ArgI)->getType();
@@ -21206,7 +21206,7 @@ bool ARMTargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
}
case Intrinsic::arm_ldaex:
case Intrinsic::arm_ldrex: {
- auto &DL = I.getCalledFunction()->getDataLayout();
+ auto &DL = I.getDataLayout();
Type *ValTy = I.getParamElementType(0);
Info.opc = ISD::INTRINSIC_W_CHAIN;
Info.memVT = MVT::getVT(ValTy);
@@ -21218,7 +21218,7 @@ bool ARMTargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
}
case Intrinsic::arm_stlex:
case Intrinsic::arm_strex: {
- auto &DL = I.getCalledFunction()->getDataLayout();
+ auto &DL = I.getDataLayout();
Type *ValTy = I.getParamElementType(1);
Info.opc = ISD::INTRINSIC_W_CHAIN;
Info.memVT = MVT::getVT(ValTy);
diff --git a/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp b/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
index b40098cf4307b..aefd94e69b0e1 100644
--- a/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
@@ -2110,7 +2110,7 @@ bool HexagonTargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
case Intrinsic::hexagon_L2_loadrb_pbr:
case Intrinsic::hexagon_L2_loadrub_pbr: {
Info.opc = ISD::INTRINSIC_W_CHAIN;
- auto &DL = I.getCalledFunction()->getDataLayout();
+ auto &DL = I.getDataLayout();
auto &Cont = I.getCalledFunction()->getParent()->getContext();
// The intrinsic function call is of the form { ElTy, i8* }
// @llvm.hexagon.L2.loadXX.pbr(i8*, i32). The pointer and memory access type
diff --git a/llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp b/llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
index 2d75a6f14d72a..b9efd9aaa28c5 100644
--- a/llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
+++ b/llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
@@ -1815,7 +1815,7 @@ bool MemCpyOptPass::processMemMove(MemMoveInst *M) {
/// This is called on every byval argument in call sites.
bool MemCpyOptPass::processByValArgument(CallBase &CB, unsigned ArgNo) {
- const DataLayout &DL = CB.getCaller()->getDataLayout();
+ const DataLayout &DL = CB.getDataLayout();
// Find out what feeds this byval argument.
Value *ByValArg = CB.getArgOperand(ArgNo);
Type *ByValTy = CB.getParamByValType(ArgNo);
@@ -1902,7 +1902,7 @@ bool MemCpyOptPass::processImmutArgument(CallBase &CB, unsigned ArgNo) {
if (!(CB.paramHasAttr(ArgNo, Attribute::NoAlias) &&
CB.paramHasAttr(ArgNo, Attribute::NoCapture)))
return false;
- const DataLayout &DL = CB.getCaller()->getDataLayout();
+ const DataLayout &DL = CB.getDataLayout();
Value *ImmutArg = CB.getArgOperand(ArgNo);
// 2. Check that arg is alloca
diff --git a/llvm/lib/Transforms/Utils/InlineFunction.cpp b/llvm/lib/Transforms/Utils/InlineFunction.cpp
index 0bf335a2da2a2..f2130e4c286aa 100644
--- a/llvm/lib/Transforms/Utils/InlineFunction.cpp
+++ b/llvm/lib/Transforms/Utils/InlineFunction.cpp
@@ -1575,7 +1575,7 @@ static void AddAlignmentAssumptions(CallBase &CB, InlineFunctionInfo &IFI) {
return;
AssumptionCache *AC = &IFI.GetAssumptionCache(*CB.getCaller());
- auto &DL = CB.getCaller()->getDataLayout();
+ auto &DL = CB.getDataLayout();
// To avoid inserting redundant assumptions, we should check for assumptions
// already in the caller. To do this, we might need a DT of the caller.
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