[llvm] [X86][SimplifyCFG] Support hoisting load/store with conditional faulting (PR #96878)

[Yangyu Chen via llvm-commits]

cyyself wrote:

How is the performance of the hoisting load/store being benchmarked? I don't know the specific implementation in microarchitecture, but using these conditional instructions to replace a very easy-to-predict branch may negatively contribute to performance. Is there any ISA simulator or real chip implemented so we can benchmark the performance?

https://github.com/llvm/llvm-project/pull/96878