[llvm] [LSV] Enhance LoadStoreVectorizer to Handle Disjoint Flag in OR Instructions and Restore Vectorization Opportunities (PR #96495)
Hao Li via llvm-commits
llvm-commits at lists.llvm.org
Thu Jun 27 07:14:53 PDT 2024
================
@@ -5290,6 +5290,15 @@ static std::optional<BinaryOp> MatchBinaryOp(Value *V, const DataLayout &DL,
return BinaryOp(Op);
case Instruction::Or: {
+ //Determine whether the instruction or is disjoint
+ if (auto *OrInst = dyn_cast<PossiblyDisjointInst>(Op)) {
+ Value *Op0 = OrInst->getOperand(0);
+ Value *Op1 = OrInst->getOperand(1);
+
+ if (haveNoCommonBitsSet(Op0, Op1, DL)) {
+ OrInst->setIsDisjoint(true);
----------------
LiHao217 wrote:
Do you mean change it like this? I'm going to test it now:
` case Instruction::Or: {
if (auto *OrInst = dyn_cast<PossiblyDisjointInst>(Op)) {
// Convert or disjoint into add nuw nsw.
if (OrInst->isDisjoint() ||
haveNoCommonBitsSet(OrInst->getOperand(0), OrInst->getOperand(1), DL)) {
return BinaryOp(Instruction::Add, OrInst->getOperand(0), OrInst->getOperand(1),
/*IsNSW=*/true, /*IsNUW=*/true);
}
}
return BinaryOp(Op);
}`
https://github.com/llvm/llvm-project/pull/96495
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