[llvm] [LSV] Enhance LoadStoreVectorizer to Handle Disjoint Flag in OR Instructions and Restore Vectorization Opportunities (PR #96495)

[Nikita Popov via llvm-commits]

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@@ -5290,6 +5290,15 @@ static std::optional<BinaryOp> MatchBinaryOp(Value *V, const DataLayout &DL,
     return BinaryOp(Op);
 
   case Instruction::Or: {
+    //Determine whether the instruction or is disjoint
+    if (auto *OrInst = dyn_cast<PossiblyDisjointInst>(Op)) {
+      Value *Op0 = OrInst->getOperand(0);
+      Value *Op1 = OrInst->getOperand(1);
+
+      if (haveNoCommonBitsSet(Op0, Op1, DL)) {
+        OrInst->setIsDisjoint(true);
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nikic wrote:

You cannot modify instructions inside SCEV. What you would do is add an `|| haveNoCommonBits` check in the if below.

https://github.com/llvm/llvm-project/pull/96495