[llvm] [CodeGen] Use range-based for loops (NFC) (PR #96855)
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Wed Jun 26 22:58:31 PDT 2024
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-llvm-selectiondag
Author: Kazu Hirata (kazutakahirata)
<details>
<summary>Changes</summary>
---
Full diff: https://github.com/llvm/llvm-project/pull/96855.diff
6 Files Affected:
- (modified) llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp (+3-3)
- (modified) llvm/lib/CodeGen/MachineInstrBundle.cpp (+5-6)
- (modified) llvm/lib/CodeGen/MachineTraceMetrics.cpp (+3-3)
- (modified) llvm/lib/CodeGen/RegAllocBasic.cpp (+4-6)
- (modified) llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (+8-9)
- (modified) llvm/lib/CodeGen/TailDuplicator.cpp (+1-2)
``````````diff
diff --git a/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp b/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
index 31030accd43f7..f99d2aa284404 100644
--- a/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
@@ -3082,9 +3082,9 @@ void CombinerHelper::applyCombineInsertVecElts(
UndefReg = Builder.buildUndef(DstTy.getScalarType()).getReg(0);
return UndefReg;
};
- for (unsigned I = 0; I < MatchInfo.size(); ++I) {
- if (!MatchInfo[I])
- MatchInfo[I] = GetUndef();
+ for (Register &Reg : MatchInfo) {
+ if (!Reg)
+ Reg = GetUndef();
}
Builder.buildBuildVector(MI.getOperand(0).getReg(), MatchInfo);
MI.eraseFromParent();
diff --git a/llvm/lib/CodeGen/MachineInstrBundle.cpp b/llvm/lib/CodeGen/MachineInstrBundle.cpp
index dafa8e2527f6d..92189f6360683 100644
--- a/llvm/lib/CodeGen/MachineInstrBundle.cpp
+++ b/llvm/lib/CodeGen/MachineInstrBundle.cpp
@@ -177,26 +177,25 @@ void llvm::finalizeBundle(MachineBasicBlock &MBB,
}
}
- for (unsigned i = 0, e = Defs.size(); i != e; ++i) {
- MachineOperand &MO = *Defs[i];
- Register Reg = MO.getReg();
+ for (MachineOperand *MO : Defs) {
+ Register Reg = MO->getReg();
if (!Reg)
continue;
if (LocalDefSet.insert(Reg).second) {
LocalDefs.push_back(Reg);
- if (MO.isDead()) {
+ if (MO->isDead()) {
DeadDefSet.insert(Reg);
}
} else {
// Re-defined inside the bundle, it's no longer killed.
KilledDefSet.erase(Reg);
- if (!MO.isDead())
+ if (!MO->isDead())
// Previously defined but dead.
DeadDefSet.erase(Reg);
}
- if (!MO.isDead() && Reg.isPhysical()) {
+ if (!MO->isDead() && Reg.isPhysical()) {
for (MCPhysReg SubReg : TRI->subregs(Reg)) {
if (LocalDefSet.insert(SubReg).second)
LocalDefs.push_back(SubReg);
diff --git a/llvm/lib/CodeGen/MachineTraceMetrics.cpp b/llvm/lib/CodeGen/MachineTraceMetrics.cpp
index 3e6f36fe936ff..3892f85b4d090 100644
--- a/llvm/lib/CodeGen/MachineTraceMetrics.cpp
+++ b/llvm/lib/CodeGen/MachineTraceMetrics.cpp
@@ -939,15 +939,15 @@ static unsigned updatePhysDepsUpwards(const MachineInstr &MI, unsigned Height,
}
// Now we know the height of MI. Update any regunits read.
- for (size_t I = 0, E = ReadOps.size(); I != E; ++I) {
- MCRegister Reg = MI.getOperand(ReadOps[I]).getReg().asMCReg();
+ for (unsigned Op : ReadOps) {
+ MCRegister Reg = MI.getOperand(Op).getReg().asMCReg();
for (MCRegUnit Unit : TRI->regunits(Reg)) {
LiveRegUnit &LRU = RegUnits[Unit];
// Set the height to the highest reader of the unit.
if (LRU.Cycle <= Height && LRU.MI != &MI) {
LRU.Cycle = Height;
LRU.MI = &MI;
- LRU.Op = ReadOps[I];
+ LRU.Op = Op;
}
}
}
diff --git a/llvm/lib/CodeGen/RegAllocBasic.cpp b/llvm/lib/CodeGen/RegAllocBasic.cpp
index 5d84e1e39e27c..f465c63cf1040 100644
--- a/llvm/lib/CodeGen/RegAllocBasic.cpp
+++ b/llvm/lib/CodeGen/RegAllocBasic.cpp
@@ -226,19 +226,17 @@ bool RABasic::spillInterferences(const LiveInterval &VirtReg,
assert(!Intfs.empty() && "expected interference");
// Spill each interfering vreg allocated to PhysReg or an alias.
- for (unsigned i = 0, e = Intfs.size(); i != e; ++i) {
- const LiveInterval &Spill = *Intfs[i];
-
+ for (const LiveInterval *Spill : Intfs) {
// Skip duplicates.
- if (!VRM->hasPhys(Spill.reg()))
+ if (!VRM->hasPhys(Spill->reg()))
continue;
// Deallocate the interfering vreg by removing it from the union.
// A LiveInterval instance may not be in a union during modification!
- Matrix->unassign(Spill);
+ Matrix->unassign(*Spill);
// Spill the extracted interval.
- LiveRangeEdit LRE(&Spill, SplitVRegs, *MF, *LIS, VRM, this, &DeadRemats);
+ LiveRangeEdit LRE(Spill, SplitVRegs, *MF, *LIS, VRM, this, &DeadRemats);
spiller().spill(LRE);
}
return true;
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index 31ba833abe29d..796481501c74e 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -1455,13 +1455,12 @@ void SelectionDAGISel::reportIPToStateForBlocks(MachineFunction *MF) {
llvm::WinEHFuncInfo *EHInfo = MF->getWinEHFuncInfo();
if (!EHInfo)
return;
- for (auto MBBI = MF->begin(), E = MF->end(); MBBI != E; ++MBBI) {
- MachineBasicBlock *MBB = &*MBBI;
- const BasicBlock *BB = MBB->getBasicBlock();
+ for (MachineBasicBlock &MBB : *MF) {
+ const BasicBlock *BB = MBB.getBasicBlock();
int State = EHInfo->BlockToStateMap[BB];
if (BB->getFirstMayFaultInst()) {
// Report IP range only for blocks with Faulty inst
- auto MBBb = MBB->getFirstNonPHI();
+ auto MBBb = MBB.getFirstNonPHI();
MachineInstr *MIb = &*MBBb;
if (MIb->isTerminator())
continue;
@@ -1470,16 +1469,16 @@ void SelectionDAGISel::reportIPToStateForBlocks(MachineFunction *MF) {
MCSymbol *BeginLabel = MMI.getContext().createTempSymbol();
MCSymbol *EndLabel = MMI.getContext().createTempSymbol();
EHInfo->addIPToStateRange(State, BeginLabel, EndLabel);
- BuildMI(*MBB, MBBb, SDB->getCurDebugLoc(),
+ BuildMI(MBB, MBBb, SDB->getCurDebugLoc(),
TII->get(TargetOpcode::EH_LABEL))
.addSym(BeginLabel);
- auto MBBe = MBB->instr_end();
+ auto MBBe = MBB.instr_end();
MachineInstr *MIe = &*(--MBBe);
// insert before (possible multiple) terminators
while (MIe->isTerminator())
MIe = &*(--MBBe);
++MBBe;
- BuildMI(*MBB, MBBe, SDB->getCurDebugLoc(),
+ BuildMI(MBB, MBBe, SDB->getCurDebugLoc(),
TII->get(TargetOpcode::EH_LABEL))
.addSym(EndLabel);
}
@@ -2125,8 +2124,8 @@ SelectionDAGISel::FinishBasicBlock() {
// from the original BB before switch expansion. Note that PHI nodes can
// occur multiple times in PHINodesToUpdate. We have to be very careful to
// handle them the right number of times.
- for (unsigned i = 0, e = Succs.size(); i != e; ++i) {
- FuncInfo->MBB = Succs[i];
+ for (MachineBasicBlock *Succ : Succs) {
+ FuncInfo->MBB = Succ;
FuncInfo->InsertPt = FuncInfo->MBB->end();
// FuncInfo->MBB may have been removed from the CFG if a branch was
// constant folded.
diff --git a/llvm/lib/CodeGen/TailDuplicator.cpp b/llvm/lib/CodeGen/TailDuplicator.cpp
index 4c1c9164cff66..6b860466a8875 100644
--- a/llvm/lib/CodeGen/TailDuplicator.cpp
+++ b/llvm/lib/CodeGen/TailDuplicator.cpp
@@ -201,8 +201,7 @@ bool TailDuplicator::tailDuplicateAndUpdate(
// Update SSA form.
if (!SSAUpdateVRs.empty()) {
- for (unsigned i = 0, e = SSAUpdateVRs.size(); i != e; ++i) {
- unsigned VReg = SSAUpdateVRs[i];
+ for (unsigned VReg : SSAUpdateVRs) {
SSAUpdate.Initialize(VReg);
// If the original definition is still around, add it as an available
``````````
</details>
https://github.com/llvm/llvm-project/pull/96855
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