[llvm] [Transforms] Let amdgcn take advantage of sin(-x) --> -sin(x) (PR #79700)

via llvm-commits llvm-commits at lists.llvm.org
Wed Jun 26 20:47:24 PDT 2024


https://github.com/AtariDreams updated https://github.com/llvm/llvm-project/pull/79700

>From 04edaeb08514e5fc4876861251f76d1bd23c1b41 Mon Sep 17 00:00:00 2001
From: Rose <gfunni234 at gmail.com>
Date: Wed, 26 Jun 2024 23:46:53 -0400
Subject: [PATCH 1/2] [Transforms] Add pre-commit tests [NFC]

---
 .../InstCombine/AMDGPU/amdgcn-intrinsics.ll   | 41 +++++++++++++++++++
 1 file changed, 41 insertions(+)

diff --git a/llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll b/llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
index 925e88d041715..218b7b6e053a3 100644
--- a/llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
+++ b/llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
@@ -1023,6 +1023,47 @@ define float @cos_fabs_unary_fneg_f32(float %x) {
   ret float %cos
 }
 
+
+; --------------------------------------------------------------------
+; llvm.amdgcn.sin
+; --------------------------------------------------------------------
+declare float @llvm.amdgcn.sin.f32(float) nounwind readnone
+
+define float @sin_fneg_f32(float %x) {
+; CHECK-LABEL: @sin_fneg_f32(
+; CHECK-NEXT:    [[X_FNEG:%.*]] = fneg float [[X:%.*]]
+; CHECK-NEXT:    [[SIN:%.*]] = call float @llvm.amdgcn.sin.f32(float [[X_FNEG]])
+; CHECK-NEXT:    ret float [[SIN]]
+;
+  %x.fneg = fsub float 0.0, %x
+  %sin = call float @llvm.amdgcn.sin.f32(float %x.fneg)
+  ret float %sin
+}
+
+define float @sin_fabs_f32(float %x) {
+; CHECK-LABEL: @sin_fabs_f32(
+; CHECK-NEXT:    [[X_FABS:%.*]] = call float @llvm.fabs.f32(float [[X:%.*]])
+; CHECK-NEXT:    [[SIN:%.*]] = call float @llvm.amdgcn.sin.f32(float [[X_FABS]])
+; CHECK-NEXT:    ret float [[SIN]]
+;
+  %x.fabs = call float @llvm.fabs.f32(float %x)
+  %sin = call float @llvm.amdgcn.sin.f32(float %x.fabs)
+  ret float %sin
+}
+
+define float @sin_fabs_fneg_f32(float %x) {
+; CHECK-LABEL: @sin_fabs_fneg_f32(
+; CHECK-NEXT:    [[X_FABS:%.*]] = call float @llvm.fabs.f32(float [[X:%.*]])
+; CHECK-NEXT:    [[X_FABS_FNEG:%.*]] = fneg float [[X_FABS]]
+; CHECK-NEXT:    [[SIN:%.*]] = call float @llvm.amdgcn.sin.f32(float [[X_FABS_FNEG]])
+; CHECK-NEXT:    ret float [[SIN]]
+;
+  %x.fabs = call float @llvm.fabs.f32(float %x)
+  %x.fabs.fneg = fsub float -0.0, %x.fabs
+  %sin = call float @llvm.amdgcn.sin.f32(float %x.fabs.fneg)
+  ret float %sin
+}
+
 ; --------------------------------------------------------------------
 ; llvm.amdgcn.cvt.pkrtz
 ; --------------------------------------------------------------------

>From 5506714951bb0926cac03ca5669eb635e6edbe8a Mon Sep 17 00:00:00 2001
From: Rose <gfunni234 at gmail.com>
Date: Wed, 26 Jun 2024 23:47:03 -0400
Subject: [PATCH 2/2] [Transforms] Let amdgcn take advantage of sin(-x) -->
 -sin(x)

We do it for amdgcn_cos, and we should do it for amdgcn_sin as well.
---
 llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp        | 5 +++--
 .../test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll | 6 +++---
 2 files changed, 6 insertions(+), 5 deletions(-)

diff --git a/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp b/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
index b42f0ca296fc5..f9a79ce6e0b80 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
@@ -2573,11 +2573,12 @@ Instruction *InstCombinerImpl::visitCallInst(CallInst &CI) {
     }
     break;
   }
-  case Intrinsic::sin: {
+  case Intrinsic::sin:
+  case Intrinsic::amdgcn_sin: {
     Value *X;
     if (match(II->getArgOperand(0), m_OneUse(m_FNeg(m_Value(X))))) {
       // sin(-x) --> -sin(x)
-      Value *NewSin = Builder.CreateUnaryIntrinsic(Intrinsic::sin, X, II);
+      Value *NewSin = Builder.CreateUnaryIntrinsic(IID, X, II);
       Instruction *FNeg = UnaryOperator::CreateFNeg(NewSin);
       FNeg->copyFastMathFlags(II);
       return FNeg;
diff --git a/llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll b/llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
index 218b7b6e053a3..d6f4e2be0e03c 100644
--- a/llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
+++ b/llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
@@ -1031,7 +1031,7 @@ declare float @llvm.amdgcn.sin.f32(float) nounwind readnone
 
 define float @sin_fneg_f32(float %x) {
 ; CHECK-LABEL: @sin_fneg_f32(
-; CHECK-NEXT:    [[X_FNEG:%.*]] = fneg float [[X:%.*]]
+; CHECK-NEXT:    [[X_FNEG:%.*]] = fsub float 0.000000e+00, [[X:%.*]]
 ; CHECK-NEXT:    [[SIN:%.*]] = call float @llvm.amdgcn.sin.f32(float [[X_FNEG]])
 ; CHECK-NEXT:    ret float [[SIN]]
 ;
@@ -1054,8 +1054,8 @@ define float @sin_fabs_f32(float %x) {
 define float @sin_fabs_fneg_f32(float %x) {
 ; CHECK-LABEL: @sin_fabs_fneg_f32(
 ; CHECK-NEXT:    [[X_FABS:%.*]] = call float @llvm.fabs.f32(float [[X:%.*]])
-; CHECK-NEXT:    [[X_FABS_FNEG:%.*]] = fneg float [[X_FABS]]
-; CHECK-NEXT:    [[SIN:%.*]] = call float @llvm.amdgcn.sin.f32(float [[X_FABS_FNEG]])
+; CHECK-NEXT:    [[TMP1:%.*]] = call float @llvm.amdgcn.sin.f32(float [[X_FABS]])
+; CHECK-NEXT:    [[SIN:%.*]] = fneg float [[TMP1]]
 ; CHECK-NEXT:    ret float [[SIN]]
 ;
   %x.fabs = call float @llvm.fabs.f32(float %x)



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