[llvm] Reapply "[SystemZ] LivePhysRegs to LiveRegUnits (NFC) (#85162)" (PR #96842)
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Wed Jun 26 20:10:31 PDT 2024
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-systemz
Author: AtariDreams (AtariDreams)
<details>
<summary>Changes</summary>
This reverts commit af16d49bb25ad446ee4b243fbd8ca2bc9ac3f8b9.
---
Full diff: https://github.com/llvm/llvm-project/pull/96842.diff
1 Files Affected:
- (modified) llvm/lib/Target/SystemZ/SystemZPostRewrite.cpp (+10-6)
``````````diff
diff --git a/llvm/lib/Target/SystemZ/SystemZPostRewrite.cpp b/llvm/lib/Target/SystemZ/SystemZPostRewrite.cpp
index e15f9027cc209..2536727c70d56 100644
--- a/llvm/lib/Target/SystemZ/SystemZPostRewrite.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZPostRewrite.cpp
@@ -17,7 +17,7 @@
#include "SystemZInstrInfo.h"
#include "SystemZSubtarget.h"
#include "llvm/ADT/Statistic.h"
-#include "llvm/CodeGen/LivePhysRegs.h"
+#include "llvm/CodeGen/LiveRegUnits.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
using namespace llvm;
@@ -161,7 +161,8 @@ bool SystemZPostRewrite::expandCondMove(MachineBasicBlock &MBB,
assert(DestReg == MI.getOperand(1).getReg() &&
"Expected destination and first source operand to be the same.");
- LivePhysRegs LiveRegs(TII->getRegisterInfo());
+ const TargetRegisterInfo &TRI = TII->getRegisterInfo();
+ LiveRegUnits LiveRegs(TRI);
LiveRegs.addLiveOuts(MBB);
for (auto I = std::prev(MBB.end()); I != MBBI; --I)
LiveRegs.stepBackward(*I);
@@ -171,15 +172,18 @@ bool SystemZPostRewrite::expandCondMove(MachineBasicBlock &MBB,
MF.insert(std::next(MachineFunction::iterator(MBB)), RestMBB);
RestMBB->splice(RestMBB->begin(), &MBB, MI, MBB.end());
RestMBB->transferSuccessors(&MBB);
- for (MCPhysReg R : LiveRegs)
- RestMBB->addLiveIn(R);
+ const BitVector &BV = TRI.getAllocatableSet(MF);
+ for (Register Reg : BV.set_bits())
+ if (!LiveRegs.available(Reg))
+ RestMBB->addLiveIn(Reg);
// Create a new block MoveMBB to hold the move instruction.
MachineBasicBlock *MoveMBB = MF.CreateMachineBasicBlock(BB);
MF.insert(std::next(MachineFunction::iterator(MBB)), MoveMBB);
MoveMBB->addLiveIn(SrcReg);
- for (MCPhysReg R : LiveRegs)
- MoveMBB->addLiveIn(R);
+ for (Register Reg : BV.set_bits())
+ if (!LiveRegs.available(Reg))
+ MoveMBB->addLiveIn(Reg);
// At the end of MBB, create a conditional branch to RestMBB if the
// condition is false, otherwise fall through to MoveMBB.
``````````
</details>
https://github.com/llvm/llvm-project/pull/96842
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