[llvm] [WebAssembly] Update generic and bleeding-edge CPUs (PR #96584)
Heejin Ahn via llvm-commits
llvm-commits at lists.llvm.org
Wed Jun 26 15:40:47 PDT 2024
https://github.com/aheejin updated https://github.com/llvm/llvm-project/pull/96584
>From c35701860870bd7f082d11808ec5d3262bd7669b Mon Sep 17 00:00:00 2001
From: Heejin Ahn <aheejin at gmail.com>
Date: Tue, 25 Jun 2024 02:21:23 +0000
Subject: [PATCH 1/4] [WebAssembly] Update generic and bleeding-edge CPUs
This updates the list of features in 'generic' and 'bleeding-edge' CPUs
in the backend to match
https://github.com/llvm/llvm-project/blob/4e0a0eae58f7a6998866719f7eb970096a2a52e9/clang/lib/Basic/Targets/WebAssembly.cpp#L150-L175.
It is hard to add a backend test for this, given that we don't have a
convenient way of testing the list of features included in each cpu like
the preprocessor test in Clang:
https://github.com/llvm/llvm-project/blob/4e0a0eae58f7a6998866719f7eb970096a2a52e9/clang/test/Preprocessor/wasm-target-features.c#L158-L208
And the current features for 'generic' and 'bleeding-edge' don't have a
separate backend test anyway.
---
llvm/lib/Target/WebAssembly/WebAssembly.td | 12 ++++++++----
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/llvm/lib/Target/WebAssembly/WebAssembly.td b/llvm/lib/Target/WebAssembly/WebAssembly.td
index 0dd674426e9e8..97618617ff82f 100644
--- a/llvm/lib/Target/WebAssembly/WebAssembly.td
+++ b/llvm/lib/Target/WebAssembly/WebAssembly.td
@@ -110,13 +110,17 @@ def : ProcessorModel<"mvp", NoSchedModel, []>;
// consideration given to available support in relevant engines and tools, and
// the importance of the features.
def : ProcessorModel<"generic", NoSchedModel,
- [FeatureSignExt, FeatureMutableGlobals]>;
+ [FeatureMultivalue, FeatureMutableGlobals,
+ FeatureReferenceTypes, FeatureSignExt]>;
// Latest and greatest experimental version of WebAssembly. Bugs included!
def : ProcessorModel<"bleeding-edge", NoSchedModel,
- [FeatureSIMD128, FeatureAtomics,
- FeatureNontrappingFPToInt, FeatureSignExt,
- FeatureMutableGlobals, FeatureBulkMemory,
+ [FeatureAtomics, FeatureBulkMemory,
+ FeatureExceptionHandling, FeatureExtendedConst,
+ FeatureHalfPrecision, FeatureMultiMemory,
+ FeatureMultivalue, FeatureMutableGlobals,
+ FeatureNontrappingFPToInt, FeatureRelaxedSIMD,
+ FeatureReferenceTypes, FeatureSIMD128, FeatureSignExt,
FeatureTailCall]>;
//===----------------------------------------------------------------------===//
>From 3186ad74e147067895983c7b322833df1ab26b57 Mon Sep 17 00:00:00 2001
From: Heejin Ahn <aheejin at gmail.com>
Date: Tue, 25 Jun 2024 20:24:07 +0000
Subject: [PATCH 2/4] Update tests
---
llvm/test/CodeGen/WebAssembly/call-indirect.ll | 2 +-
llvm/test/CodeGen/WebAssembly/function-pointer64.ll | 4 ++--
llvm/test/CodeGen/WebAssembly/reg-stackify.ll | 2 +-
llvm/test/CodeGen/WebAssembly/swiftcc.ll | 8 ++++----
llvm/test/MC/WebAssembly/function-alias.ll | 2 +-
llvm/test/MC/WebAssembly/no-dead-strip.ll | 5 +++++
6 files changed, 14 insertions(+), 9 deletions(-)
diff --git a/llvm/test/CodeGen/WebAssembly/call-indirect.ll b/llvm/test/CodeGen/WebAssembly/call-indirect.ll
index b88d0965a0d53..55a654f358490 100644
--- a/llvm/test/CodeGen/WebAssembly/call-indirect.ll
+++ b/llvm/test/CodeGen/WebAssembly/call-indirect.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -asm-verbose=false -O2 | FileCheck --check-prefixes=CHECK,NOREF %s
+; RUN: llc < %s -asm-verbose=false -mattr=-reference-types -O2 | FileCheck --check-prefixes=CHECK,NOREF %s
; RUN: llc < %s -asm-verbose=false -mattr=+reference-types -O2 | FileCheck --check-prefixes=CHECK,REF %s
; RUN: llc < %s -asm-verbose=false -O2 --filetype=obj | obj2yaml | FileCheck --check-prefix=OBJ %s
diff --git a/llvm/test/CodeGen/WebAssembly/function-pointer64.ll b/llvm/test/CodeGen/WebAssembly/function-pointer64.ll
index 7f98d3e648bd4..d5d10b00824fe 100644
--- a/llvm/test/CodeGen/WebAssembly/function-pointer64.ll
+++ b/llvm/test/CodeGen/WebAssembly/function-pointer64.ll
@@ -1,6 +1,6 @@
-; RUN: llc < %s -asm-verbose=false -O2 | FileCheck %s
+; RUN: llc < %s -asm-verbose=false -mattr=-reference-types -O2 | FileCheck %s
; RUN: llc < %s -asm-verbose=false -mattr=+reference-types -O2 | FileCheck --check-prefix=REF %s
-; RUN: llc < %s -asm-verbose=false -O2 --filetype=obj | obj2yaml | FileCheck --check-prefix=YAML %s
+; RUN: llc < %s -asm-verbose=false -mattr=-reference-types -O2 --filetype=obj | obj2yaml | FileCheck --check-prefix=YAML %s
; This tests pointer features that may codegen differently in wasm64.
diff --git a/llvm/test/CodeGen/WebAssembly/reg-stackify.ll b/llvm/test/CodeGen/WebAssembly/reg-stackify.ll
index f9845d4857c41..f1466a48e7394 100644
--- a/llvm/test/CodeGen/WebAssembly/reg-stackify.ll
+++ b/llvm/test/CodeGen/WebAssembly/reg-stackify.ll
@@ -649,7 +649,7 @@ define i32 @stackpointer_dependency(ptr readnone) {
; NOREGS-NEXT: local.tee 0
; NOREGS: i32.load 0
; NOREGS-NEXT: i32.load 0
-; NOREGS-NEXT: call_indirect (i32, i32) -> (i32)
+; NOREGS-NEXT: call_indirect __indirect_function_table, (i32, i32) -> (i32)
%class.call_indirect = type { ptr }
define i32 @call_indirect_stackify(ptr %objptr, i32 %arg) {
%obj = load ptr, ptr %objptr
diff --git a/llvm/test/CodeGen/WebAssembly/swiftcc.ll b/llvm/test/CodeGen/WebAssembly/swiftcc.ll
index e0f67b02c05c6..0c5c3d8bbb0ff 100644
--- a/llvm/test/CodeGen/WebAssembly/swiftcc.ll
+++ b/llvm/test/CodeGen/WebAssembly/swiftcc.ll
@@ -19,21 +19,21 @@ define swiftcc void @bar() {
call swiftcc void @foo(i32 1, i32 2)
; REG: call_indirect $pop{{[0-9]+}}, $pop{{[0-9]+}}, $pop{{[0-9]+}}, $pop{{[0-9]+}}
-; CHECK: call_indirect (i32, i32, i32, i32) -> ()
+; CHECK: call_indirect __indirect_function_table, (i32, i32, i32, i32) -> ()
call swiftcc void %1(i32 1, i32 2)
; REG: call_indirect $pop{{[0-9]+}}, $pop{{[0-9]+}}, $pop{{[0-9]+}}, $pop{{[0-9]+}}
-; CHECK: call_indirect (i32, i32, i32, i32) -> ()
+; CHECK: call_indirect __indirect_function_table, (i32, i32, i32, i32) -> ()
call swiftcc void %1(i32 1, i32 2, i32 swiftself 3)
%err = alloca swifterror ptr, align 4
; REG: call_indirect $pop{{[0-9]+}}, $pop{{[0-9]+}}, $pop{{[0-9]+}}, $pop{{[0-9]+}}
-; CHECK: call_indirect (i32, i32, i32, i32) -> ()
+; CHECK: call_indirect __indirect_function_table, (i32, i32, i32, i32) -> ()
call swiftcc void %1(i32 1, i32 2, ptr swifterror %err)
; REG: call_indirect $pop{{[0-9]+}}, $pop{{[0-9]+}}, $pop{{[0-9]+}}, $pop{{[0-9]+}}
-; CHECK: call_indirect (i32, i32, i32, i32) -> ()
+; CHECK: call_indirect __indirect_function_table, (i32, i32, i32, i32) -> ()
call swiftcc void %1(i32 1, i32 2, i32 swiftself 3, ptr swifterror %err)
ret void
diff --git a/llvm/test/MC/WebAssembly/function-alias.ll b/llvm/test/MC/WebAssembly/function-alias.ll
index 6722d18fe7cc8..036cd7d06e063 100644
--- a/llvm/test/MC/WebAssembly/function-alias.ll
+++ b/llvm/test/MC/WebAssembly/function-alias.ll
@@ -1,4 +1,4 @@
-; RUN: llc -filetype=obj %s -o - | llvm-readobj --symbols - | FileCheck %s
+; RUN: llc -filetype=obj %s -mattr=-reference-types -o - | llvm-readobj --symbols - | FileCheck %s
; RUN: llc -filetype=obj %s -mattr=+reference-types -o - | llvm-readobj --symbols - | FileCheck --check-prefix=REF %s
target triple = "wasm32-unknown-unknown-wasm"
diff --git a/llvm/test/MC/WebAssembly/no-dead-strip.ll b/llvm/test/MC/WebAssembly/no-dead-strip.ll
index 6b3f090d9cab8..3125dcf453225 100644
--- a/llvm/test/MC/WebAssembly/no-dead-strip.ll
+++ b/llvm/test/MC/WebAssembly/no-dead-strip.ll
@@ -50,6 +50,11 @@ entry:
; CHECK-NEXT: Segment: 3
; CHECK-NEXT: Offset: 8
; CHECK-NEXT: Size: 8
+; CHECK-NEXT: - Index: 5
+; CHECK-NEXT: Kind: TABLE
+; CHECK-NEXT: Name: __indirect_function_table
+; CHECK-NEXT: Flags: [ UNDEFINED, NO_STRIP ]
+; CHECK-NEXT: Table: 0
; CHECK-NEXT: SegmentInfo:
; CHECK-NEXT: - Index: 0
; CHECK-NEXT: Name: .data.gv0
>From 8898c98d4cbc81eec452bebf39f9bc5e9b9d5b7d Mon Sep 17 00:00:00 2001
From: Heejin Ahn <aheejin at gmail.com>
Date: Wed, 26 Jun 2024 20:34:46 +0000
Subject: [PATCH 3/4] Update target-features-cpus.ll
---
.../WebAssembly/target-features-cpus.ll | 31 +++++++++++++++++--
1 file changed, 29 insertions(+), 2 deletions(-)
diff --git a/llvm/test/CodeGen/WebAssembly/target-features-cpus.ll b/llvm/test/CodeGen/WebAssembly/target-features-cpus.ll
index d368271682a96..13fde962c616c 100644
--- a/llvm/test/CodeGen/WebAssembly/target-features-cpus.ll
+++ b/llvm/test/CodeGen/WebAssembly/target-features-cpus.ll
@@ -13,18 +13,24 @@ target triple = "wasm32-unknown-unknown"
; generic: +mutable-globals, +sign-ext
; GENERIC-LABEL: .custom_section.target_features,"",@
-; GENERIC-NEXT: .int8 2
+; GENERIC-NEXT: .int8 4
+; GENERIC-NEXT: .int8 43
+; GENERIC-NEXT: .int8 10
+; GENERIC-NEXT: .ascii "multivalue"
; GENERIC-NEXT: .int8 43
; GENERIC-NEXT: .int8 15
; GENERIC-NEXT: .ascii "mutable-globals"
; GENERIC-NEXT: .int8 43
+; GENERIC-NEXT: .int8 15
+; GENERIC-NEXT: .ascii "reference-types"
+; GENERIC-NEXT: .int8 43
; GENERIC-NEXT: .int8 8
; GENERIC-NEXT: .ascii "sign-ext"
; bleeding-edge: +atomics, +bulk-memory, +mutable-globals, +nontrapping-fptoint,
; +sign-ext, +simd128, +tail-call
; BLEEDING-EDGE-LABEL: .section .custom_section.target_features,"",@
-; BLEEDING-EDGE-NEXT: .int8 7
+; BLEEDING-EDGE-NEXT: .int8 14
; BLEEDING-EDGE-NEXT: .int8 43
; BLEEDING-EDGE-NEXT: .int8 7
; BLEEDING-EDGE-NEXT: .ascii "atomics"
@@ -32,12 +38,33 @@ target triple = "wasm32-unknown-unknown"
; BLEEDING-EDGE-NEXT: .int8 11
; BLEEDING-EDGE-NEXT: .ascii "bulk-memory"
; BLEEDING-EDGE-NEXT: .int8 43
+; BLEEDING-EDGE-NEXT: .int8 18
+; BLEEDING-EDGE-NEXT: .ascii "exception-handling"
+; BLEEDING-EDGE-NEXT: .int8 43
+; BLEEDING-EDGE-NEXT: .int8 14
+; BLEEDING-EDGE-NEXT: .ascii "extended-const"
+; BLEEDING-EDGE-NEXT: .int8 43
+; BLEEDING-EDGE-NEXT: .int8 14
+; BLEEDING-EDGE-NEXT: .ascii "half-precision"
+; BLEEDING-EDGE-NEXT: .int8 43
+; BLEEDING-EDGE-NEXT: .int8 11
+; BLEEDING-EDGE-NEXT: .ascii "multimemory"
+; BLEEDING-EDGE-NEXT: .int8 43
+; BLEEDING-EDGE-NEXT: .int8 10
+; BLEEDING-EDGE-NEXT: .ascii "multivalue"
+; BLEEDING-EDGE-NEXT: .int8 43
; BLEEDING-EDGE-NEXT: .int8 15
; BLEEDING-EDGE-NEXT: .ascii "mutable-globals"
; BLEEDING-EDGE-NEXT: .int8 43
; BLEEDING-EDGE-NEXT: .int8 19
; BLEEDING-EDGE-NEXT: .ascii "nontrapping-fptoint"
; BLEEDING-EDGE-NEXT: .int8 43
+; BLEEDING-EDGE-NEXT: .int8 15
+; BLEEDING-EDGE-NEXT: .ascii "reference-types"
+; BLEEDING-EDGE-NEXT: .int8 43
+; BLEEDING-EDGE-NEXT: .int8 12
+; BLEEDING-EDGE-NEXT: .ascii "relaxed-simd"
+; BLEEDING-EDGE-NEXT: .int8 43
; BLEEDING-EDGE-NEXT: .int8 8
; BLEEDING-EDGE-NEXT: .ascii "sign-ext"
; BLEEDING-EDGE-NEXT: .int8 43
>From a0d71f81b74318fda48ee4922a265444314136e7 Mon Sep 17 00:00:00 2001
From: Heejin Ahn <aheejin at gmail.com>
Date: Wed, 26 Jun 2024 22:40:25 +0000
Subject: [PATCH 4/4] Update feature names in target-features-cpus.ll
---
llvm/test/CodeGen/WebAssembly/target-features-cpus.ll | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/llvm/test/CodeGen/WebAssembly/target-features-cpus.ll b/llvm/test/CodeGen/WebAssembly/target-features-cpus.ll
index 13fde962c616c..d93147505c1b0 100644
--- a/llvm/test/CodeGen/WebAssembly/target-features-cpus.ll
+++ b/llvm/test/CodeGen/WebAssembly/target-features-cpus.ll
@@ -11,7 +11,7 @@ target triple = "wasm32-unknown-unknown"
; mvp: should not contain the target features section
; MVP-NOT: .custom_section.target_features,"",@
-; generic: +mutable-globals, +sign-ext
+; generic: +multivalue, +mutable-globals, +reference-types, +sign-ext
; GENERIC-LABEL: .custom_section.target_features,"",@
; GENERIC-NEXT: .int8 4
; GENERIC-NEXT: .int8 43
@@ -27,8 +27,10 @@ target triple = "wasm32-unknown-unknown"
; GENERIC-NEXT: .int8 8
; GENERIC-NEXT: .ascii "sign-ext"
-; bleeding-edge: +atomics, +bulk-memory, +mutable-globals, +nontrapping-fptoint,
-; +sign-ext, +simd128, +tail-call
+; bleeding-edge: +atomics, +bulk-memory, +exception-handling, +extended-const,
+; +half-precision, +multimemory, +multivalue, +mutable-globals,
+; +nontrapping-fptoint, +relaxed-simd, +reference-types,
+; +simd128, +sign-ext, +tail-call
; BLEEDING-EDGE-LABEL: .section .custom_section.target_features,"",@
; BLEEDING-EDGE-NEXT: .int8 14
; BLEEDING-EDGE-NEXT: .int8 43
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