[llvm] 868fae1 - [RISCV][GISel] Support G_FPEXT/FPTRUNC with ZFh.
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Wed Jun 26 11:13:23 PDT 2024
Author: Craig Topper
Date: 2024-06-26T11:11:05-07:00
New Revision: 868fae1f2ecb54604231c1334ce9aa5b4c0b1288
URL: https://github.com/llvm/llvm-project/commit/868fae1f2ecb54604231c1334ce9aa5b4c0b1288
DIFF: https://github.com/llvm/llvm-project/commit/868fae1f2ecb54604231c1334ce9aa5b4c0b1288.diff
LOG: [RISCV][GISel] Support G_FPEXT/FPTRUNC with ZFh.
Added:
llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/fp-ext-trunc-f16.mir
llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-fp-ext-trunc-f16.mir
llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/fp-ext-trunc-f16.mir
Modified:
llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp b/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
index fc616d0b4a80f..f033ea7250030 100644
--- a/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
+++ b/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
@@ -384,15 +384,24 @@ RISCVLegalizerInfo::RISCVLegalizerInfo(const RISCVSubtarget &ST)
getActionDefinitionsBuilder(G_FCOPYSIGN)
.legalIf(all(typeIsScalarFPArith(0, ST), typeIsScalarFPArith(1, ST)));
+ // FIXME: Use Zfhmin.
getActionDefinitionsBuilder(G_FPTRUNC).legalIf(
[=, &ST](const LegalityQuery &Query) -> bool {
return (ST.hasStdExtD() && typeIs(0, s32)(Query) &&
+ typeIs(1, s64)(Query)) ||
+ (ST.hasStdExtZfh() && typeIs(0, s16)(Query) &&
+ typeIs(1, s32)(Query)) ||
+ (ST.hasStdExtZfh() && ST.hasStdExtD() && typeIs(0, s16)(Query) &&
typeIs(1, s64)(Query));
});
getActionDefinitionsBuilder(G_FPEXT).legalIf(
[=, &ST](const LegalityQuery &Query) -> bool {
return (ST.hasStdExtD() && typeIs(0, s64)(Query) &&
- typeIs(1, s32)(Query));
+ typeIs(1, s32)(Query)) ||
+ (ST.hasStdExtZfh() && typeIs(0, s32)(Query) &&
+ typeIs(1, s16)(Query)) ||
+ (ST.hasStdExtZfh() && ST.hasStdExtD() && typeIs(0, s64)(Query) &&
+ typeIs(1, s16)(Query));
});
getActionDefinitionsBuilder(G_FCMP)
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/fp-ext-trunc-f16.mir b/llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/fp-ext-trunc-f16.mir
new file mode 100644
index 0000000000000..966604c4838e5
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/fp-ext-trunc-f16.mir
@@ -0,0 +1,94 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=riscv32 -mattr=+d,+zfh -run-pass=instruction-select \
+# RUN: -simplify-mir -verify-machineinstrs %s -o - | FileCheck %s
+# RUN: llc -mtriple=riscv64 -mattr=+d,+zfh -run-pass=instruction-select \
+# RUN: -simplify-mir -verify-machineinstrs %s -o - | FileCheck %s
+
+---
+name: fpext_f32
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+body: |
+ bb.1:
+ liveins: $f10_h
+
+ ; CHECK-LABEL: name: fpext_f32
+ ; CHECK: liveins: $f10_h
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr16 = COPY $f10_h
+ ; CHECK-NEXT: [[FCVT_S_H:%[0-9]+]]:fpr32 = nofpexcept FCVT_S_H [[COPY]], 0
+ ; CHECK-NEXT: $f10_f = COPY [[FCVT_S_H]]
+ ; CHECK-NEXT: PseudoRET implicit $f10_f
+ %0:fprb(s16) = COPY $f10_h
+ %1:fprb(s32) = G_FPEXT %0(s16)
+ $f10_f = COPY %1(s32)
+ PseudoRET implicit $f10_f
+
+...
+---
+name: fptrunc_f32
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+body: |
+ bb.1:
+ liveins: $f10_f
+
+ ; CHECK-LABEL: name: fptrunc_f32
+ ; CHECK: liveins: $f10_f
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr32 = COPY $f10_f
+ ; CHECK-NEXT: [[FCVT_H_S:%[0-9]+]]:fpr16 = nofpexcept FCVT_H_S [[COPY]], 7
+ ; CHECK-NEXT: $f10_h = COPY [[FCVT_H_S]]
+ ; CHECK-NEXT: PseudoRET implicit $f10_h
+ %0:fprb(s32) = COPY $f10_f
+ %1:fprb(s16) = G_FPTRUNC %0(s32)
+ $f10_h = COPY %1(s16)
+ PseudoRET implicit $f10_h
+
+...
+---
+name: fpext_f64
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+body: |
+ bb.1:
+ liveins: $f10_h
+
+ ; CHECK-LABEL: name: fpext_f64
+ ; CHECK: liveins: $f10_h
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr16 = COPY $f10_h
+ ; CHECK-NEXT: [[FCVT_D_H:%[0-9]+]]:fpr64 = nofpexcept FCVT_D_H [[COPY]], 0
+ ; CHECK-NEXT: $f10_d = COPY [[FCVT_D_H]]
+ ; CHECK-NEXT: PseudoRET implicit $f10_d
+ %0:fprb(s16) = COPY $f10_h
+ %1:fprb(s64) = G_FPEXT %0(s16)
+ $f10_d = COPY %1(s64)
+ PseudoRET implicit $f10_d
+
+...
+---
+name: fptrunc_f64
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+body: |
+ bb.1:
+ liveins: $f10_d
+
+ ; CHECK-LABEL: name: fptrunc_f64
+ ; CHECK: liveins: $f10_d
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $f10_d
+ ; CHECK-NEXT: [[FCVT_H_D:%[0-9]+]]:fpr16 = nofpexcept FCVT_H_D [[COPY]], 7
+ ; CHECK-NEXT: $f10_h = COPY [[FCVT_H_D]]
+ ; CHECK-NEXT: PseudoRET implicit $f10_h
+ %0:fprb(s64) = COPY $f10_d
+ %1:fprb(s16) = G_FPTRUNC %0(s64)
+ $f10_h = COPY %1(s16)
+ PseudoRET implicit $f10_h
+
+...
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-fp-ext-trunc-f16.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-fp-ext-trunc-f16.mir
new file mode 100644
index 0000000000000..4b091540c5b97
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-fp-ext-trunc-f16.mir
@@ -0,0 +1,82 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 3
+# RUN: llc -mtriple=riscv32 -mattr=+d,+zfh -run-pass=legalizer %s -o - \
+# RUN: | FileCheck %s
+# RUN: llc -mtriple=riscv64 -mattr=+d,+zfh -run-pass=legalizer %s -o - \
+# RUN: | FileCheck %s
+
+---
+name: fpext_f32
+body: |
+ bb.1:
+ liveins: $f10_h
+
+ ; CHECK-LABEL: name: fpext_f32
+ ; CHECK: liveins: $f10_h
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s16) = COPY $f10_h
+ ; CHECK-NEXT: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[COPY]](s16)
+ ; CHECK-NEXT: $f10_f = COPY [[FPEXT]](s32)
+ ; CHECK-NEXT: PseudoRET implicit $f10_f
+ %0:_(s16) = COPY $f10_h
+ %1:_(s32) = G_FPEXT %0(s16)
+ $f10_f = COPY %1(s32)
+ PseudoRET implicit $f10_f
+
+...
+---
+name: fptrunc_f32
+body: |
+ bb.1:
+ liveins: $f10_f
+
+ ; CHECK-LABEL: name: fptrunc_f32
+ ; CHECK: liveins: $f10_f
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $f10_f
+ ; CHECK-NEXT: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[COPY]](s32)
+ ; CHECK-NEXT: $f10_h = COPY [[FPTRUNC]](s16)
+ ; CHECK-NEXT: PseudoRET implicit $f10_h
+ %0:_(s32) = COPY $f10_f
+ %1:_(s16) = G_FPTRUNC %0(s32)
+ $f10_h = COPY %1(s16)
+ PseudoRET implicit $f10_h
+
+...
+---
+name: fpext_f64
+body: |
+ bb.1:
+ liveins: $f10_h
+
+ ; CHECK-LABEL: name: fpext_f64
+ ; CHECK: liveins: $f10_h
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s16) = COPY $f10_h
+ ; CHECK-NEXT: [[FPEXT:%[0-9]+]]:_(s64) = G_FPEXT [[COPY]](s16)
+ ; CHECK-NEXT: $f10_d = COPY [[FPEXT]](s64)
+ ; CHECK-NEXT: PseudoRET implicit $f10_d
+ %0:_(s16) = COPY $f10_h
+ %1:_(s64) = G_FPEXT %0(s16)
+ $f10_d = COPY %1(s64)
+ PseudoRET implicit $f10_d
+
+...
+---
+name: fptrunc_f64
+body: |
+ bb.1:
+ liveins: $f10_d
+
+ ; CHECK-LABEL: name: fptrunc_f64
+ ; CHECK: liveins: $f10_d
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $f10_d
+ ; CHECK-NEXT: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[COPY]](s64)
+ ; CHECK-NEXT: $f10_h = COPY [[FPTRUNC]](s16)
+ ; CHECK-NEXT: PseudoRET implicit $f10_h
+ %0:_(s64) = COPY $f10_d
+ %1:_(s16) = G_FPTRUNC %0(s64)
+ $f10_h = COPY %1(s16)
+ PseudoRET implicit $f10_h
+
+...
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/fp-ext-trunc-f16.mir b/llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/fp-ext-trunc-f16.mir
new file mode 100644
index 0000000000000..7758a640ac860
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/fp-ext-trunc-f16.mir
@@ -0,0 +1,92 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=riscv32 -mattr=+d,zfh -run-pass=regbankselect \
+# RUN: -simplify-mir -verify-machineinstrs %s \
+# RUN: -o - | FileCheck %s
+# RUN: llc -mtriple=riscv64 -mattr=+d,zfh -run-pass=regbankselect \
+# RUN: -simplify-mir -verify-machineinstrs %s \
+# RUN: -o - | FileCheck %s
+
+---
+name: fpext_f32
+legalized: true
+tracksRegLiveness: true
+body: |
+ bb.1:
+ liveins: $f10_h
+
+ ; CHECK-LABEL: name: fpext_f32
+ ; CHECK: liveins: $f10_h
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:fprb(s16) = COPY $f10_h
+ ; CHECK-NEXT: [[FPEXT:%[0-9]+]]:fprb(s32) = G_FPEXT [[COPY]](s16)
+ ; CHECK-NEXT: $f10_f = COPY [[FPEXT]](s32)
+ ; CHECK-NEXT: PseudoRET implicit $f10_f
+ %0:_(s16) = COPY $f10_h
+ %1:_(s32) = G_FPEXT %0(s16)
+ $f10_f = COPY %1(s32)
+ PseudoRET implicit $f10_f
+
+...
+---
+name: fptrunc_f32
+legalized: true
+tracksRegLiveness: true
+body: |
+ bb.1:
+ liveins: $f10_f
+
+ ; CHECK-LABEL: name: fptrunc_f32
+ ; CHECK: liveins: $f10_f
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:fprb(s32) = COPY $f10_f
+ ; CHECK-NEXT: [[FPTRUNC:%[0-9]+]]:fprb(s16) = G_FPTRUNC [[COPY]](s32)
+ ; CHECK-NEXT: $f10_h = COPY [[FPTRUNC]](s16)
+ ; CHECK-NEXT: PseudoRET implicit $f10_h
+ %0:_(s32) = COPY $f10_f
+ %1:_(s16) = G_FPTRUNC %0(s32)
+ $f10_h = COPY %1(s16)
+ PseudoRET implicit $f10_h
+
+...
+---
+name: fpext_f64
+legalized: true
+tracksRegLiveness: true
+body: |
+ bb.1:
+ liveins: $f10_h
+
+ ; CHECK-LABEL: name: fpext_f64
+ ; CHECK: liveins: $f10_h
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:fprb(s16) = COPY $f10_h
+ ; CHECK-NEXT: [[FPEXT:%[0-9]+]]:fprb(s64) = G_FPEXT [[COPY]](s16)
+ ; CHECK-NEXT: $f10_d = COPY [[FPEXT]](s64)
+ ; CHECK-NEXT: PseudoRET implicit $f10_d
+ %0:_(s16) = COPY $f10_h
+ %1:_(s64) = G_FPEXT %0(s16)
+ $f10_d = COPY %1(s64)
+ PseudoRET implicit $f10_d
+
+...
+---
+name: fptrunc_f64
+legalized: true
+tracksRegLiveness: true
+body: |
+ bb.1:
+ liveins: $f10_d
+
+ ; CHECK-LABEL: name: fptrunc_f64
+ ; CHECK: liveins: $f10_d
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:fprb(s64) = COPY $f10_d
+ ; CHECK-NEXT: [[FPTRUNC:%[0-9]+]]:fprb(s16) = G_FPTRUNC [[COPY]](s64)
+ ; CHECK-NEXT: $f10_h = COPY [[FPTRUNC]](s16)
+ ; CHECK-NEXT: PseudoRET implicit $f10_h
+ %0:_(s64) = COPY $f10_d
+ %1:_(s16) = G_FPTRUNC %0(s64)
+ $f10_h = COPY %1(s16)
+ PseudoRET implicit $f10_h
+
+...
More information about the llvm-commits
mailing list