[llvm] [CodeGen] Use range-based for loops (NFC) (PR #96777)
Kazu Hirata via llvm-commits
llvm-commits at lists.llvm.org
Wed Jun 26 07:50:35 PDT 2024
https://github.com/kazutakahirata created https://github.com/llvm/llvm-project/pull/96777
None
>From 2969039e86937561763bbae1265ac07630c3231a Mon Sep 17 00:00:00 2001
From: Kazu Hirata <kazu at google.com>
Date: Tue, 25 Jun 2024 07:51:50 -0700
Subject: [PATCH] [CodeGen] Use range-based for loops (NFC)
---
llvm/include/llvm/CodeGen/BasicTTIImpl.h | 10 ++++------
llvm/lib/CodeGen/AsmPrinter/DIE.cpp | 20 ++++++++-----------
.../CodeGen/AssignmentTrackingAnalysis.cpp | 12 +++++------
llvm/lib/CodeGen/EarlyIfConversion.cpp | 9 +++------
llvm/lib/CodeGen/LexicalScopes.cpp | 6 +++---
llvm/lib/CodeGen/LiveDebugVariables.cpp | 12 +++++------
llvm/lib/CodeGen/PeepholeOptimizer.cpp | 3 +--
llvm/lib/CodeGen/RegisterCoalescer.cpp | 10 +++++-----
.../CodeGen/SelectionDAG/LegalizeTypes.cpp | 3 +--
.../CodeGen/SelectionDAG/ScheduleDAGFast.cpp | 3 +--
llvm/lib/CodeGen/StackSlotColoring.cpp | 4 ++--
llvm/lib/CodeGen/TailDuplicator.cpp | 3 +--
llvm/lib/CodeGen/VLIWMachineScheduler.cpp | 8 ++++----
13 files changed, 45 insertions(+), 58 deletions(-)
diff --git a/llvm/include/llvm/CodeGen/BasicTTIImpl.h b/llvm/include/llvm/CodeGen/BasicTTIImpl.h
index 9f8d3ded9b3c1..4f1dc9f991c06 100644
--- a/llvm/include/llvm/CodeGen/BasicTTIImpl.h
+++ b/llvm/include/llvm/CodeGen/BasicTTIImpl.h
@@ -1945,8 +1945,7 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
ScalarRetTy = RetTy->getScalarType();
}
SmallVector<Type *, 4> ScalarTys;
- for (unsigned i = 0, ie = Tys.size(); i != ie; ++i) {
- Type *Ty = Tys[i];
+ for (Type *Ty : Tys) {
if (auto *VTy = dyn_cast<VectorType>(Ty)) {
if (!SkipScalarizationCost)
ScalarizationCost += getScalarizationOverhead(
@@ -2368,8 +2367,7 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
unsigned ScalarCalls = cast<FixedVectorType>(RetVTy)->getNumElements();
SmallVector<Type *, 4> ScalarTys;
- for (unsigned i = 0, ie = Tys.size(); i != ie; ++i) {
- Type *Ty = Tys[i];
+ for (Type *Ty : Tys) {
if (Ty->isVectorTy())
Ty = Ty->getScalarType();
ScalarTys.push_back(Ty);
@@ -2377,8 +2375,8 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
IntrinsicCostAttributes Attrs(IID, RetTy->getScalarType(), ScalarTys, FMF);
InstructionCost ScalarCost =
thisT()->getIntrinsicInstrCost(Attrs, CostKind);
- for (unsigned i = 0, ie = Tys.size(); i != ie; ++i) {
- if (auto *VTy = dyn_cast<VectorType>(Tys[i])) {
+ for (Type *Ty : Tys) {
+ if (auto *VTy = dyn_cast<VectorType>(Ty)) {
if (!ICA.skipScalarizationCost())
ScalarizationCost += getScalarizationOverhead(
VTy, /*Insert*/ false, /*Extract*/ true, CostKind);
diff --git a/llvm/lib/CodeGen/AsmPrinter/DIE.cpp b/llvm/lib/CodeGen/AsmPrinter/DIE.cpp
index 619155cafe927..4bbf66206bfba 100644
--- a/llvm/lib/CodeGen/AsmPrinter/DIE.cpp
+++ b/llvm/lib/CodeGen/AsmPrinter/DIE.cpp
@@ -53,8 +53,8 @@ void DIEAbbrev::Profile(FoldingSetNodeID &ID) const {
ID.AddInteger(unsigned(Children));
// For each attribute description.
- for (unsigned i = 0, N = Data.size(); i < N; ++i)
- Data[i].Profile(ID);
+ for (const DIEAbbrevData &D : Data)
+ D.Profile(ID);
}
/// Emit - Print the abbreviation using the specified asm printer.
@@ -67,9 +67,7 @@ void DIEAbbrev::Emit(const AsmPrinter *AP) const {
AP->emitULEB128((unsigned)Children, dwarf::ChildrenString(Children).data());
// For each attribute description.
- for (unsigned i = 0, N = Data.size(); i < N; ++i) {
- const DIEAbbrevData &AttrData = Data[i];
-
+ for (const DIEAbbrevData &AttrData : Data) {
// Emit attribute type.
AP->emitULEB128(AttrData.getAttribute(),
dwarf::AttributeString(AttrData.getAttribute()).data());
@@ -109,14 +107,12 @@ void DIEAbbrev::print(raw_ostream &O) const {
<< dwarf::ChildrenString(Children)
<< '\n';
- for (unsigned i = 0, N = Data.size(); i < N; ++i) {
- O << " "
- << dwarf::AttributeString(Data[i].getAttribute())
- << " "
- << dwarf::FormEncodingString(Data[i].getForm());
+ for (const DIEAbbrevData &D : Data) {
+ O << " " << dwarf::AttributeString(D.getAttribute()) << " "
+ << dwarf::FormEncodingString(D.getForm());
- if (Data[i].getForm() == dwarf::DW_FORM_implicit_const)
- O << " " << Data[i].getValue();
+ if (D.getForm() == dwarf::DW_FORM_implicit_const)
+ O << " " << D.getValue();
O << '\n';
}
diff --git a/llvm/lib/CodeGen/AssignmentTrackingAnalysis.cpp b/llvm/lib/CodeGen/AssignmentTrackingAnalysis.cpp
index 8afd75069589e..b34077154e842 100644
--- a/llvm/lib/CodeGen/AssignmentTrackingAnalysis.cpp
+++ b/llvm/lib/CodeGen/AssignmentTrackingAnalysis.cpp
@@ -891,9 +891,9 @@ class MemLocFragmentFill {
DenseMap<BasicBlock *, unsigned int> BBToOrder;
{ // Init OrderToBB and BBToOrder.
unsigned int RPONumber = 0;
- for (auto RI = RPOT.begin(), RE = RPOT.end(); RI != RE; ++RI) {
- OrderToBB[RPONumber] = *RI;
- BBToOrder[*RI] = RPONumber;
+ for (BasicBlock *BB : RPOT) {
+ OrderToBB[RPONumber] = BB;
+ BBToOrder[BB] = RPONumber;
Worklist.push(RPONumber);
++RPONumber;
}
@@ -2312,9 +2312,9 @@ bool AssignmentTrackingLowering::run(FunctionVarLocsBuilder *FnVarLocsBuilder) {
DenseMap<BasicBlock *, unsigned int> BBToOrder;
{ // Init OrderToBB and BBToOrder.
unsigned int RPONumber = 0;
- for (auto RI = RPOT.begin(), RE = RPOT.end(); RI != RE; ++RI) {
- OrderToBB[RPONumber] = *RI;
- BBToOrder[*RI] = RPONumber;
+ for (BasicBlock *BB : RPOT) {
+ OrderToBB[RPONumber] = BB;
+ BBToOrder[BB] = RPONumber;
Worklist.push(RPONumber);
++RPONumber;
}
diff --git a/llvm/lib/CodeGen/EarlyIfConversion.cpp b/llvm/lib/CodeGen/EarlyIfConversion.cpp
index 30480e598acef..0135f330bf445 100644
--- a/llvm/lib/CodeGen/EarlyIfConversion.cpp
+++ b/llvm/lib/CodeGen/EarlyIfConversion.cpp
@@ -617,8 +617,7 @@ void SSAIfConv::replacePHIInstrs() {
DebugLoc HeadDL = FirstTerm->getDebugLoc();
// Convert all PHIs to select instructions inserted before FirstTerm.
- for (unsigned i = 0, e = PHIs.size(); i != e; ++i) {
- PHIInfo &PI = PHIs[i];
+ for (PHIInfo &PI : PHIs) {
LLVM_DEBUG(dbgs() << "If-converting " << *PI.PHI);
Register DstReg = PI.PHI->getOperand(0).getReg();
if (hasSameValue(*MRI, TII, PI.TReg, PI.FReg)) {
@@ -645,8 +644,7 @@ void SSAIfConv::rewritePHIOperands() {
DebugLoc HeadDL = FirstTerm->getDebugLoc();
// Convert all PHIs to select instructions inserted before FirstTerm.
- for (unsigned i = 0, e = PHIs.size(); i != e; ++i) {
- PHIInfo &PI = PHIs[i];
+ for (PHIInfo &PI : PHIs) {
unsigned DstReg = 0;
LLVM_DEBUG(dbgs() << "If-converting " << *PI.PHI);
@@ -962,8 +960,7 @@ bool EarlyIfConverter::shouldConvertIf() {
CriticalPathInfo TBlock{};
CriticalPathInfo FBlock{};
bool ShouldConvert = true;
- for (unsigned i = 0, e = IfConv.PHIs.size(); i != e; ++i) {
- SSAIfConv::PHIInfo &PI = IfConv.PHIs[i];
+ for (SSAIfConv::PHIInfo &PI : IfConv.PHIs) {
unsigned Slack = TailTrace.getInstrSlack(*PI.PHI);
unsigned MaxDepth = Slack + TailTrace.getInstrCycles(*PI.PHI).Depth;
LLVM_DEBUG(dbgs() << "Slack " << Slack << ":\t" << *PI.PHI);
diff --git a/llvm/lib/CodeGen/LexicalScopes.cpp b/llvm/lib/CodeGen/LexicalScopes.cpp
index 47c19c3d8ec45..6dbd2ca00f316 100644
--- a/llvm/lib/CodeGen/LexicalScopes.cpp
+++ b/llvm/lib/CodeGen/LexicalScopes.cpp
@@ -340,8 +340,8 @@ LLVM_DUMP_METHOD void LexicalScope::dump(unsigned Indent) const {
if (!Children.empty())
err << std::string(Indent + 2, ' ') << "Children ...\n";
- for (unsigned i = 0, e = Children.size(); i != e; ++i)
- if (Children[i] != this)
- Children[i]->dump(Indent + 2);
+ for (const LexicalScope *Child : Children)
+ if (Child != this)
+ Child->dump(Indent + 2);
}
#endif
diff --git a/llvm/lib/CodeGen/LiveDebugVariables.cpp b/llvm/lib/CodeGen/LiveDebugVariables.cpp
index 16d8e916ce668..3224bedcb58d2 100644
--- a/llvm/lib/CodeGen/LiveDebugVariables.cpp
+++ b/llvm/lib/CodeGen/LiveDebugVariables.cpp
@@ -764,9 +764,9 @@ void LDVImpl::print(raw_ostream &OS) {
#endif
void UserValue::mapVirtRegs(LDVImpl *LDV) {
- for (unsigned i = 0, e = locations.size(); i != e; ++i)
- if (locations[i].isReg() && locations[i].getReg().isVirtual())
- LDV->mapVirtReg(locations[i].getReg(), this);
+ for (const MachineOperand &MO : locations)
+ if (MO.isReg() && MO.getReg().isVirtual())
+ LDV->mapVirtReg(MO.getReg(), this);
}
UserValue *
@@ -1254,9 +1254,9 @@ void LDVImpl::computeIntervals() {
LexicalScopes LS;
LS.initialize(*MF);
- for (unsigned i = 0, e = userValues.size(); i != e; ++i) {
- userValues[i]->computeIntervals(MF->getRegInfo(), *TRI, *LIS, LS);
- userValues[i]->mapVirtRegs(this);
+ for (const auto &UV : userValues) {
+ UV->computeIntervals(MF->getRegInfo(), *TRI, *LIS, LS);
+ UV->mapVirtRegs(this);
}
}
diff --git a/llvm/lib/CodeGen/PeepholeOptimizer.cpp b/llvm/lib/CodeGen/PeepholeOptimizer.cpp
index e6fe7a070f2a5..2e078be29082d 100644
--- a/llvm/lib/CodeGen/PeepholeOptimizer.cpp
+++ b/llvm/lib/CodeGen/PeepholeOptimizer.cpp
@@ -615,8 +615,7 @@ optimizeExtInstr(MachineInstr &MI, MachineBasicBlock &MBB,
PHIBBs.insert(UI.getParent());
const TargetRegisterClass *RC = MRI->getRegClass(SrcReg);
- for (unsigned i = 0, e = Uses.size(); i != e; ++i) {
- MachineOperand *UseMO = Uses[i];
+ for (MachineOperand *UseMO : Uses) {
MachineInstr *UseMI = UseMO->getParent();
MachineBasicBlock *UseMBB = UseMI->getParent();
if (PHIBBs.count(UseMBB))
diff --git a/llvm/lib/CodeGen/RegisterCoalescer.cpp b/llvm/lib/CodeGen/RegisterCoalescer.cpp
index 3397cb4f3661f..9f4f23807d82f 100644
--- a/llvm/lib/CodeGen/RegisterCoalescer.cpp
+++ b/llvm/lib/CodeGen/RegisterCoalescer.cpp
@@ -1855,8 +1855,8 @@ void RegisterCoalescer::updateRegDefsUses(Register SrcReg, Register DstReg,
Reads = DstInt->liveAt(LIS->getInstructionIndex(*UseMI));
// Replace SrcReg with DstReg in all UseMI operands.
- for (unsigned i = 0, e = Ops.size(); i != e; ++i) {
- MachineOperand &MO = UseMI->getOperand(Ops[i]);
+ for (unsigned Op : Ops) {
+ MachineOperand &MO = UseMI->getOperand(Op);
// Adjust <undef> flags in case of sub-register joins. We don't want to
// turn a full def into a read-modify-write sub-register def and vice
@@ -4136,9 +4136,9 @@ RegisterCoalescer::copyCoalesceInMBB(MachineBasicBlock *MBB) {
void RegisterCoalescer::coalesceLocals() {
copyCoalesceWorkList(LocalWorkList);
- for (unsigned j = 0, je = LocalWorkList.size(); j != je; ++j) {
- if (LocalWorkList[j])
- WorkList.push_back(LocalWorkList[j]);
+ for (MachineInstr *MI : LocalWorkList) {
+ if (MI)
+ WorkList.push_back(MI);
}
LocalWorkList.clear();
}
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
index 8a93433c5e045..cb6d3fe4db8a4 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
@@ -188,8 +188,7 @@ void DAGTypeLegalizer::PerformExpensiveChecks() {
#ifndef NDEBUG
// Checked that NewNodes are only used by other NewNodes.
- for (unsigned i = 0, e = NewNodes.size(); i != e; ++i) {
- SDNode *N = NewNodes[i];
+ for (SDNode *N : NewNodes) {
for (SDNode *U : N->uses())
assert(U->getNodeId() == NewNode && "NewNode used by non-NewNode!");
}
diff --git a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp
index e3acb58327a8c..5522c25be3949 100644
--- a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp
@@ -748,8 +748,7 @@ void ScheduleDAGLinearize::Schedule() {
++DAGSize;
}
- for (unsigned i = 0, e = Glues.size(); i != e; ++i) {
- SDNode *Glue = Glues[i];
+ for (SDNode *Glue : Glues) {
SDNode *GUser = GluedMap[Glue];
unsigned Degree = Glue->getNodeId();
unsigned UDegree = GUser->getNodeId();
diff --git a/llvm/lib/CodeGen/StackSlotColoring.cpp b/llvm/lib/CodeGen/StackSlotColoring.cpp
index eb7a113b575f7..a24e3479a1229 100644
--- a/llvm/lib/CodeGen/StackSlotColoring.cpp
+++ b/llvm/lib/CodeGen/StackSlotColoring.cpp
@@ -400,8 +400,8 @@ bool StackSlotColoring::ColorSlots(MachineFunction &MF) {
const PseudoSourceValue *NewSV = MF.getPSVManager().getFixedStack(NewFI);
SmallVectorImpl<MachineMemOperand *> &RefMMOs = SSRefs[SS];
- for (unsigned i = 0, e = RefMMOs.size(); i != e; ++i)
- RefMMOs[i]->setValue(NewSV);
+ for (MachineMemOperand *MMO : RefMMOs)
+ MMO->setValue(NewSV);
}
// Rewrite all MO_FrameIndex operands. Look for dead stores.
diff --git a/llvm/lib/CodeGen/TailDuplicator.cpp b/llvm/lib/CodeGen/TailDuplicator.cpp
index f5dd21cb92701..4c1c9164cff66 100644
--- a/llvm/lib/CodeGen/TailDuplicator.cpp
+++ b/llvm/lib/CodeGen/TailDuplicator.cpp
@@ -253,8 +253,7 @@ bool TailDuplicator::tailDuplicateAndUpdate(
// Eliminate some of the copies inserted by tail duplication to maintain
// SSA form.
- for (unsigned i = 0, e = Copies.size(); i != e; ++i) {
- MachineInstr *Copy = Copies[i];
+ for (MachineInstr *Copy : Copies) {
if (!Copy->isCopy())
continue;
Register Dst = Copy->getOperand(0).getReg();
diff --git a/llvm/lib/CodeGen/VLIWMachineScheduler.cpp b/llvm/lib/CodeGen/VLIWMachineScheduler.cpp
index fc1cbfefb0dbe..0cddf59d0ca2a 100644
--- a/llvm/lib/CodeGen/VLIWMachineScheduler.cpp
+++ b/llvm/lib/CodeGen/VLIWMachineScheduler.cpp
@@ -130,12 +130,12 @@ bool VLIWResourceModel::isResourceAvailable(SUnit *SU, bool IsTop) {
// Now see if there are no other dependencies to instructions already
// in the packet.
if (IsTop) {
- for (unsigned i = 0, e = Packet.size(); i != e; ++i)
- if (hasDependence(Packet[i], SU))
+ for (const SUnit *U : Packet)
+ if (hasDependence(U, SU))
return false;
} else {
- for (unsigned i = 0, e = Packet.size(); i != e; ++i)
- if (hasDependence(SU, Packet[i]))
+ for (const SUnit *U : Packet)
+ if (hasDependence(SU, U))
return false;
}
return true;
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