[llvm] [X86][CodeGen] Support hoisting load/store with conditional faulting (PR #96720)

Shengchen Kan via llvm-commits llvm-commits at lists.llvm.org
Wed Jun 26 02:01:16 PDT 2024


================
@@ -113,6 +113,35 @@ let Predicates = [HasCMOV, HasCF] in {
             (CFCMOV32rr GR32:$src1, (inv_cond_XFORM timm:$cond))>;
   def : Pat<(X86cmov GR64:$src1, 0, timm:$cond, EFLAGS),
             (CFCMOV64rr GR64:$src1, (inv_cond_XFORM timm:$cond))>;
+
+  def : Pat<(X86cload addr:$src1, 0, timm:$cond, EFLAGS),
+            (CFCMOV16rm addr:$src1, timm:$cond)>;
+  def : Pat<(X86cload addr:$src1, 0, timm:$cond, EFLAGS),
+            (CFCMOV32rm addr:$src1, timm:$cond)>;
+  def : Pat<(X86cload addr:$src1, 0, timm:$cond, EFLAGS),
+            (CFCMOV64rm addr:$src1, timm:$cond)>;
+
+  // FIXME: Shouldn't patterns for 0 work for undef?
----------------
KanRobert wrote:

TBH, I don't know. That's why I leave a FIXME. 


https://github.com/llvm/llvm-project/pull/96720


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