[llvm] [X86][CodeGen] Support hoisting load/store with conditional faulting (PR #96720)
Shengchen Kan via llvm-commits
llvm-commits at lists.llvm.org
Wed Jun 26 01:40:18 PDT 2024
================
@@ -55633,6 +55684,36 @@ static SDValue combineSubSetcc(SDNode *N, SelectionDAG &DAG) {
return SDValue();
}
+static SDValue combineX86CloadCstore(SDNode *N, SelectionDAG &DAG) {
+ // res, flags2 = sub 0, (setcc cc, flag)
+ // cload/cstore ..., cond_ne, flag2
+ // ->
+ // cload/cstore cc, flag
+ //
+ // if res has no users, where op is cload/cstore.
+ if (N->getConstantOperandVal(3) != X86::COND_NE)
+ return SDValue();
+
+ SDNode *Sub = N->getOperand(4).getNode();
+ if (Sub->getOpcode() != X86ISD::SUB)
+ return SDValue();
+
+ SDValue Op1 = Sub->getOperand(1);
+
+ if (Sub->hasAnyUseOfValue(0) || !X86::isZeroNode(Sub->getOperand(0)) ||
----------------
KanRobert wrote:
Done and added test
```
;; CFCMOV can use the flags produced by SUB directly.
define i64 @reduced_data_dependency(i64 %a, i64 %b, ptr %c) {
; CHECK-LABEL: reduced_data_dependency:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movq %rdi, %rcx
; CHECK-NEXT: subq %rsi, %rcx
; CHECK-NEXT: cfcmovnsq (%rdx), %rdi, %rax
; CHECK-NEXT: addq %rcx, %rax
; CHECK-NEXT: retq
entry:
%sub = sub i64 %a, %b
%cond = icmp sge i64 %sub, 0
%0 = bitcast i1 %cond to <1 x i1>
%va = bitcast i64 %a to <1 x i64>
%1 = call <1 x i64> @llvm.masked.load.v1i64.p0(ptr %c, i32 4, <1 x i1> %0, <1 x i64> %va)
%2 = bitcast <1 x i64> %1 to i64
%3 = add i64 %2, %sub
ret i64 %3
}
```
https://github.com/llvm/llvm-project/pull/96720
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