[llvm] [RISCV] Enable early if-conversion (PR #92959)

Pengcheng Wang via llvm-commits llvm-commits at lists.llvm.org
Tue Jun 25 21:38:35 PDT 2024


================
@@ -1446,6 +1446,199 @@ RISCVInstrInfo::optimizeSelect(MachineInstr &MI,
   return NewMI;
 }
 
+int RISCVInstrInfo::getICmpCost(unsigned CC,
+                                const TargetSchedModel &SchedModel) const {
+  switch (CC) {
+  default:
+    llvm_unreachable("Unknown condition code!");
+  case RISCVCC::COND_LT:
+    return SchedModel.computeInstrLatency(RISCV::SLT);
+  case RISCVCC::COND_LTU:
+    return SchedModel.computeInstrLatency(RISCV::SLTU);
+  case RISCVCC::COND_EQ:
+    return SchedModel.computeInstrLatency(RISCV::XOR) +
----------------
wangpc-pp wrote:

The cost is inaccurate now as we may not emit a XOR.

https://github.com/llvm/llvm-project/pull/92959


More information about the llvm-commits mailing list