[llvm] [AMDGPU] Set register bank for i1 arguments/return values (PR #96155)
Jun Wang via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 25 21:19:20 PDT 2024
================
@@ -3745,6 +3745,21 @@ AMDGPURegisterBankInfo::getInstrMapping(const MachineInstr &MI) const {
if (!DstBank)
DstBank = SrcBank;
+ // The calling convention is to be updated such that i1 function arguments
+ // or return values are assigned to SGPRs without promoting to i32. With
+ // this, for i1 function arguments, the call of getRegBank() above gives
+ // incorrect result. We set both src and dst banks to VCCRegBank.
+ if (!MI.getOperand(1).getReg().isVirtual() &&
----------------
jwanggit86 wrote:
If you really think I should get rid of the call of `isVirtual()`, I've tried the following. All tests have passed, but the condition is less limiting than the original version:
```diff
@@ -3735,32 +3735,30 @@ AMDGPURegisterBankInfo::getInstrMapping(const MachineInstr &MI) const {
const MachineRegisterInfo &MRI = MF.getRegInfo();
if (MI.isCopy() || MI.getOpcode() == AMDGPU::G_FREEZE) {
// The default logic bothers to analyze impossible alternative mappings. We
// want the most straightforward mapping, so just directly handle this.
const RegisterBank *DstBank = getRegBank(MI.getOperand(0).getReg(), MRI,
*TRI);
const RegisterBank *SrcBank = getRegBank(MI.getOperand(1).getReg(), MRI,
*TRI);
assert(SrcBank && "src bank should have been assigned already");
- if (!DstBank)
- DstBank = SrcBank;
- // The calling convention is to be updated such that i1 function arguments
- // or return values are assigned to SGPRs without promoting to i32. With
- // this, for i1 function arguments, the call of getRegBank() above gives
- // incorrect result. We set both src and dst banks to VCCRegBank.
- if (!MI.getOperand(1).getReg().isVirtual() &&
- MRI.getType(MI.getOperand(0).getReg()) == LLT::scalar(1)) {
+ // For copy from physical reg to s1 dest, the call of getRegBank() above
+ // gives incorrect result. We set both src and dst banks to VCCRegBank.
+ if (MI.isCopy() && !DstBank && MRI.getType(MI.getOperand(0).getReg()) == LLT::scalar(1)) {
DstBank = SrcBank = &AMDGPU::VCCRegBank;
}
+ if (!DstBank)
+ DstBank = SrcBank;
+
```
Pls let me know your thoughts.
https://github.com/llvm/llvm-project/pull/96155
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