[llvm] [SelectionDAG] Fix a false assumption that there will always be a valid integer type corresponding to a vector type (PR #96658)
Shilei Tian via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 25 15:55:12 PDT 2024
================
@@ -1468,13 +1468,30 @@ SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, const SDLoc &DL, EVT VT) {
}
SDValue SelectionDAG::getBitcastedAnyExtOrTrunc(SDValue Op, const SDLoc &DL,
- EVT VT) {
+ EVT VT) {
----------------
shiltian wrote:
What this function does is two-folded. Based on existing code, it converts `Op` to `VT` where the destination type can not be a vector. It first casts `Op` to its corresponding integer type, no matter what type `Op` is. Next, depending on the size difference between `Op` and `VT`, it either extends or truncates the integer. With that being said, IMO it is this function's responsibility to make sure the validity of each step. However, the problem is in the first step. We can't assume there is always a corresponding integer type. `Op` can be a type with regular size (no matter it is vector or not), but it can also be some type with weird size, like `v3i8`, or `v2f12`.
https://github.com/llvm/llvm-project/pull/96658
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