[llvm] fef144c - Revert "[llvm] Use llvm::sort (NFC) (#96434)"
Kazu Hirata via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 25 11:18:46 PDT 2024
Author: Kazu Hirata
Date: 2024-06-25T11:18:40-07:00
New Revision: fef144cebb378f550ef098d370316554d647f625
URL: https://github.com/llvm/llvm-project/commit/fef144cebb378f550ef098d370316554d647f625
DIFF: https://github.com/llvm/llvm-project/commit/fef144cebb378f550ef098d370316554d647f625.diff
LOG: Revert "[llvm] Use llvm::sort (NFC) (#96434)"
This reverts commit 05d167fc201b4f2e96108be0d682f6800a70c23d.
Reverting the patch fixes the following under EXPENSIVE_CHECKS:
LLVM :: CodeGen/AMDGPU/sched-group-barrier-pipeline-solver.mir
LLVM :: CodeGen/AMDGPU/sched-group-barrier-pre-RA.mir
LLVM :: CodeGen/PowerPC/aix-xcoff-used-with-stringpool.ll
LLVM :: CodeGen/PowerPC/merge-string-used-by-metadata.mir
LLVM :: CodeGen/PowerPC/mergeable-string-pool-large.ll
LLVM :: CodeGen/PowerPC/mergeable-string-pool-pass-only.mir
LLVM :: CodeGen/PowerPC/mergeable-string-pool.ll
Added:
Modified:
llvm/lib/CodeGen/AssignmentTrackingAnalysis.cpp
llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp
llvm/lib/DWARFLinker/Parallel/ArrayList.h
llvm/lib/ExecutionEngine/Orc/Core.cpp
llvm/lib/ExecutionEngine/Orc/Debugging/DebugInfoSupport.cpp
llvm/lib/ProfileData/InstrProfReader.cpp
llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
llvm/lib/Target/NVPTX/NVVMReflect.cpp
llvm/lib/Target/PowerPC/PPCMergeStringPool.cpp
llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
llvm/lib/Transforms/Utils/CodeLayout.cpp
llvm/tools/llvm-jitlink/llvm-jitlink.cpp
llvm/utils/TableGen/ARMTargetDefEmitter.cpp
llvm/utils/TableGen/ExegesisEmitter.cpp
Removed:
################################################################################
diff --git a/llvm/lib/CodeGen/AssignmentTrackingAnalysis.cpp b/llvm/lib/CodeGen/AssignmentTrackingAnalysis.cpp
index 012417553ff19..8afd75069589e 100644
--- a/llvm/lib/CodeGen/AssignmentTrackingAnalysis.cpp
+++ b/llvm/lib/CodeGen/AssignmentTrackingAnalysis.cpp
@@ -2231,10 +2231,11 @@ static AssignmentTrackingLowering::OverlapMap buildOverlapMapAndRecordDeclares(
// order of fragment size - there should be no duplicates.
for (auto &Pair : FragmentMap) {
SmallVector<DebugVariable, 8> &Frags = Pair.second;
- llvm::sort(Frags, [](const DebugVariable &Next, const DebugVariable &Elmt) {
- return Elmt.getFragmentOrDefault().SizeInBits >
- Next.getFragmentOrDefault().SizeInBits;
- });
+ std::sort(Frags.begin(), Frags.end(),
+ [](const DebugVariable &Next, const DebugVariable &Elmt) {
+ return Elmt.getFragmentOrDefault().SizeInBits >
+ Next.getFragmentOrDefault().SizeInBits;
+ });
// Check for duplicates.
assert(std::adjacent_find(Frags.begin(), Frags.end()) == Frags.end());
}
diff --git a/llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp b/llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp
index b8b46791b47e9..f3a961f883517 100644
--- a/llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp
+++ b/llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp
@@ -963,9 +963,9 @@ void extractInstructionFeatures(
// frequency vector, mapping each instruction to its associated MBB.
// Start off by sorting the segments based on the beginning slot index.
- llvm::sort(LRPosInfo, [](LRStartEndInfo A, LRStartEndInfo B) {
- return A.Begin < B.Begin;
- });
+ std::sort(
+ LRPosInfo.begin(), LRPosInfo.end(),
+ [](LRStartEndInfo A, LRStartEndInfo B) { return A.Begin < B.Begin; });
size_t InstructionIndex = 0;
size_t CurrentSegmentIndex = 0;
SlotIndex CurrentIndex = LRPosInfo[0].Begin;
diff --git a/llvm/lib/DWARFLinker/Parallel/ArrayList.h b/llvm/lib/DWARFLinker/Parallel/ArrayList.h
index 1dc7bfa11d106..c48f828609be2 100644
--- a/llvm/lib/DWARFLinker/Parallel/ArrayList.h
+++ b/llvm/lib/DWARFLinker/Parallel/ArrayList.h
@@ -82,7 +82,7 @@ template <typename T, size_t ItemsGroupSize = 512> class ArrayList {
forEach([&](T &Item) { SortedItems.push_back(Item); });
if (SortedItems.size()) {
- llvm::sort(SortedItems, Comparator);
+ std::sort(SortedItems.begin(), SortedItems.end(), Comparator);
size_t SortedItemIdx = 0;
forEach([&](T &Item) { Item = SortedItems[SortedItemIdx++]; });
diff --git a/llvm/lib/ExecutionEngine/Orc/Core.cpp b/llvm/lib/ExecutionEngine/Orc/Core.cpp
index 6ff009aec1390..f03dd434b704b 100644
--- a/llvm/lib/ExecutionEngine/Orc/Core.cpp
+++ b/llvm/lib/ExecutionEngine/Orc/Core.cpp
@@ -1155,9 +1155,8 @@ void JITDylib::dump(raw_ostream &OS) {
std::vector<std::pair<SymbolStringPtr, SymbolTableEntry *>> SymbolsSorted;
for (auto &KV : Symbols)
SymbolsSorted.emplace_back(KV.first, &KV.second);
- llvm::sort(SymbolsSorted, [](const auto &L, const auto &R) {
- return *L.first < *R.first;
- });
+ std::sort(SymbolsSorted.begin(), SymbolsSorted.end(),
+ [](const auto &L, const auto &R) { return *L.first < *R.first; });
for (auto &KV : SymbolsSorted) {
OS << " \"" << *KV.first << "\": ";
diff --git a/llvm/lib/ExecutionEngine/Orc/Debugging/DebugInfoSupport.cpp b/llvm/lib/ExecutionEngine/Orc/Debugging/DebugInfoSupport.cpp
index 60efa0cb6f53a..5a058bd712a3e 100644
--- a/llvm/lib/ExecutionEngine/Orc/Debugging/DebugInfoSupport.cpp
+++ b/llvm/lib/ExecutionEngine/Orc/Debugging/DebugInfoSupport.cpp
@@ -50,7 +50,7 @@ static void preserveDWARFSection(LinkGraph &G, Section &Sec) {
static SmallVector<char, 0> getSectionData(Section &Sec) {
SmallVector<char, 0> SecData;
SmallVector<Block *, 8> SecBlocks(Sec.blocks().begin(), Sec.blocks().end());
- llvm::sort(SecBlocks, [](Block *LHS, Block *RHS) {
+ std::sort(SecBlocks.begin(), SecBlocks.end(), [](Block *LHS, Block *RHS) {
return LHS->getAddress() < RHS->getAddress();
});
// Convert back to what object file would have, one blob of section content
diff --git a/llvm/lib/ProfileData/InstrProfReader.cpp b/llvm/lib/ProfileData/InstrProfReader.cpp
index 987fbad30720b..e18ce5d373d1c 100644
--- a/llvm/lib/ProfileData/InstrProfReader.cpp
+++ b/llvm/lib/ProfileData/InstrProfReader.cpp
@@ -476,7 +476,7 @@ RawInstrProfReader<IntPtrT>::getTemporalProfTraces(
return TemporalProfTraces;
}
// Sort functions by their timestamps to build the trace.
- llvm::sort(TemporalProfTimestamps);
+ std::sort(TemporalProfTimestamps.begin(), TemporalProfTimestamps.end());
TemporalProfTraceTy Trace;
if (Weight)
Trace.Weight = *Weight;
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp b/llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
index b26a15b7fd899..86f28a5057694 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
@@ -612,7 +612,10 @@ void PipelineSolver::populateReadyList(
}
if (UseCostHeur) {
- llvm::sort(ReadyList, llvm::less_second());
+ std::sort(ReadyList.begin(), ReadyList.end(),
+ [](std::pair<int, int> A, std::pair<int, int> B) {
+ return A.second < B.second;
+ });
}
assert(ReadyList.size() == CurrSU.second.size());
diff --git a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
index ccb60348df3e2..e81e6bb697588 100644
--- a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
+++ b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
@@ -6886,8 +6886,8 @@ bool ARMPipelinerLoopInfo::tooMuchRegisterPressure(SwingSchedulerDAG &SSD,
++Stage) {
std::deque<SUnit *> Instrs =
SMS.getInstructions(Cycle + Stage * SMS.getInitiationInterval());
- llvm::sort(Instrs,
- [](SUnit *A, SUnit *B) { return A->NodeNum > B->NodeNum; });
+ std::sort(Instrs.begin(), Instrs.end(),
+ [](SUnit *A, SUnit *B) { return A->NodeNum > B->NodeNum; });
for (SUnit *SU : Instrs)
ProposedSchedule.push_back(SU);
}
diff --git a/llvm/lib/Target/NVPTX/NVVMReflect.cpp b/llvm/lib/Target/NVPTX/NVVMReflect.cpp
index c02e4872e4b1a..4024953bb51db 100644
--- a/llvm/lib/Target/NVPTX/NVVMReflect.cpp
+++ b/llvm/lib/Target/NVPTX/NVVMReflect.cpp
@@ -208,7 +208,7 @@ static bool runNVVMReflect(Function &F, unsigned SmVersion) {
// Removing via isInstructionTriviallyDead may add duplicates to the ToRemove
// array. Filter out the duplicates before starting to erase from parent.
- llvm::sort(ToRemove);
+ std::sort(ToRemove.begin(), ToRemove.end());
auto NewLastIter = llvm::unique(ToRemove);
ToRemove.erase(NewLastIter, ToRemove.end());
diff --git a/llvm/lib/Target/PowerPC/PPCMergeStringPool.cpp b/llvm/lib/Target/PowerPC/PPCMergeStringPool.cpp
index af028de47d937..309938accdf4c 100644
--- a/llvm/lib/Target/PowerPC/PPCMergeStringPool.cpp
+++ b/llvm/lib/Target/PowerPC/PPCMergeStringPool.cpp
@@ -244,7 +244,7 @@ bool PPCMergeStringPool::mergeModuleStringPool(Module &M) {
return false;
// Sort the global constants to make access more efficient.
- llvm::sort(MergeableStrings, CompareConstants);
+ std::sort(MergeableStrings.begin(), MergeableStrings.end(), CompareConstants);
SmallVector<Constant *> ConstantsInStruct;
for (GlobalVariable *GV : MergeableStrings)
diff --git a/llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp b/llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
index 0001d0750d9c1..c1e5ab1a2b561 100644
--- a/llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
+++ b/llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
@@ -2203,7 +2203,7 @@ void CallsiteContextGraph<DerivedCCG, FuncTy, CallTy>::ContextNode::print(
// Make a copy of the computed context ids that we can sort for stability.
auto ContextIds = getContextIds();
std::vector<uint32_t> SortedIds(ContextIds.begin(), ContextIds.end());
- llvm::sort(SortedIds);
+ std::sort(SortedIds.begin(), SortedIds.end());
for (auto Id : SortedIds)
OS << " " << Id;
OS << "\n";
@@ -2238,7 +2238,7 @@ void CallsiteContextGraph<DerivedCCG, FuncTy, CallTy>::ContextEdge::print(
<< " AllocTypes: " << getAllocTypeString(AllocTypes);
OS << " ContextIds:";
std::vector<uint32_t> SortedIds(ContextIds.begin(), ContextIds.end());
- llvm::sort(SortedIds);
+ std::sort(SortedIds.begin(), SortedIds.end());
for (auto Id : SortedIds)
OS << " " << Id;
}
@@ -2380,7 +2380,7 @@ struct DOTGraphTraits<const CallsiteContextGraph<DerivedCCG, FuncTy, CallTy> *>
std::string IdString = "ContextIds:";
if (ContextIds.size() < 100) {
std::vector<uint32_t> SortedIds(ContextIds.begin(), ContextIds.end());
- llvm::sort(SortedIds);
+ std::sort(SortedIds.begin(), SortedIds.end());
for (auto Id : SortedIds)
IdString += (" " + Twine(Id)).str();
} else {
diff --git a/llvm/lib/Transforms/Utils/CodeLayout.cpp b/llvm/lib/Transforms/Utils/CodeLayout.cpp
index dbadad3905ac7..95edd27c675d2 100644
--- a/llvm/lib/Transforms/Utils/CodeLayout.cpp
+++ b/llvm/lib/Transforms/Utils/CodeLayout.cpp
@@ -986,15 +986,16 @@ class ExtTSPImpl {
}
// Sorting chains by density in the decreasing order.
- llvm::sort(SortedChains, [&](const ChainT *L, const ChainT *R) {
- // Place the entry point at the beginning of the order.
- if (L->isEntry() != R->isEntry())
- return L->isEntry();
-
- // Compare by density and break ties by chain identifiers.
- return std::make_tuple(-L->density(), L->Id) <
- std::make_tuple(-R->density(), R->Id);
- });
+ std::sort(SortedChains.begin(), SortedChains.end(),
+ [&](const ChainT *L, const ChainT *R) {
+ // Place the entry point at the beginning of the order.
+ if (L->isEntry() != R->isEntry())
+ return L->isEntry();
+
+ // Compare by density and break ties by chain identifiers.
+ return std::make_tuple(-L->density(), L->Id) <
+ std::make_tuple(-R->density(), R->Id);
+ });
// Collect the nodes in the order specified by their chains.
std::vector<uint64_t> Order;
@@ -1354,12 +1355,14 @@ class CDSortImpl {
}
// Sort chains by density in the decreasing order.
- llvm::sort(SortedChains, [&](const ChainT *L, const ChainT *R) {
- const double DL = ChainDensity[L];
- const double DR = ChainDensity[R];
- // Compare by density and break ties by chain identifiers.
- return std::make_tuple(-DL, L->Id) < std::make_tuple(-DR, R->Id);
- });
+ std::sort(SortedChains.begin(), SortedChains.end(),
+ [&](const ChainT *L, const ChainT *R) {
+ const double DL = ChainDensity[L];
+ const double DR = ChainDensity[R];
+ // Compare by density and break ties by chain identifiers.
+ return std::make_tuple(-DL, L->Id) <
+ std::make_tuple(-DR, R->Id);
+ });
// Collect the nodes in the order specified by their chains.
std::vector<uint64_t> Order;
diff --git a/llvm/tools/llvm-jitlink/llvm-jitlink.cpp b/llvm/tools/llvm-jitlink/llvm-jitlink.cpp
index acf663a6c0e8f..bff05b9ca4beb 100644
--- a/llvm/tools/llvm-jitlink/llvm-jitlink.cpp
+++ b/llvm/tools/llvm-jitlink/llvm-jitlink.cpp
@@ -1259,9 +1259,10 @@ Error Session::FileInfo::registerMultiStubEntry(
Sym.getTargetFlags());
// Let's keep stubs ordered by ascending address.
- llvm::sort(Entry, [](const MemoryRegionInfo &L, const MemoryRegionInfo &R) {
- return L.getTargetAddress() < R.getTargetAddress();
- });
+ std::sort(Entry.begin(), Entry.end(),
+ [](const MemoryRegionInfo &L, const MemoryRegionInfo &R) {
+ return L.getTargetAddress() < R.getTargetAddress();
+ });
return Error::success();
}
diff --git a/llvm/utils/TableGen/ARMTargetDefEmitter.cpp b/llvm/utils/TableGen/ARMTargetDefEmitter.cpp
index c4143747f3770..e22f353b451f9 100644
--- a/llvm/utils/TableGen/ARMTargetDefEmitter.cpp
+++ b/llvm/utils/TableGen/ARMTargetDefEmitter.cpp
@@ -45,7 +45,7 @@ static void EmitARMTargetDef(RecordKeeper &RK, raw_ostream &OS) {
const auto MarchB = B->getValueAsString("MArchName");
return MarchA.compare(MarchB) < 0; // A lexographically less than B
};
- llvm::sort(SortedExtensions, Alphabetical);
+ std::sort(SortedExtensions.begin(), SortedExtensions.end(), Alphabetical);
// The ARMProcFamilyEnum values are initialised by SubtargetFeature defs
// which set the ARMProcFamily field. We can generate the enum from these defs
diff --git a/llvm/utils/TableGen/ExegesisEmitter.cpp b/llvm/utils/TableGen/ExegesisEmitter.cpp
index be2c43047f6c0..d48c7f3a480f2 100644
--- a/llvm/utils/TableGen/ExegesisEmitter.cpp
+++ b/llvm/utils/TableGen/ExegesisEmitter.cpp
@@ -140,7 +140,8 @@ void ExegesisEmitter::emitPfmCountersInfo(const Record &Def,
ValidationCounter->getValueAsDef("EventType")->getName(),
getPfmCounterId(ValidationCounter->getValueAsString("Counter"))});
}
- llvm::sort(ValidationCounters, EventNumberLess);
+ std::sort(ValidationCounters.begin(), ValidationCounters.end(),
+ EventNumberLess);
OS << "\nstatic const std::pair<ValidationEvent, const char*> " << Target
<< Def.getName() << "ValidationCounters[] = {\n";
for (const ValidationCounterInfo &VCI : ValidationCounters) {
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