[lld] [llvm] Reapply "[RISCV] Support RISCV Atomics ABI attributes (#84597)" (PR #90266)

[Paul Kirth via llvm-commits]

ilovepi wrote:

> > Sorry for the delay on this. I lost track of this w/ other priorities. I think the new implementation does what everyone wants it to do: guard codegen w/ the `cl::opt`.
> 
> I'm also coming into this late, triggered by the attempt to make TSO non-experimental. This is all interconnected. Having the attribute emission off by default under a CL opt seems like a reasonable stepping stone. We could maybe be fancy here in the future and do linker version sniffing, but I'm 100% in support of starting simple. LGTM to that bit, and assuming other comments on resolved from previous landing - I did not check - please reland.
> 
> > It's less clear to me what we'll do w/ enabling trailing fence by default, w/o the attributes on by default, but that's orthogonal to this.
> 
> I think we should enable the A6S ("A6/7 compat") by default, even if we can't emit the attribute. The whole attribute mechanism is fairly badly thought out - as the very revert here shows - and should not block the major item of getting us migrated to the same ABI variant used by gcc.

Once this lands, I don't think there are any blockers to #90267, which enables A6S. I've wanted that to be te default atomic ABI for a long time now.

https://github.com/llvm/llvm-project/pull/90266