[llvm] [RISCV] Add FPR16 regbank and start legalizing f16 operations for Zfh. (PR #96582)

[Yingwei Zheng via llvm-commits]

dtcxzyw wrote:

> > Oops, I already have an unsubmitted patch for half fp arith :) It was blocked by supporting half fp with only F or F + Zfhmin.
> 
> Why is that blocking?

As we widen the type from f16 to f32, we need to implement G_FPTRUNC/G_FPEXT/G_ANYEXT for s16<->s32.

> 
> > Do you plan to support other ops (fcmp/fconstant/fp<->fp/fp<->int)?
> 
> Yes.

Great! TBH I don't have enough bandwidth to work on this. I will post my existing code later. Hope this helps you.


https://github.com/llvm/llvm-project/pull/96582