[llvm] [LLVM] Add `llvm.masked.compress` intrinsic (PR #92289)
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Mon Jun 24 05:25:33 PDT 2024
================
@@ -7510,6 +7512,94 @@ LegalizerHelper::lowerShuffleVector(MachineInstr &MI) {
return Legalized;
}
+LegalizerHelper::LegalizeResult
+LegalizerHelper::lowerMASKED_COMPRESS(llvm::MachineInstr &MI) {
+ auto [Dst, DstTy, Vec, VecTy, Mask, MaskTy, Passthru, PassthruTy] =
+ MI.getFirst4RegLLTs();
+
+ if (VecTy.isScalableVector())
+ report_fatal_error("Cannot expand masked_compress for scalable vectors.");
+
+ Align VecAlign = getStackTemporaryAlignment(VecTy);
+ MachinePointerInfo PtrInfo;
+ Register StackPtr =
+ createStackTemporary(TypeSize::getFixed(VecTy.getSizeInBytes()), VecAlign,
+ PtrInfo)
+ .getReg(0);
+ MachinePointerInfo ValPtrInfo =
+ MachinePointerInfo::getUnknownStack(*MI.getMF());
+
+ LLT IdxTy = LLT::scalar(32);
+ LLT ValTy = VecTy.getElementType();
+ Align ValAlign = getStackTemporaryAlignment(ValTy);
+
+ auto OutPos = MIRBuilder.buildConstant(IdxTy, 0);
+
+ bool HasPassthru =
+ MRI.getVRegDef(Passthru)->getOpcode() != TargetOpcode::G_IMPLICIT_DEF;
+
+ if (HasPassthru)
+ MIRBuilder.buildStore(Passthru, StackPtr, PtrInfo, VecAlign);
+
+ Register LastWriteVal;
+ std::optional<APInt> PassthruSplatVal =
+ isConstantOrConstantSplatVector(*MRI.getVRegDef(Passthru), MRI);
+ ;
----------------
RKSimon wrote:
superfluous
https://github.com/llvm/llvm-project/pull/92289
More information about the llvm-commits
mailing list