[llvm] [SimplifyCFG] Simplify switch with implicit default (PR #95665)

via llvm-commits llvm-commits at lists.llvm.org
Sat Jun 15 09:01:13 PDT 2024


YanWQ-monad wrote:

Since it's a Rust specific pattern, I also checked Rust's code to see if it could be done in `rustc`, but it seems hard, the lowest IR level in Rust (MIR) side is not low enough to perform this optimization.

Specifically,

``` llvm
define void @src(i32 %x) {
  ; lowered from MIR `_2 = discriminant((*_1));`
  %w = icmp ult i32 %x, 3
  %v = select i1 %w, i32 %x, i32 1

  ; lowered from MIR `switchInt(move _2) -> [0: bb0, 1: bb1, 2: bb2, otherwise: bb3];`
  switch i32 %v, label %bb3 [
    i32 0, label %bb0
    i32 1, label %bb1
    i32 2, label %bb2
  ]
}
```

`discriminant` and `switchInt` are the intrinsics in Rust's MIR. During lowering MIR to LLVM IR, it's a little bit hard to check whether it's directly and only used by `switchInt`, and to perform the optimization.

But I'm not familiar with how `rustc` works internally, so please let me know if I am wrong.

https://github.com/llvm/llvm-project/pull/95665


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