[llvm] [llvm] prefer isa_and_nonnull over v && isa (PR #95327)
Mohammed Keyvanzadeh via llvm-commits
llvm-commits at lists.llvm.org
Fri Jun 14 15:56:49 PDT 2024
https://github.com/VoltrexKeyva updated https://github.com/llvm/llvm-project/pull/95327
>From 8122d335d63dad595fc1bd3ce7c9375fa48863da Mon Sep 17 00:00:00 2001
From: Mohammed Keyvanzadeh <mohammadkeyvanzade94 at gmail.com>
Date: Thu, 13 Jun 2024 02:20:01 +0330
Subject: [PATCH] [llvm] prefer isa_and_nonnull over v && isa
Use `isa_and_nonnull<T>(v)` instead of `v && isa<T>(v)`, where `v` is
evaluated twice in the latter.
---
llvm/lib/Analysis/ConstantFolding.cpp | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/llvm/lib/Analysis/ConstantFolding.cpp b/llvm/lib/Analysis/ConstantFolding.cpp
index e0f5bf0ab8365..46a7f832f6761 100644
--- a/llvm/lib/Analysis/ConstantFolding.cpp
+++ b/llvm/lib/Analysis/ConstantFolding.cpp
@@ -82,7 +82,7 @@ static Constant *foldConstVectorToAPInt(APInt &Result, Type *DestTy,
else
Element = C->getAggregateElement(i);
- if (Element && isa<UndefValue>(Element)) {
+ if (isa_and_nonnull<UndefValue>(Element)) {
Result <<= BitShift;
continue;
}
@@ -218,7 +218,7 @@ Constant *FoldBitCast(Constant *C, Type *DestTy, const DataLayout &DL) {
unsigned ShiftAmt = isLittleEndian ? 0 : SrcBitSize*(Ratio-1);
for (unsigned j = 0; j != Ratio; ++j) {
Constant *Src = C->getAggregateElement(SrcElt++);
- if (Src && isa<UndefValue>(Src))
+ if (isa_and_nonnull<UndefValue>(Src))
Src = Constant::getNullValue(
cast<VectorType>(C->getType())->getElementType());
else
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