[llvm] [TailDup][MachineSSAUpdater] Let RewriteUse insert a COPY when needed (PR #95553)

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<!--LLVM CODE FORMAT COMMENT: {clang-format}-->


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git-clang-format --diff 0774000e3294849206aac4e18adf27286b17e217 3a9a4ef0c35f5410826e60ed9b4c89cacc0a3eaf -- llvm/lib/CodeGen/MachineSSAUpdater.cpp
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View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/CodeGen/MachineSSAUpdater.cpp b/llvm/lib/CodeGen/MachineSSAUpdater.cpp
index 158e9fcf9f..efd82eb8dc 100644
--- a/llvm/lib/CodeGen/MachineSSAUpdater.cpp
+++ b/llvm/lib/CodeGen/MachineSSAUpdater.cpp
@@ -238,13 +238,14 @@ void MachineSSAUpdater::RewriteUse(MachineOperand &U) {
 
   // Insert a COPY if register class contraint isn't fulfilled.
   if (const TargetRegisterClass *RC =
-      dyn_cast_or_null<const TargetRegisterClass *>(RegAttrs.RCOrRB)) {
+          dyn_cast_or_null<const TargetRegisterClass *>(RegAttrs.RCOrRB)) {
     if (NewVR && !RC->hasSubClassEq(MRI->getRegClass(NewVR))) {
-      MachineBasicBlock *UseBB = UseMI->getParent();;
+      MachineBasicBlock *UseBB = UseMI->getParent();
+      ;
       MachineInstr *InsertedCopy =
-        InsertNewDef(TargetOpcode::COPY, UseBB, UseBB->getFirstNonPHI(),
-                     RegAttrs, MRI, TII)
-        .addReg(NewVR);
+          InsertNewDef(TargetOpcode::COPY, UseBB, UseBB->getFirstNonPHI(),
+                       RegAttrs, MRI, TII)
+              .addReg(NewVR);
       NewVR = InsertedCopy->getOperand(0).getReg();
       LLVM_DEBUG(dbgs() << "  Inserted COPY: " << *InsertedCopy << "\n");
     }

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https://github.com/llvm/llvm-project/pull/95553