[llvm] [NFC][PowerPC] Add test to check lanemasks for subregisters. (PR #94363)

[Stefan Pintilie via llvm-commits]

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+# RUN: llc -mcpu=pwr10 -ppc-track-subreg-liveness -filetype=null  \
+# RUN:   -mtriple=powerpc64le-unknown-linux-gnu -run-pass=greedy,virtregrewriter \
+# RUN:   -debug-only=regalloc -o - %s 2>&1 | FileCheck %s
+# REQUIRES: asserts
+
+# Keep track of all of the lanemasks for various subregsiters.
+#
+# TODO: The mask for %6.sub_vsx1:accrc is the same as the mask for %10.sub_vsx1_then_sub_64:accrc
+#       even though one is a 128 bit register and the other is a 64 bit subregister. This should
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stefanp-ibm wrote:

I'm going to change the comment before I commit. I will shorten it to say that on PPC we want the mask for `%6.sub_vsx1:accrc` and `%10.sub_vsx1_then_sub_64:accrc` to be different.

However, I'm confused about how this is supposed to work. On PPC we have something like this:
```
| ------------- VSRL 128 Bits ------------ |
| --- FPR 64 Bit --- | - Not Used 64 Bit - |
```

The VSRL is marked as `sub_vsx1:accrc` while the FPR is marked as `sub_vsx1_then_sub_64:accrc`. 
At one point we end up needing a COPY for a live range split and based on the lane masks we end up copying only the first 64 bits which leads to incorrect results. The solution on our end is to add a phony register for the section that is not used and this then creates different lane masks for the two subregisters. Is this how we are supposed to approach this issue?  Is it not an issue in general when we generate COPY instrs that two subregsiters have different sizes?

https://github.com/llvm/llvm-project/pull/94363