[llvm] [Xtensa] Fix register asm parsing. (PR #95551)
Andrei Safronov via llvm-commits
llvm-commits at lists.llvm.org
Fri Jun 14 07:29:24 PDT 2024
https://github.com/andreisfr created https://github.com/llvm/llvm-project/pull/95551
Fix passing temporary string object as argument to the StringRef constructor in "parseRegister" function, because it causes errors in the test "llvm/test/MC/Xtensa/Core/processor-control.s".
>From e48cff16b18324b42b891ed888001ebbfda247db Mon Sep 17 00:00:00 2001
From: Andrei Safronov <safronov at espressif.com>
Date: Wed, 12 Jun 2024 21:52:15 +0300
Subject: [PATCH] [Xtensa] Fix register asm parsing.
Fix passing temporary string object as argument to
the StringRef constructor in "parseRegister" function,
because it causes errors in the test
"llvm/test/MC/Xtensa/Core/processor-control.s".
---
.../Target/Xtensa/AsmParser/XtensaAsmParser.cpp | 2 +-
llvm/test/MC/Xtensa/Core/registers.s | 14 ++++++++++++++
2 files changed, 15 insertions(+), 1 deletion(-)
create mode 100644 llvm/test/MC/Xtensa/Core/registers.s
diff --git a/llvm/lib/Target/Xtensa/AsmParser/XtensaAsmParser.cpp b/llvm/lib/Target/Xtensa/AsmParser/XtensaAsmParser.cpp
index eaf0466302994..b0ce624a495fd 100644
--- a/llvm/lib/Target/Xtensa/AsmParser/XtensaAsmParser.cpp
+++ b/llvm/lib/Target/Xtensa/AsmParser/XtensaAsmParser.cpp
@@ -572,7 +572,7 @@ ParseStatus XtensaAsmParser::parseRegister(OperandVector &Operands,
case AsmToken::Integer:
if (!SR)
return ParseStatus::NoMatch;
- RegName = StringRef(std::to_string(getLexer().getTok().getIntVal()));
+ RegName = getLexer().getTok().getString();
RegNo = MatchRegisterName(RegName);
if (RegNo == 0)
RegNo = MatchRegisterAltName(RegName);
diff --git a/llvm/test/MC/Xtensa/Core/registers.s b/llvm/test/MC/Xtensa/Core/registers.s
new file mode 100644
index 0000000000000..bf6499c7abde1
--- /dev/null
+++ b/llvm/test/MC/Xtensa/Core/registers.s
@@ -0,0 +1,14 @@
+# RUN: llvm-mc %s -triple=xtensa -show-encoding \
+# RUN: | FileCheck -check-prefixes=CHECK,CHECK-INST %s
+
+
+.align 4
+LBL0:
+
+#############################################################
+## Check special registers parsing
+#############################################################
+
+# CHECK-INST: xsr a8, sar
+# CHECK: encoding: [0x80,0x03,0x61]
+xsr a8, 3
More information about the llvm-commits
mailing list