[llvm] c81d5b1 - [X86] Add scalar test coverage for ISD::AVG nodes on 32 and 64-bit targets
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Fri Jun 14 06:28:56 PDT 2024
Author: Simon Pilgrim
Date: 2024-06-14T14:28:29+01:00
New Revision: c81d5b11cf7caf82749638752d819a061fdf4d9e
URL: https://github.com/llvm/llvm-project/commit/c81d5b11cf7caf82749638752d819a061fdf4d9e
DIFF: https://github.com/llvm/llvm-project/commit/c81d5b11cf7caf82749638752d819a061fdf4d9e.diff
LOG: [X86] Add scalar test coverage for ISD::AVG nodes on 32 and 64-bit targets
Added:
llvm/test/CodeGen/X86/avgceils-scalar.ll
llvm/test/CodeGen/X86/avgceilu-scalar.ll
llvm/test/CodeGen/X86/avgfloors-scalar.ll
llvm/test/CodeGen/X86/avgflooru-scalar.ll
Modified:
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/X86/avgceils-scalar.ll b/llvm/test/CodeGen/X86/avgceils-scalar.ll
new file mode 100644
index 0000000000000..86de35d36f076
--- /dev/null
+++ b/llvm/test/CodeGen/X86/avgceils-scalar.ll
@@ -0,0 +1,267 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=i686-- | FileCheck %s --check-prefixes=X86
+; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefixes=X64
+
+;
+; fixed avg(x,y) = sub(or(x,y),ashr(xor(x,y),1))
+;
+; ext avg(x,y) = trunc(ashr(add(sext(x),sext(y),1),1))
+;
+
+define i8 @test_fixed_i8(i8 %a0, i8 %a1) nounwind {
+; X86-LABEL: test_fixed_i8:
+; X86: # %bb.0:
+; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movzbl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: movl %edx, %eax
+; X86-NEXT: orb %cl, %al
+; X86-NEXT: xorb %cl, %dl
+; X86-NEXT: sarb %dl
+; X86-NEXT: subb %dl, %al
+; X86-NEXT: retl
+;
+; X64-LABEL: test_fixed_i8:
+; X64: # %bb.0:
+; X64-NEXT: movl %edi, %eax
+; X64-NEXT: orb %sil, %al
+; X64-NEXT: xorb %sil, %dil
+; X64-NEXT: sarb %dil
+; X64-NEXT: subb %dil, %al
+; X64-NEXT: retq
+ %or = or i8 %a0, %a1
+ %xor = xor i8 %a0, %a1
+ %shift = ashr i8 %xor, 1
+ %res = sub i8 %or, %shift
+ ret i8 %res
+}
+
+define i8 @test_ext_i8(i8 %a0, i8 %a1) nounwind {
+; X86-LABEL: test_ext_i8:
+; X86: # %bb.0:
+; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movzbl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: movl %edx, %eax
+; X86-NEXT: orb %cl, %al
+; X86-NEXT: xorb %cl, %dl
+; X86-NEXT: sarb %dl
+; X86-NEXT: subb %dl, %al
+; X86-NEXT: retl
+;
+; X64-LABEL: test_ext_i8:
+; X64: # %bb.0:
+; X64-NEXT: movl %edi, %eax
+; X64-NEXT: orb %sil, %al
+; X64-NEXT: xorb %sil, %dil
+; X64-NEXT: sarb %dil
+; X64-NEXT: subb %dil, %al
+; X64-NEXT: retq
+ %x0 = sext i8 %a0 to i16
+ %x1 = sext i8 %a1 to i16
+ %sum = add i16 %x0, %x1
+ %sum1 = add i16 %sum, 1
+ %shift = ashr i16 %sum1, 1
+ %res = trunc i16 %shift to i8
+ ret i8 %res
+}
+
+define i16 @test_fixed_i16(i16 %a0, i16 %a1) nounwind {
+; X86-LABEL: test_fixed_i16:
+; X86: # %bb.0:
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: movl %edx, %eax
+; X86-NEXT: orl %ecx, %eax
+; X86-NEXT: xorl %ecx, %edx
+; X86-NEXT: movswl %dx, %ecx
+; X86-NEXT: sarl %ecx
+; X86-NEXT: subl %ecx, %eax
+; X86-NEXT: # kill: def $ax killed $ax killed $eax
+; X86-NEXT: retl
+;
+; X64-LABEL: test_fixed_i16:
+; X64: # %bb.0:
+; X64-NEXT: movl %edi, %eax
+; X64-NEXT: orl %esi, %eax
+; X64-NEXT: xorl %esi, %edi
+; X64-NEXT: movswl %di, %ecx
+; X64-NEXT: sarl %ecx
+; X64-NEXT: subl %ecx, %eax
+; X64-NEXT: # kill: def $ax killed $ax killed $eax
+; X64-NEXT: retq
+ %or = or i16 %a0, %a1
+ %xor = xor i16 %a0, %a1
+ %shift = ashr i16 %xor, 1
+ %res = sub i16 %or, %shift
+ ret i16 %res
+}
+
+define i16 @test_ext_i16(i16 %a0, i16 %a1) nounwind {
+; X86-LABEL: test_ext_i16:
+; X86: # %bb.0:
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: movl %edx, %eax
+; X86-NEXT: orl %ecx, %eax
+; X86-NEXT: xorl %ecx, %edx
+; X86-NEXT: movswl %dx, %ecx
+; X86-NEXT: sarl %ecx
+; X86-NEXT: subl %ecx, %eax
+; X86-NEXT: # kill: def $ax killed $ax killed $eax
+; X86-NEXT: retl
+;
+; X64-LABEL: test_ext_i16:
+; X64: # %bb.0:
+; X64-NEXT: movl %edi, %eax
+; X64-NEXT: orl %esi, %eax
+; X64-NEXT: xorl %esi, %edi
+; X64-NEXT: movswl %di, %ecx
+; X64-NEXT: sarl %ecx
+; X64-NEXT: subl %ecx, %eax
+; X64-NEXT: # kill: def $ax killed $ax killed $eax
+; X64-NEXT: retq
+ %x0 = sext i16 %a0 to i32
+ %x1 = sext i16 %a1 to i32
+ %sum = add i32 %x0, %x1
+ %sum1 = add i32 %sum, 1
+ %shift = ashr i32 %sum1, 1
+ %res = trunc i32 %shift to i16
+ ret i16 %res
+}
+
+define i32 @test_fixed_i32(i32 %a0, i32 %a1) nounwind {
+; X86-LABEL: test_fixed_i32:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: movl %edx, %eax
+; X86-NEXT: orl %ecx, %eax
+; X86-NEXT: xorl %ecx, %edx
+; X86-NEXT: sarl %edx
+; X86-NEXT: subl %edx, %eax
+; X86-NEXT: retl
+;
+; X64-LABEL: test_fixed_i32:
+; X64: # %bb.0:
+; X64-NEXT: movl %edi, %eax
+; X64-NEXT: orl %esi, %eax
+; X64-NEXT: xorl %esi, %edi
+; X64-NEXT: sarl %edi
+; X64-NEXT: subl %edi, %eax
+; X64-NEXT: retq
+ %or = or i32 %a0, %a1
+ %xor = xor i32 %a1, %a0
+ %shift = ashr i32 %xor, 1
+ %res = sub i32 %or, %shift
+ ret i32 %res
+}
+
+define i32 @test_ext_i32(i32 %a0, i32 %a1) nounwind {
+; X86-LABEL: test_ext_i32:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: movl %edx, %eax
+; X86-NEXT: orl %ecx, %eax
+; X86-NEXT: xorl %ecx, %edx
+; X86-NEXT: sarl %edx
+; X86-NEXT: subl %edx, %eax
+; X86-NEXT: retl
+;
+; X64-LABEL: test_ext_i32:
+; X64: # %bb.0:
+; X64-NEXT: movl %edi, %eax
+; X64-NEXT: orl %esi, %eax
+; X64-NEXT: xorl %esi, %edi
+; X64-NEXT: sarl %edi
+; X64-NEXT: subl %edi, %eax
+; X64-NEXT: retq
+ %x0 = sext i32 %a0 to i64
+ %x1 = sext i32 %a1 to i64
+ %sum = add i64 %x0, %x1
+ %sum1 = add i64 %sum, 1
+ %shift = ashr i64 %sum1, 1
+ %res = trunc i64 %shift to i32
+ ret i32 %res
+}
+
+define i64 @test_fixed_i64(i64 %a0, i64 %a1) nounwind {
+; X86-LABEL: test_fixed_i64:
+; X86: # %bb.0:
+; X86-NEXT: pushl %ebx
+; X86-NEXT: pushl %edi
+; X86-NEXT: pushl %esi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: movl %eax, %edi
+; X86-NEXT: xorl %ecx, %edi
+; X86-NEXT: movl %edx, %ebx
+; X86-NEXT: xorl %esi, %ebx
+; X86-NEXT: shrdl $1, %ebx, %edi
+; X86-NEXT: orl %esi, %edx
+; X86-NEXT: sarl %ebx
+; X86-NEXT: orl %ecx, %eax
+; X86-NEXT: subl %edi, %eax
+; X86-NEXT: sbbl %ebx, %edx
+; X86-NEXT: popl %esi
+; X86-NEXT: popl %edi
+; X86-NEXT: popl %ebx
+; X86-NEXT: retl
+;
+; X64-LABEL: test_fixed_i64:
+; X64: # %bb.0:
+; X64-NEXT: movq %rdi, %rax
+; X64-NEXT: orq %rsi, %rax
+; X64-NEXT: xorq %rsi, %rdi
+; X64-NEXT: sarq %rdi
+; X64-NEXT: subq %rdi, %rax
+; X64-NEXT: retq
+ %or = or i64 %a0, %a1
+ %xor = xor i64 %a1, %a0
+ %shift = ashr i64 %xor, 1
+ %res = sub i64 %or, %shift
+ ret i64 %res
+}
+
+define i64 @test_ext_i64(i64 %a0, i64 %a1) nounwind {
+; X86-LABEL: test_ext_i64:
+; X86: # %bb.0:
+; X86-NEXT: pushl %ebx
+; X86-NEXT: pushl %edi
+; X86-NEXT: pushl %esi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: movl %eax, %edi
+; X86-NEXT: xorl %ecx, %edi
+; X86-NEXT: movl %edx, %ebx
+; X86-NEXT: xorl %esi, %ebx
+; X86-NEXT: shrdl $1, %ebx, %edi
+; X86-NEXT: orl %esi, %edx
+; X86-NEXT: sarl %ebx
+; X86-NEXT: orl %ecx, %eax
+; X86-NEXT: subl %edi, %eax
+; X86-NEXT: sbbl %ebx, %edx
+; X86-NEXT: popl %esi
+; X86-NEXT: popl %edi
+; X86-NEXT: popl %ebx
+; X86-NEXT: retl
+;
+; X64-LABEL: test_ext_i64:
+; X64: # %bb.0:
+; X64-NEXT: movq %rdi, %rax
+; X64-NEXT: orq %rsi, %rax
+; X64-NEXT: xorq %rsi, %rdi
+; X64-NEXT: sarq %rdi
+; X64-NEXT: subq %rdi, %rax
+; X64-NEXT: retq
+ %x0 = sext i64 %a0 to i128
+ %x1 = sext i64 %a1 to i128
+ %sum = add i128 %x0, %x1
+ %sum1 = add i128 %sum, 1
+ %shift = ashr i128 %sum1, 1
+ %res = trunc i128 %shift to i64
+ ret i64 %res
+}
diff --git a/llvm/test/CodeGen/X86/avgceilu-scalar.ll b/llvm/test/CodeGen/X86/avgceilu-scalar.ll
new file mode 100644
index 0000000000000..014c984528141
--- /dev/null
+++ b/llvm/test/CodeGen/X86/avgceilu-scalar.ll
@@ -0,0 +1,267 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=i686-- | FileCheck %s --check-prefixes=X86
+; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefixes=X64
+
+;
+; fixed avg(x,y) = sub(or(x,y),lshr(xor(x,y),1))
+;
+; ext avg(x,y) = trunc(lshr(add(zext(x),zext(y),1),1))
+;
+
+define i8 @test_fixed_i8(i8 %a0, i8 %a1) nounwind {
+; X86-LABEL: test_fixed_i8:
+; X86: # %bb.0:
+; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movzbl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: movl %edx, %eax
+; X86-NEXT: orb %cl, %al
+; X86-NEXT: xorb %cl, %dl
+; X86-NEXT: shrb %dl
+; X86-NEXT: subb %dl, %al
+; X86-NEXT: retl
+;
+; X64-LABEL: test_fixed_i8:
+; X64: # %bb.0:
+; X64-NEXT: movl %edi, %eax
+; X64-NEXT: orb %sil, %al
+; X64-NEXT: xorb %sil, %dil
+; X64-NEXT: shrb %dil
+; X64-NEXT: subb %dil, %al
+; X64-NEXT: retq
+ %or = or i8 %a0, %a1
+ %xor = xor i8 %a0, %a1
+ %shift = lshr i8 %xor, 1
+ %res = sub i8 %or, %shift
+ ret i8 %res
+}
+
+define i8 @test_ext_i8(i8 %a0, i8 %a1) nounwind {
+; X86-LABEL: test_ext_i8:
+; X86: # %bb.0:
+; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movzbl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: movl %edx, %eax
+; X86-NEXT: orb %cl, %al
+; X86-NEXT: xorb %cl, %dl
+; X86-NEXT: shrb %dl
+; X86-NEXT: subb %dl, %al
+; X86-NEXT: retl
+;
+; X64-LABEL: test_ext_i8:
+; X64: # %bb.0:
+; X64-NEXT: movl %edi, %eax
+; X64-NEXT: orb %sil, %al
+; X64-NEXT: xorb %sil, %dil
+; X64-NEXT: shrb %dil
+; X64-NEXT: subb %dil, %al
+; X64-NEXT: retq
+ %x0 = zext i8 %a0 to i16
+ %x1 = zext i8 %a1 to i16
+ %sum = add i16 %x0, %x1
+ %sum1 = add i16 %sum, 1
+ %shift = lshr i16 %sum1, 1
+ %res = trunc i16 %shift to i8
+ ret i8 %res
+}
+
+define i16 @test_fixed_i16(i16 %a0, i16 %a1) nounwind {
+; X86-LABEL: test_fixed_i16:
+; X86: # %bb.0:
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: movl %edx, %eax
+; X86-NEXT: orl %ecx, %eax
+; X86-NEXT: xorl %ecx, %edx
+; X86-NEXT: movzwl %dx, %ecx
+; X86-NEXT: shrl %ecx
+; X86-NEXT: subl %ecx, %eax
+; X86-NEXT: # kill: def $ax killed $ax killed $eax
+; X86-NEXT: retl
+;
+; X64-LABEL: test_fixed_i16:
+; X64: # %bb.0:
+; X64-NEXT: movl %edi, %eax
+; X64-NEXT: orl %esi, %eax
+; X64-NEXT: xorl %esi, %edi
+; X64-NEXT: movzwl %di, %ecx
+; X64-NEXT: shrl %ecx
+; X64-NEXT: subl %ecx, %eax
+; X64-NEXT: # kill: def $ax killed $ax killed $eax
+; X64-NEXT: retq
+ %or = or i16 %a0, %a1
+ %xor = xor i16 %a0, %a1
+ %shift = lshr i16 %xor, 1
+ %res = sub i16 %or, %shift
+ ret i16 %res
+}
+
+define i16 @test_ext_i16(i16 %a0, i16 %a1) nounwind {
+; X86-LABEL: test_ext_i16:
+; X86: # %bb.0:
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: movl %edx, %eax
+; X86-NEXT: orl %ecx, %eax
+; X86-NEXT: xorl %ecx, %edx
+; X86-NEXT: movzwl %dx, %ecx
+; X86-NEXT: shrl %ecx
+; X86-NEXT: subl %ecx, %eax
+; X86-NEXT: # kill: def $ax killed $ax killed $eax
+; X86-NEXT: retl
+;
+; X64-LABEL: test_ext_i16:
+; X64: # %bb.0:
+; X64-NEXT: movl %edi, %eax
+; X64-NEXT: orl %esi, %eax
+; X64-NEXT: xorl %esi, %edi
+; X64-NEXT: movzwl %di, %ecx
+; X64-NEXT: shrl %ecx
+; X64-NEXT: subl %ecx, %eax
+; X64-NEXT: # kill: def $ax killed $ax killed $eax
+; X64-NEXT: retq
+ %x0 = zext i16 %a0 to i32
+ %x1 = zext i16 %a1 to i32
+ %sum = add i32 %x0, %x1
+ %sum1 = add i32 %sum, 1
+ %shift = lshr i32 %sum1, 1
+ %res = trunc i32 %shift to i16
+ ret i16 %res
+}
+
+define i32 @test_fixed_i32(i32 %a0, i32 %a1) nounwind {
+; X86-LABEL: test_fixed_i32:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: movl %edx, %eax
+; X86-NEXT: orl %ecx, %eax
+; X86-NEXT: xorl %ecx, %edx
+; X86-NEXT: shrl %edx
+; X86-NEXT: subl %edx, %eax
+; X86-NEXT: retl
+;
+; X64-LABEL: test_fixed_i32:
+; X64: # %bb.0:
+; X64-NEXT: movl %edi, %eax
+; X64-NEXT: orl %esi, %eax
+; X64-NEXT: xorl %esi, %edi
+; X64-NEXT: shrl %edi
+; X64-NEXT: subl %edi, %eax
+; X64-NEXT: retq
+ %or = or i32 %a0, %a1
+ %xor = xor i32 %a1, %a0
+ %shift = lshr i32 %xor, 1
+ %res = sub i32 %or, %shift
+ ret i32 %res
+}
+
+define i32 @test_ext_i32(i32 %a0, i32 %a1) nounwind {
+; X86-LABEL: test_ext_i32:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: movl %edx, %eax
+; X86-NEXT: orl %ecx, %eax
+; X86-NEXT: xorl %ecx, %edx
+; X86-NEXT: shrl %edx
+; X86-NEXT: subl %edx, %eax
+; X86-NEXT: retl
+;
+; X64-LABEL: test_ext_i32:
+; X64: # %bb.0:
+; X64-NEXT: movl %edi, %eax
+; X64-NEXT: orl %esi, %eax
+; X64-NEXT: xorl %esi, %edi
+; X64-NEXT: shrl %edi
+; X64-NEXT: subl %edi, %eax
+; X64-NEXT: retq
+ %x0 = zext i32 %a0 to i64
+ %x1 = zext i32 %a1 to i64
+ %sum = add i64 %x0, %x1
+ %sum1 = add i64 %sum, 1
+ %shift = lshr i64 %sum1, 1
+ %res = trunc i64 %shift to i32
+ ret i32 %res
+}
+
+define i64 @test_fixed_i64(i64 %a0, i64 %a1) nounwind {
+; X86-LABEL: test_fixed_i64:
+; X86: # %bb.0:
+; X86-NEXT: pushl %ebx
+; X86-NEXT: pushl %edi
+; X86-NEXT: pushl %esi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: movl %eax, %edi
+; X86-NEXT: xorl %ecx, %edi
+; X86-NEXT: movl %edx, %ebx
+; X86-NEXT: xorl %esi, %ebx
+; X86-NEXT: shrdl $1, %ebx, %edi
+; X86-NEXT: orl %esi, %edx
+; X86-NEXT: shrl %ebx
+; X86-NEXT: orl %ecx, %eax
+; X86-NEXT: subl %edi, %eax
+; X86-NEXT: sbbl %ebx, %edx
+; X86-NEXT: popl %esi
+; X86-NEXT: popl %edi
+; X86-NEXT: popl %ebx
+; X86-NEXT: retl
+;
+; X64-LABEL: test_fixed_i64:
+; X64: # %bb.0:
+; X64-NEXT: movq %rdi, %rax
+; X64-NEXT: orq %rsi, %rax
+; X64-NEXT: xorq %rsi, %rdi
+; X64-NEXT: shrq %rdi
+; X64-NEXT: subq %rdi, %rax
+; X64-NEXT: retq
+ %or = or i64 %a0, %a1
+ %xor = xor i64 %a1, %a0
+ %shift = lshr i64 %xor, 1
+ %res = sub i64 %or, %shift
+ ret i64 %res
+}
+
+define i64 @test_ext_i64(i64 %a0, i64 %a1) nounwind {
+; X86-LABEL: test_ext_i64:
+; X86: # %bb.0:
+; X86-NEXT: pushl %ebx
+; X86-NEXT: pushl %edi
+; X86-NEXT: pushl %esi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: movl %eax, %edi
+; X86-NEXT: xorl %ecx, %edi
+; X86-NEXT: movl %edx, %ebx
+; X86-NEXT: xorl %esi, %ebx
+; X86-NEXT: shrdl $1, %ebx, %edi
+; X86-NEXT: orl %esi, %edx
+; X86-NEXT: shrl %ebx
+; X86-NEXT: orl %ecx, %eax
+; X86-NEXT: subl %edi, %eax
+; X86-NEXT: sbbl %ebx, %edx
+; X86-NEXT: popl %esi
+; X86-NEXT: popl %edi
+; X86-NEXT: popl %ebx
+; X86-NEXT: retl
+;
+; X64-LABEL: test_ext_i64:
+; X64: # %bb.0:
+; X64-NEXT: movq %rdi, %rax
+; X64-NEXT: orq %rsi, %rax
+; X64-NEXT: xorq %rsi, %rdi
+; X64-NEXT: shrq %rdi
+; X64-NEXT: subq %rdi, %rax
+; X64-NEXT: retq
+ %x0 = zext i64 %a0 to i128
+ %x1 = zext i64 %a1 to i128
+ %sum = add i128 %x0, %x1
+ %sum1 = add i128 %sum, 1
+ %shift = lshr i128 %sum1, 1
+ %res = trunc i128 %shift to i64
+ ret i64 %res
+}
diff --git a/llvm/test/CodeGen/X86/avgfloors-scalar.ll b/llvm/test/CodeGen/X86/avgfloors-scalar.ll
new file mode 100644
index 0000000000000..4c591d4079040
--- /dev/null
+++ b/llvm/test/CodeGen/X86/avgfloors-scalar.ll
@@ -0,0 +1,263 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=i686-- | FileCheck %s --check-prefixes=X86
+; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefixes=X64
+
+;
+; fixed avg(x,y) = add(and(x,y),ashr(xor(x,y),1))
+;
+; ext avg(x,y) = trunc(ashr(add(sext(x),sext(y)),1))
+;
+
+define i8 @test_fixed_i8(i8 %a0, i8 %a1) nounwind {
+; X86-LABEL: test_fixed_i8:
+; X86: # %bb.0:
+; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl %eax, %edx
+; X86-NEXT: andb %cl, %dl
+; X86-NEXT: xorb %cl, %al
+; X86-NEXT: sarb %al
+; X86-NEXT: addb %dl, %al
+; X86-NEXT: retl
+;
+; X64-LABEL: test_fixed_i8:
+; X64: # %bb.0:
+; X64-NEXT: movl %edi, %eax
+; X64-NEXT: andb %sil, %al
+; X64-NEXT: xorb %sil, %dil
+; X64-NEXT: sarb %dil
+; X64-NEXT: addb %dil, %al
+; X64-NEXT: retq
+ %and = and i8 %a0, %a1
+ %xor = xor i8 %a0, %a1
+ %shift = ashr i8 %xor, 1
+ %res = add i8 %and, %shift
+ ret i8 %res
+}
+
+define i8 @test_ext_i8(i8 %a0, i8 %a1) nounwind {
+; X86-LABEL: test_ext_i8:
+; X86: # %bb.0:
+; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl %eax, %edx
+; X86-NEXT: andb %cl, %dl
+; X86-NEXT: xorb %cl, %al
+; X86-NEXT: sarb %al
+; X86-NEXT: addb %dl, %al
+; X86-NEXT: retl
+;
+; X64-LABEL: test_ext_i8:
+; X64: # %bb.0:
+; X64-NEXT: movl %edi, %eax
+; X64-NEXT: andb %sil, %al
+; X64-NEXT: xorb %sil, %dil
+; X64-NEXT: sarb %dil
+; X64-NEXT: addb %dil, %al
+; X64-NEXT: retq
+ %x0 = sext i8 %a0 to i16
+ %x1 = sext i8 %a1 to i16
+ %sum = add i16 %x0, %x1
+ %shift = ashr i16 %sum, 1
+ %res = trunc i16 %shift to i8
+ ret i8 %res
+}
+
+define i16 @test_fixed_i16(i16 %a0, i16 %a1) nounwind {
+; X86-LABEL: test_fixed_i16:
+; X86: # %bb.0:
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl %ecx, %edx
+; X86-NEXT: andl %eax, %edx
+; X86-NEXT: xorl %eax, %ecx
+; X86-NEXT: movswl %cx, %eax
+; X86-NEXT: sarl %eax
+; X86-NEXT: addl %edx, %eax
+; X86-NEXT: # kill: def $ax killed $ax killed $eax
+; X86-NEXT: retl
+;
+; X64-LABEL: test_fixed_i16:
+; X64: # %bb.0:
+; X64-NEXT: movl %edi, %ecx
+; X64-NEXT: andl %esi, %ecx
+; X64-NEXT: xorl %esi, %edi
+; X64-NEXT: movswl %di, %eax
+; X64-NEXT: sarl %eax
+; X64-NEXT: addl %ecx, %eax
+; X64-NEXT: # kill: def $ax killed $ax killed $eax
+; X64-NEXT: retq
+ %and = and i16 %a0, %a1
+ %xor = xor i16 %a0, %a1
+ %shift = ashr i16 %xor, 1
+ %res = add i16 %and, %shift
+ ret i16 %res
+}
+
+define i16 @test_ext_i16(i16 %a0, i16 %a1) nounwind {
+; X86-LABEL: test_ext_i16:
+; X86: # %bb.0:
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl %ecx, %edx
+; X86-NEXT: andl %eax, %edx
+; X86-NEXT: xorl %eax, %ecx
+; X86-NEXT: movswl %cx, %eax
+; X86-NEXT: sarl %eax
+; X86-NEXT: addl %edx, %eax
+; X86-NEXT: # kill: def $ax killed $ax killed $eax
+; X86-NEXT: retl
+;
+; X64-LABEL: test_ext_i16:
+; X64: # %bb.0:
+; X64-NEXT: movl %edi, %ecx
+; X64-NEXT: andl %esi, %ecx
+; X64-NEXT: xorl %esi, %edi
+; X64-NEXT: movswl %di, %eax
+; X64-NEXT: sarl %eax
+; X64-NEXT: addl %ecx, %eax
+; X64-NEXT: # kill: def $ax killed $ax killed $eax
+; X64-NEXT: retq
+ %x0 = sext i16 %a0 to i32
+ %x1 = sext i16 %a1 to i32
+ %sum = add i32 %x0, %x1
+ %shift = ashr i32 %sum, 1
+ %res = trunc i32 %shift to i16
+ ret i16 %res
+}
+
+define i32 @test_fixed_i32(i32 %a0, i32 %a1) nounwind {
+; X86-LABEL: test_fixed_i32:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl %eax, %edx
+; X86-NEXT: andl %ecx, %edx
+; X86-NEXT: xorl %ecx, %eax
+; X86-NEXT: sarl %eax
+; X86-NEXT: addl %edx, %eax
+; X86-NEXT: retl
+;
+; X64-LABEL: test_fixed_i32:
+; X64: # %bb.0:
+; X64-NEXT: movl %edi, %eax
+; X64-NEXT: andl %esi, %eax
+; X64-NEXT: xorl %esi, %edi
+; X64-NEXT: sarl %edi
+; X64-NEXT: addl %edi, %eax
+; X64-NEXT: retq
+ %and = and i32 %a0, %a1
+ %xor = xor i32 %a1, %a0
+ %shift = ashr i32 %xor, 1
+ %res = add i32 %and, %shift
+ ret i32 %res
+}
+
+define i32 @test_ext_i32(i32 %a0, i32 %a1) nounwind {
+; X86-LABEL: test_ext_i32:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl %eax, %edx
+; X86-NEXT: andl %ecx, %edx
+; X86-NEXT: xorl %ecx, %eax
+; X86-NEXT: sarl %eax
+; X86-NEXT: addl %edx, %eax
+; X86-NEXT: retl
+;
+; X64-LABEL: test_ext_i32:
+; X64: # %bb.0:
+; X64-NEXT: movl %edi, %eax
+; X64-NEXT: andl %esi, %eax
+; X64-NEXT: xorl %esi, %edi
+; X64-NEXT: sarl %edi
+; X64-NEXT: addl %edi, %eax
+; X64-NEXT: retq
+ %x0 = sext i32 %a0 to i64
+ %x1 = sext i32 %a1 to i64
+ %sum = add i64 %x0, %x1
+ %shift = ashr i64 %sum, 1
+ %res = trunc i64 %shift to i32
+ ret i32 %res
+}
+
+define i64 @test_fixed_i64(i64 %a0, i64 %a1) nounwind {
+; X86-LABEL: test_fixed_i64:
+; X86: # %bb.0:
+; X86-NEXT: pushl %ebx
+; X86-NEXT: pushl %edi
+; X86-NEXT: pushl %esi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl %eax, %ebx
+; X86-NEXT: xorl %esi, %ebx
+; X86-NEXT: movl %ecx, %edx
+; X86-NEXT: xorl %edi, %edx
+; X86-NEXT: shrdl $1, %edx, %ebx
+; X86-NEXT: andl %edi, %ecx
+; X86-NEXT: sarl %edx
+; X86-NEXT: andl %esi, %eax
+; X86-NEXT: addl %ebx, %eax
+; X86-NEXT: adcl %ecx, %edx
+; X86-NEXT: popl %esi
+; X86-NEXT: popl %edi
+; X86-NEXT: popl %ebx
+; X86-NEXT: retl
+;
+; X64-LABEL: test_fixed_i64:
+; X64: # %bb.0:
+; X64-NEXT: movq %rdi, %rax
+; X64-NEXT: andq %rsi, %rax
+; X64-NEXT: xorq %rsi, %rdi
+; X64-NEXT: sarq %rdi
+; X64-NEXT: addq %rdi, %rax
+; X64-NEXT: retq
+ %and = and i64 %a0, %a1
+ %xor = xor i64 %a1, %a0
+ %shift = ashr i64 %xor, 1
+ %res = add i64 %and, %shift
+ ret i64 %res
+}
+
+define i64 @test_ext_i64(i64 %a0, i64 %a1) nounwind {
+; X86-LABEL: test_ext_i64:
+; X86: # %bb.0:
+; X86-NEXT: pushl %ebx
+; X86-NEXT: pushl %edi
+; X86-NEXT: pushl %esi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl %eax, %ebx
+; X86-NEXT: xorl %esi, %ebx
+; X86-NEXT: movl %ecx, %edx
+; X86-NEXT: xorl %edi, %edx
+; X86-NEXT: shrdl $1, %edx, %ebx
+; X86-NEXT: andl %edi, %ecx
+; X86-NEXT: sarl %edx
+; X86-NEXT: andl %esi, %eax
+; X86-NEXT: addl %ebx, %eax
+; X86-NEXT: adcl %ecx, %edx
+; X86-NEXT: popl %esi
+; X86-NEXT: popl %edi
+; X86-NEXT: popl %ebx
+; X86-NEXT: retl
+;
+; X64-LABEL: test_ext_i64:
+; X64: # %bb.0:
+; X64-NEXT: movq %rdi, %rax
+; X64-NEXT: andq %rsi, %rax
+; X64-NEXT: xorq %rsi, %rdi
+; X64-NEXT: sarq %rdi
+; X64-NEXT: addq %rdi, %rax
+; X64-NEXT: retq
+ %x0 = sext i64 %a0 to i128
+ %x1 = sext i64 %a1 to i128
+ %sum = add i128 %x0, %x1
+ %shift = ashr i128 %sum, 1
+ %res = trunc i128 %shift to i64
+ ret i64 %res
+}
diff --git a/llvm/test/CodeGen/X86/avgflooru-scalar.ll b/llvm/test/CodeGen/X86/avgflooru-scalar.ll
new file mode 100644
index 0000000000000..592e5e15b936a
--- /dev/null
+++ b/llvm/test/CodeGen/X86/avgflooru-scalar.ll
@@ -0,0 +1,263 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=i686-- | FileCheck %s --check-prefixes=X86
+; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefixes=X64
+
+;
+; fixed avg(x,y) = add(and(x,y),lshr(xor(x,y),1))
+;
+; ext avg(x,y) = trunc(lshr(add(zext(x),zext(y)),1))
+;
+
+define i8 @test_fixed_i8(i8 %a0, i8 %a1) nounwind {
+; X86-LABEL: test_fixed_i8:
+; X86: # %bb.0:
+; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl %eax, %edx
+; X86-NEXT: andb %cl, %dl
+; X86-NEXT: xorb %cl, %al
+; X86-NEXT: shrb %al
+; X86-NEXT: addb %dl, %al
+; X86-NEXT: retl
+;
+; X64-LABEL: test_fixed_i8:
+; X64: # %bb.0:
+; X64-NEXT: movl %edi, %eax
+; X64-NEXT: andb %sil, %al
+; X64-NEXT: xorb %sil, %dil
+; X64-NEXT: shrb %dil
+; X64-NEXT: addb %dil, %al
+; X64-NEXT: retq
+ %and = and i8 %a0, %a1
+ %xor = xor i8 %a0, %a1
+ %shift = lshr i8 %xor, 1
+ %res = add i8 %and, %shift
+ ret i8 %res
+}
+
+define i8 @test_ext_i8(i8 %a0, i8 %a1) nounwind {
+; X86-LABEL: test_ext_i8:
+; X86: # %bb.0:
+; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl %eax, %edx
+; X86-NEXT: andb %cl, %dl
+; X86-NEXT: xorb %cl, %al
+; X86-NEXT: shrb %al
+; X86-NEXT: addb %dl, %al
+; X86-NEXT: retl
+;
+; X64-LABEL: test_ext_i8:
+; X64: # %bb.0:
+; X64-NEXT: movl %edi, %eax
+; X64-NEXT: andb %sil, %al
+; X64-NEXT: xorb %sil, %dil
+; X64-NEXT: shrb %dil
+; X64-NEXT: addb %dil, %al
+; X64-NEXT: retq
+ %x0 = zext i8 %a0 to i16
+ %x1 = zext i8 %a1 to i16
+ %sum = add i16 %x0, %x1
+ %shift = lshr i16 %sum, 1
+ %res = trunc i16 %shift to i8
+ ret i8 %res
+}
+
+define i16 @test_fixed_i16(i16 %a0, i16 %a1) nounwind {
+; X86-LABEL: test_fixed_i16:
+; X86: # %bb.0:
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl %ecx, %edx
+; X86-NEXT: andl %eax, %edx
+; X86-NEXT: xorl %eax, %ecx
+; X86-NEXT: movzwl %cx, %eax
+; X86-NEXT: shrl %eax
+; X86-NEXT: addl %edx, %eax
+; X86-NEXT: # kill: def $ax killed $ax killed $eax
+; X86-NEXT: retl
+;
+; X64-LABEL: test_fixed_i16:
+; X64: # %bb.0:
+; X64-NEXT: movl %edi, %ecx
+; X64-NEXT: andl %esi, %ecx
+; X64-NEXT: xorl %esi, %edi
+; X64-NEXT: movzwl %di, %eax
+; X64-NEXT: shrl %eax
+; X64-NEXT: addl %ecx, %eax
+; X64-NEXT: # kill: def $ax killed $ax killed $eax
+; X64-NEXT: retq
+ %and = and i16 %a0, %a1
+ %xor = xor i16 %a0, %a1
+ %shift = lshr i16 %xor, 1
+ %res = add i16 %and, %shift
+ ret i16 %res
+}
+
+define i16 @test_ext_i16(i16 %a0, i16 %a1) nounwind {
+; X86-LABEL: test_ext_i16:
+; X86: # %bb.0:
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl %ecx, %edx
+; X86-NEXT: andl %eax, %edx
+; X86-NEXT: xorl %eax, %ecx
+; X86-NEXT: movzwl %cx, %eax
+; X86-NEXT: shrl %eax
+; X86-NEXT: addl %edx, %eax
+; X86-NEXT: # kill: def $ax killed $ax killed $eax
+; X86-NEXT: retl
+;
+; X64-LABEL: test_ext_i16:
+; X64: # %bb.0:
+; X64-NEXT: movl %edi, %ecx
+; X64-NEXT: andl %esi, %ecx
+; X64-NEXT: xorl %esi, %edi
+; X64-NEXT: movzwl %di, %eax
+; X64-NEXT: shrl %eax
+; X64-NEXT: addl %ecx, %eax
+; X64-NEXT: # kill: def $ax killed $ax killed $eax
+; X64-NEXT: retq
+ %x0 = zext i16 %a0 to i32
+ %x1 = zext i16 %a1 to i32
+ %sum = add i32 %x0, %x1
+ %shift = lshr i32 %sum, 1
+ %res = trunc i32 %shift to i16
+ ret i16 %res
+}
+
+define i32 @test_fixed_i32(i32 %a0, i32 %a1) nounwind {
+; X86-LABEL: test_fixed_i32:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl %eax, %edx
+; X86-NEXT: andl %ecx, %edx
+; X86-NEXT: xorl %ecx, %eax
+; X86-NEXT: shrl %eax
+; X86-NEXT: addl %edx, %eax
+; X86-NEXT: retl
+;
+; X64-LABEL: test_fixed_i32:
+; X64: # %bb.0:
+; X64-NEXT: movl %edi, %eax
+; X64-NEXT: andl %esi, %eax
+; X64-NEXT: xorl %esi, %edi
+; X64-NEXT: shrl %edi
+; X64-NEXT: addl %edi, %eax
+; X64-NEXT: retq
+ %and = and i32 %a0, %a1
+ %xor = xor i32 %a1, %a0
+ %shift = lshr i32 %xor, 1
+ %res = add i32 %and, %shift
+ ret i32 %res
+}
+
+define i32 @test_ext_i32(i32 %a0, i32 %a1) nounwind {
+; X86-LABEL: test_ext_i32:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl %eax, %edx
+; X86-NEXT: andl %ecx, %edx
+; X86-NEXT: xorl %ecx, %eax
+; X86-NEXT: shrl %eax
+; X86-NEXT: addl %edx, %eax
+; X86-NEXT: retl
+;
+; X64-LABEL: test_ext_i32:
+; X64: # %bb.0:
+; X64-NEXT: movl %edi, %eax
+; X64-NEXT: andl %esi, %eax
+; X64-NEXT: xorl %esi, %edi
+; X64-NEXT: shrl %edi
+; X64-NEXT: addl %edi, %eax
+; X64-NEXT: retq
+ %x0 = zext i32 %a0 to i64
+ %x1 = zext i32 %a1 to i64
+ %sum = add i64 %x0, %x1
+ %shift = lshr i64 %sum, 1
+ %res = trunc i64 %shift to i32
+ ret i32 %res
+}
+
+define i64 @test_fixed_i64(i64 %a0, i64 %a1) nounwind {
+; X86-LABEL: test_fixed_i64:
+; X86: # %bb.0:
+; X86-NEXT: pushl %ebx
+; X86-NEXT: pushl %edi
+; X86-NEXT: pushl %esi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl %eax, %ebx
+; X86-NEXT: xorl %esi, %ebx
+; X86-NEXT: movl %ecx, %edx
+; X86-NEXT: xorl %edi, %edx
+; X86-NEXT: shrdl $1, %edx, %ebx
+; X86-NEXT: andl %edi, %ecx
+; X86-NEXT: shrl %edx
+; X86-NEXT: andl %esi, %eax
+; X86-NEXT: addl %ebx, %eax
+; X86-NEXT: adcl %ecx, %edx
+; X86-NEXT: popl %esi
+; X86-NEXT: popl %edi
+; X86-NEXT: popl %ebx
+; X86-NEXT: retl
+;
+; X64-LABEL: test_fixed_i64:
+; X64: # %bb.0:
+; X64-NEXT: movq %rdi, %rax
+; X64-NEXT: andq %rsi, %rax
+; X64-NEXT: xorq %rsi, %rdi
+; X64-NEXT: shrq %rdi
+; X64-NEXT: addq %rdi, %rax
+; X64-NEXT: retq
+ %and = and i64 %a0, %a1
+ %xor = xor i64 %a1, %a0
+ %shift = lshr i64 %xor, 1
+ %res = add i64 %and, %shift
+ ret i64 %res
+}
+
+define i64 @test_ext_i64(i64 %a0, i64 %a1) nounwind {
+; X86-LABEL: test_ext_i64:
+; X86: # %bb.0:
+; X86-NEXT: pushl %ebx
+; X86-NEXT: pushl %edi
+; X86-NEXT: pushl %esi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl %eax, %ebx
+; X86-NEXT: xorl %esi, %ebx
+; X86-NEXT: movl %ecx, %edx
+; X86-NEXT: xorl %edi, %edx
+; X86-NEXT: shrdl $1, %edx, %ebx
+; X86-NEXT: andl %edi, %ecx
+; X86-NEXT: shrl %edx
+; X86-NEXT: andl %esi, %eax
+; X86-NEXT: addl %ebx, %eax
+; X86-NEXT: adcl %ecx, %edx
+; X86-NEXT: popl %esi
+; X86-NEXT: popl %edi
+; X86-NEXT: popl %ebx
+; X86-NEXT: retl
+;
+; X64-LABEL: test_ext_i64:
+; X64: # %bb.0:
+; X64-NEXT: movq %rdi, %rax
+; X64-NEXT: andq %rsi, %rax
+; X64-NEXT: xorq %rsi, %rdi
+; X64-NEXT: shrq %rdi
+; X64-NEXT: addq %rdi, %rax
+; X64-NEXT: retq
+ %x0 = zext i64 %a0 to i128
+ %x1 = zext i64 %a1 to i128
+ %sum = add i128 %x0, %x1
+ %shift = lshr i128 %sum, 1
+ %res = trunc i128 %shift to i64
+ ret i64 %res
+}
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