[llvm] [AMDGPU] Extend llvm.amdgcn.set.inactive intrinsic to support Reg32/Reg64 types (PR #94457)

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Fri Jun 14 05:15:35 PDT 2024

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https://github.com/arsenm closed https://github.com/llvm/llvm-project/pull/94457

Previous message: [llvm] [AMDGPU] Extend llvm.amdgcn.set.inactive intrinsic to support Reg32/Reg64 types (PR #94457)
Next message: [clang] [llvm] [AMDGPU] Extend readlane, writelane and readfirstlane intrinsic lowering for generic types (PR #89217)
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