[llvm] [PowerPC][AIX] Emit PowerPC version for XCOFF. (PR #95510)
via llvm-commits
llvm-commits at lists.llvm.org
Fri Jun 14 00:11:08 PDT 2024
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-powerpc
Author: Esme (EsmeYi)
<details>
<summary>Changes</summary>
With this PR, both assembly and object on AIX emit PPC versions.
Without setting `-mcpu`, the default value of PPC version is `pwr7` on AIX.
---
Patch is 27.94 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/95510.diff
31 Files Affected:
- (modified) llvm/include/llvm/BinaryFormat/XCOFF.h (+15-3)
- (modified) llvm/include/llvm/MC/MCAssembler.h (+5)
- (modified) llvm/include/llvm/MC/MCObjectStreamer.h (+1)
- (modified) llvm/include/llvm/MC/MCStreamer.h (+3)
- (modified) llvm/lib/BinaryFormat/XCOFF.cpp (+14)
- (modified) llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp (+5)
- (modified) llvm/lib/MC/MCAsmStreamer.cpp (+9)
- (modified) llvm/lib/MC/MCObjectStreamer.cpp (+4)
- (modified) llvm/lib/MC/MCStreamer.cpp (+1)
- (modified) llvm/lib/MC/XCOFFObjectWriter.cpp (+2-5)
- (modified) llvm/test/CodeGen/PowerPC/aix-extern-weak.ll (+1-2)
- (modified) llvm/test/CodeGen/PowerPC/aix-extern.ll (+1-2)
- (modified) llvm/test/CodeGen/PowerPC/aix-filename-c.ll (+54-9)
- (modified) llvm/test/CodeGen/PowerPC/aix-filename-cpp.ll (+3-4)
- (modified) llvm/test/CodeGen/PowerPC/aix-filename-f.ll (+3-4)
- (modified) llvm/test/CodeGen/PowerPC/aix-func-dsc-gen.ll (+1-1)
- (modified) llvm/test/CodeGen/PowerPC/aix-llvm-intrinsic.ll (+1-2)
- (modified) llvm/test/CodeGen/PowerPC/aix-tls-xcoff-reloc-large.ll (+1-1)
- (modified) llvm/test/CodeGen/PowerPC/aix-tls-xcoff-reloc.ll (+1-1)
- (modified) llvm/test/CodeGen/PowerPC/aix-tls-xcoff-variables.ll (+1-1)
- (modified) llvm/test/CodeGen/PowerPC/aix-weak.ll (+1-2)
- (modified) llvm/test/CodeGen/PowerPC/aix-xcoff-data.ll (+4-4)
- (modified) llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll (+1-2)
- (modified) llvm/test/DebugInfo/XCOFF/empty.ll (+2)
- (modified) llvm/test/DebugInfo/XCOFF/explicit-section.ll (+1)
- (modified) llvm/test/DebugInfo/XCOFF/function-sections.ll (+1)
- (modified) llvm/test/tools/llvm-readobj/XCOFF/symbols-invalid.test (+1-1)
- (modified) llvm/test/tools/llvm-readobj/XCOFF/symbols.test (+1-1)
- (modified) llvm/test/tools/llvm-readobj/XCOFF/symbols64.test (+1-1)
- (modified) llvm/test/tools/yaml2obj/XCOFF/aux-symbols.yaml (+6-6)
- (modified) llvm/tools/llvm-readobj/XCOFFDumper.cpp (+14-1)
``````````diff
diff --git a/llvm/include/llvm/BinaryFormat/XCOFF.h b/llvm/include/llvm/BinaryFormat/XCOFF.h
index bbcd8a4f29ae9..5e8d30b991f45 100644
--- a/llvm/include/llvm/BinaryFormat/XCOFF.h
+++ b/llvm/include/llvm/BinaryFormat/XCOFF.h
@@ -334,9 +334,20 @@ enum CFileLangId : uint8_t {
};
enum CFileCpuId : uint8_t {
- TCPU_PPC64 = 2, ///< PowerPC common architecture 64-bit mode.
- TCPU_COM = 3, ///< POWER and PowerPC architecture common.
- TCPU_970 = 19 ///< PPC970 - PowerPC 64-bit architecture.
+ TCPU_INVALID = 0, ///< Invalid id - assumes POWER for old objects.
+ TCPU_PPC = 1, ///< PowerPC common architecture 32 bit mode.
+ TCPU_PPC64 = 2, ///< PowerPC common architecture 64-bit mode.
+ TCPU_COM = 3, ///< POWER and PowerPC architecture common.
+ TCPU_PWR = 4, ///< POWER common architecture objects.
+ TCPU_PWR5 = 18, ///< PWR5 - PowerPC 64-bit architecture.
+ TCPU_970 = 19, ///< PPC970 - PowerPC 64-bit architecture.
+ TCPU_PWR6 = 20, ///< PWR6 - PowerPC 64-bit architecture.
+ TCPU_PWR5X = 22, ///< PWR5+ - PowerPC 64-bit architecture.
+ TCPU_PWR6E = 23, ///< PWR6E - PowerPC 64-bit architecture.
+ TCPU_PWR7 = 24, ///< PWR7 - PowerPC 64-bit architecture.
+ TCPU_PWR8 = 25, ///< PWR8 - PowerPC 64-bit architecture.
+ TCPU_PWR9 = 26, ///< PWR9 - PowerPC 64-bit architecture.
+ TCPU_PWR10 = 27, ///< PWR10 - PowerPC 64-bit architecture.
};
enum SymbolAuxType : uint8_t {
@@ -468,6 +479,7 @@ enum ExtendedTBTableFlag : uint8_t {
StringRef getNameForTracebackTableLanguageId(TracebackTable::LanguageID LangId);
SmallString<32> getExtendedTBTableFlagString(uint8_t Flag);
+XCOFF::CFileCpuId getCpuID(StringRef CPU);
struct CsectProperties {
CsectProperties(StorageMappingClass SMC, SymbolType ST)
diff --git a/llvm/include/llvm/MC/MCAssembler.h b/llvm/include/llvm/MC/MCAssembler.h
index 914c7506e754b..45f4befeb84d5 100644
--- a/llvm/include/llvm/MC/MCAssembler.h
+++ b/llvm/include/llvm/MC/MCAssembler.h
@@ -135,6 +135,8 @@ class MCAssembler {
std::vector<std::pair<std::string, size_t>> FileNames;
// Optional compiler version.
std::string CompilerVersion;
+ // PPC CPU type.
+ StringRef CPU;
MCDwarfLineTableParams LTParams;
@@ -490,6 +492,9 @@ class MCAssembler {
}
StringRef getCompilerVersion() { return CompilerVersion; }
+ void setCPU(StringRef TargetCPU) { CPU = TargetCPU; }
+ StringRef getCPU() { return CPU; }
+
/// Write the necessary bundle padding to \p OS.
/// Expects a fragment \p F containing instructions and its size \p FSize.
void writeFragmentPadding(raw_ostream &OS, const MCEncodedFragment &F,
diff --git a/llvm/include/llvm/MC/MCObjectStreamer.h b/llvm/include/llvm/MC/MCObjectStreamer.h
index c0a337f5ea45e..c3d44e51e98db 100644
--- a/llvm/include/llvm/MC/MCObjectStreamer.h
+++ b/llvm/include/llvm/MC/MCObjectStreamer.h
@@ -203,6 +203,7 @@ class MCObjectStreamer : public MCStreamer {
void emitFileDirective(StringRef Filename) override;
void emitFileDirective(StringRef Filename, StringRef CompilerVersion,
StringRef TimeStamp, StringRef Description) override;
+ void emitMachineDirective(StringRef CPU) override;
void emitAddrsig() override;
void emitAddrsigSym(const MCSymbol *Sym) override;
diff --git a/llvm/include/llvm/MC/MCStreamer.h b/llvm/include/llvm/MC/MCStreamer.h
index b7468cf70a664..fa29c1dd5033d 100644
--- a/llvm/include/llvm/MC/MCStreamer.h
+++ b/llvm/include/llvm/MC/MCStreamer.h
@@ -908,6 +908,9 @@ class MCStreamer {
virtual void emitFileDirective(StringRef Filename, StringRef CompilerVersion,
StringRef TimeStamp, StringRef Description);
+ // Emit '.machine "CPU"' assembler diretive.
+ virtual void emitMachineDirective(StringRef CPU);
+
/// Emit the "identifiers" directive. This implements the
/// '.ident "version foo"' assembler directive.
virtual void emitIdent(StringRef IdentString) {}
diff --git a/llvm/lib/BinaryFormat/XCOFF.cpp b/llvm/lib/BinaryFormat/XCOFF.cpp
index 6b11ab2ff96bc..f2e3b2e82f950 100644
--- a/llvm/lib/BinaryFormat/XCOFF.cpp
+++ b/llvm/lib/BinaryFormat/XCOFF.cpp
@@ -9,6 +9,7 @@
#include "llvm/BinaryFormat/XCOFF.h"
#include "llvm/ADT/SmallString.h"
#include "llvm/ADT/StringRef.h"
+#include "llvm/ADT/StringSwitch.h"
#include "llvm/Support/Errc.h"
#include "llvm/Support/Error.h"
@@ -107,6 +108,19 @@ StringRef XCOFF::getNameForTracebackTableLanguageId(
}
#undef LANG_CASE
+XCOFF::CFileCpuId XCOFF::getCpuID(StringRef CPU) {
+ return StringSwitch<XCOFF::CFileCpuId>(CPU)
+ .Case("pwr4", XCOFF::TCPU_PWR)
+ .Case("pwr5", XCOFF::TCPU_PWR5)
+ .Case("pwr6", XCOFF::TCPU_PWR6)
+ .Case("pwr5x", XCOFF::TCPU_PWR5X)
+ .Case("pwr7", XCOFF::TCPU_PWR7)
+ .Case("pwr8", XCOFF::TCPU_PWR8)
+ .Case("pwr9", XCOFF::TCPU_PWR9)
+ .Case("pwr10", XCOFF::TCPU_PWR10)
+ .Default(XCOFF::TCPU_PWR7);
+}
+
Expected<SmallString<32>> XCOFF::parseParmsType(uint32_t Value,
unsigned FixedParmsNum,
unsigned FloatingParmsNum) {
diff --git a/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp b/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
index 3580d484b7ddd..f9a7c37b70bf2 100644
--- a/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
+++ b/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
@@ -517,6 +517,11 @@ bool AsmPrinter::doInitialization(Module &M) {
// On AIX, emit bytes for llvm.commandline metadata after .file so that the
// C_INFO symbol is preserved if any csect is kept by the linker.
if (TM.getTargetTriple().isOSBinFormatXCOFF()) {
+ // Emit .machine directive on AIX.
+ StringRef TargetCPU =
+ TM.getTargetCPU().empty() ? "pwr7" : TM.getTargetCPU();
+ OutStreamer->emitMachineDirective(TargetCPU);
+
emitModuleCommandLines(M);
// Now we can generate section information.
OutStreamer->initSections(false, *TM.getMCSubtargetInfo());
diff --git a/llvm/lib/MC/MCAsmStreamer.cpp b/llvm/lib/MC/MCAsmStreamer.cpp
index f257d0d9e83f7..4b6c52eb9f68a 100644
--- a/llvm/lib/MC/MCAsmStreamer.cpp
+++ b/llvm/lib/MC/MCAsmStreamer.cpp
@@ -272,6 +272,9 @@ class MCAsmStreamer final : public MCStreamer {
void emitFileDirective(StringRef Filename) override;
void emitFileDirective(StringRef Filename, StringRef CompilerVersion,
StringRef TimeStamp, StringRef Description) override;
+
+ void emitMachineDirective(StringRef CPU) override;
+
Expected<unsigned> tryEmitDwarfFileDirective(
unsigned FileNo, StringRef Directory, StringRef Filename,
std::optional<MD5::MD5Result> Checksum = std::nullopt,
@@ -1610,6 +1613,12 @@ void MCAsmStreamer::emitFileDirective(StringRef Filename,
EmitEOL();
}
+void MCAsmStreamer::emitMachineDirective(StringRef CPU) {
+ OS << "\t.machine\t";
+ PrintQuotedString(CPU, OS);
+ EmitEOL();
+}
+
void MCAsmStreamer::printDwarfFileDirective(
unsigned FileNo, StringRef Directory, StringRef Filename,
std::optional<MD5::MD5Result> Checksum, std::optional<StringRef> Source,
diff --git a/llvm/lib/MC/MCObjectStreamer.cpp b/llvm/lib/MC/MCObjectStreamer.cpp
index bf1ce76cdc14b..80c1a8920177f 100644
--- a/llvm/lib/MC/MCObjectStreamer.cpp
+++ b/llvm/lib/MC/MCObjectStreamer.cpp
@@ -902,6 +902,10 @@ void MCObjectStreamer::emitFileDirective(StringRef Filename,
// with the integrated assembler.
}
+void MCObjectStreamer::emitMachineDirective(StringRef CPU) {
+ getAssembler().setCPU(CPU);
+}
+
void MCObjectStreamer::emitAddrsig() {
getAssembler().getWriter().emitAddrsigSection();
}
diff --git a/llvm/lib/MC/MCStreamer.cpp b/llvm/lib/MC/MCStreamer.cpp
index 199d865ea3496..c248cc5002ea5 100644
--- a/llvm/lib/MC/MCStreamer.cpp
+++ b/llvm/lib/MC/MCStreamer.cpp
@@ -1171,6 +1171,7 @@ void MCStreamer::emitFileDirective(StringRef Filename,
StringRef CompilerVersion,
StringRef TimeStamp, StringRef Description) {
}
+void MCStreamer::emitMachineDirective(StringRef CPU) {}
void MCStreamer::emitCOFFSymbolStorageClass(int StorageClass) {
llvm_unreachable("this directive only supported on COFF targets");
}
diff --git a/llvm/lib/MC/XCOFFObjectWriter.cpp b/llvm/lib/MC/XCOFFObjectWriter.cpp
index a7c3818d598b7..c059b98212f62 100644
--- a/llvm/lib/MC/XCOFFObjectWriter.cpp
+++ b/llvm/lib/MC/XCOFFObjectWriter.cpp
@@ -1193,11 +1193,8 @@ void XCOFFObjectWriter::writeSymbolTable(MCAssembler &Asm,
LangID = XCOFF::TB_Fortran;
else
LangID = XCOFF::TB_CPLUSPLUS;
- uint8_t CpuID;
- if (is64Bit())
- CpuID = XCOFF::TCPU_PPC64;
- else
- CpuID = XCOFF::TCPU_COM;
+
+ uint8_t CpuID = XCOFF::getCpuID(Asm.getCPU());
int NumberOfFileAuxEntries = 1;
if (!Vers.empty())
diff --git a/llvm/test/CodeGen/PowerPC/aix-extern-weak.ll b/llvm/test/CodeGen/PowerPC/aix-extern-weak.ll
index ea61fdb022b5c..ab62cd95ae2a4 100644
--- a/llvm/test/CodeGen/PowerPC/aix-extern-weak.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-extern-weak.ll
@@ -69,8 +69,7 @@ declare extern_weak void @foo_ext_weak(ptr)
; CHECKSYM-NEXT: Value (SymbolTableIndex): 0x0
; CHECKSYM-NEXT: Section: N_DEBUG
; CHECKSYM-NEXT: Source Language ID: TB_CPLUSPLUS (0x9)
-; CHECKSYM32-NEXT: CPU Version ID: TCPU_COM (0x3)
-; CHECKSYM64-NEXT: CPU Version ID: TCPU_PPC64 (0x2)
+; CHECKSYM-NEXT: CPU Version ID: TCPU_PWR (0x4)
; CHECKSYM-NEXT: StorageClass: C_FILE (0x67)
; CHECKSYM-NEXT: NumberOfAuxEntries: 2
; CHECKSYM: Symbol {
diff --git a/llvm/test/CodeGen/PowerPC/aix-extern.ll b/llvm/test/CodeGen/PowerPC/aix-extern.ll
index b4366dddedb2f..825e30242ed50 100644
--- a/llvm/test/CodeGen/PowerPC/aix-extern.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-extern.ll
@@ -92,8 +92,7 @@ declare i32 @bar_extern(ptr)
; CHECKSYM-NEXT: Value (SymbolTableIndex): 0x0
; CHECKSYM-NEXT: Section: N_DEBUG
; CHECKSYM-NEXT: Source Language ID: TB_CPLUSPLUS (0x9)
-; CHECKSYM32-NEXT: CPU Version ID: TCPU_COM (0x3)
-; CHECKSYM64-NEXT: CPU Version ID: TCPU_PPC64 (0x2)
+; CHECKSYM-NEXT: CPU Version ID: TCPU_PWR (0x4)
; CHECKSYM-NEXT: StorageClass: C_FILE (0x67)
; CHECKSYM-NEXT: NumberOfAuxEntries: 2
; CHECKSYM: Symbol {
diff --git a/llvm/test/CodeGen/PowerPC/aix-filename-c.ll b/llvm/test/CodeGen/PowerPC/aix-filename-c.ll
index c4202a0c58cee..dd342c00176f3 100644
--- a/llvm/test/CodeGen/PowerPC/aix-filename-c.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-filename-c.ll
@@ -1,12 +1,57 @@
-; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -filetype=obj -o %t.o < %s
-; RUN: llvm-readobj --symbols %t.o | FileCheck --check-prefixes=OBJ,OBJ32 %s
-; RUN: llc -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff -filetype=obj -o %t64.o < %s
-; RUN: llvm-readobj --symbols %t64.o | FileCheck --check-prefixes=OBJ,OBJ64 %s
+; RUN: llc -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff -mcpu=pwr9 < %s | FileCheck --check-prefixes=ASM %s
+
+; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr9 -filetype=obj -o %t.o < %s
+; RUN: llvm-readobj --symbols %t.o | FileCheck --check-prefixes=OBJ32 %s
+; RUN: llc -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff -mcpu=pwr9 -filetype=obj -o %t64.o < %s
+; RUN: llvm-readobj --symbols %t64.o | FileCheck --check-prefixes=OBJ64 %s
source_filename = "1.c"
-; OBJ: Name: .file
-; OBJ: Source Language ID: TB_C (0x0)
-; OBJ32: CPU Version ID: TCPU_COM (0x3)
-; OBJ64: CPU Version ID: TCPU_PPC64 (0x2)
-; OBJ: Name: 1.c
+; ASM: .file "1.c",,"LLVM version 19.0.0git"
+; ASM-NEXT: .machine "pwr9"
+; ASM-NEXT: .csect ..text..[PR],5
+; ASM-NEXT: .rename ..text..[PR],""
+
+; OBJ32: Symbol {
+; OBJ32-NEXT: Index: 0
+; OBJ32-NEXT: Name: .file
+; OBJ32-NEXT: Value (SymbolTableIndex): 0x0
+; OBJ32-NEXT: Section: N_DEBUG
+; OBJ32-NEXT: Source Language ID: TB_C (0x0)
+; OBJ32-NEXT: CPU Version ID: TCPU_PWR9 (0x1A)
+; OBJ32-NEXT: StorageClass: C_FILE (0x67)
+; OBJ32-NEXT: NumberOfAuxEntries: 2
+; OBJ32-NEXT: File Auxiliary Entry {
+; OBJ32-NEXT: Index: 1
+; OBJ32-NEXT: Name: 1.c
+; OBJ32-NEXT: Type: XFT_FN (0x0)
+; OBJ32-NEXT: }
+; OBJ32-NEXT: File Auxiliary Entry {
+; OBJ32-NEXT: Index: 2
+; OBJ32-NEXT: Name: LLVM version 19.0.0git
+; OBJ32-NEXT: Type: XFT_CV (0x2)
+; OBJ32-NEXT: }
+; OBJ32-NEXT: }
+
+; OBJ64: Symbol {
+; OBJ64-NEXT: Index: 0
+; OBJ64-NEXT: Name: .file
+; OBJ64-NEXT: Value (SymbolTableIndex): 0x0
+; OBJ64-NEXT: Section: N_DEBUG
+; OBJ64-NEXT: Source Language ID: TB_C (0x0)
+; OBJ64-NEXT: CPU Version ID: TCPU_PWR9 (0x1A)
+; OBJ64-NEXT: StorageClass: C_FILE (0x67)
+; OBJ64-NEXT: NumberOfAuxEntries: 2
+; OBJ64-NEXT: File Auxiliary Entry {
+; OBJ64-NEXT: Index: 1
+; OBJ64-NEXT: Name: 1.c
+; OBJ64-NEXT: Type: XFT_FN (0x0)
+; OBJ64-NEXT: Auxiliary Type: AUX_FILE (0xFC)
+; OBJ64-NEXT: }
+; OBJ64-NEXT: File Auxiliary Entry {
+; OBJ64-NEXT: Index: 2
+; OBJ64-NEXT: Name: LLVM version 19.0.0git
+; OBJ64-NEXT: Type: XFT_CV (0x2)
+; OBJ64-NEXT: Auxiliary Type: AUX_FILE (0xFC)
+; OBJ64-NEXT: }
+; OBJ64-NEXT: }
diff --git a/llvm/test/CodeGen/PowerPC/aix-filename-cpp.ll b/llvm/test/CodeGen/PowerPC/aix-filename-cpp.ll
index 802281b6c1eaa..873619d20cd2c 100644
--- a/llvm/test/CodeGen/PowerPC/aix-filename-cpp.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-filename-cpp.ll
@@ -1,12 +1,11 @@
; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -filetype=obj -o %t.o < %s
-; RUN: llvm-readobj --symbols %t.o | FileCheck --check-prefixes=OBJ,OBJ32 %s
+; RUN: llvm-readobj --symbols %t.o | FileCheck --check-prefixes=OBJ %s
; RUN: llc -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff -filetype=obj -o %t64.o < %s
-; RUN: llvm-readobj --symbols %t64.o | FileCheck --check-prefixes=OBJ,OBJ64 %s
+; RUN: llvm-readobj --symbols %t64.o | FileCheck --check-prefixes=OBJ %s
source_filename = "1.cpp"
; OBJ: Name: .file
; OBJ: Source Language ID: TB_CPLUSPLUS (0x9)
-; OBJ32: CPU Version ID: TCPU_COM (0x3)
-; OBJ64: CPU Version ID: TCPU_PPC64 (0x2)
+; OBJ: CPU Version ID: TCPU_PWR7 (0x18)
; OBJ: Name: 1.cpp
diff --git a/llvm/test/CodeGen/PowerPC/aix-filename-f.ll b/llvm/test/CodeGen/PowerPC/aix-filename-f.ll
index 99036bde702d6..1167148d21a7f 100644
--- a/llvm/test/CodeGen/PowerPC/aix-filename-f.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-filename-f.ll
@@ -1,12 +1,11 @@
; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -filetype=obj -o %t.o < %s
-; RUN: llvm-readobj --symbols %t.o | FileCheck --check-prefixes=OBJ,OBJ32 %s
+; RUN: llvm-readobj --symbols %t.o | FileCheck --check-prefixes=OBJ %s
; RUN: llc -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff -filetype=obj -o %t64.o < %s
-; RUN: llvm-readobj --symbols %t64.o | FileCheck --check-prefixes=OBJ,OBJ64 %s
+; RUN: llvm-readobj --symbols %t64.o | FileCheck --check-prefixes=OBJ %s
source_filename = "1.f95"
; OBJ: Name: .file
; OBJ: Source Language ID: TB_Fortran (0x1)
-; OBJ32: CPU Version ID: TCPU_COM (0x3)
-; OBJ64: CPU Version ID: TCPU_PPC64 (0x2)
+; OBJ: CPU Version ID: TCPU_PWR7 (0x18)
; OBJ: Name: 1.f95
diff --git a/llvm/test/CodeGen/PowerPC/aix-func-dsc-gen.ll b/llvm/test/CodeGen/PowerPC/aix-func-dsc-gen.ll
index 4cca1b4d6f7ba..50221acc2b3ad 100644
--- a/llvm/test/CodeGen/PowerPC/aix-func-dsc-gen.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-func-dsc-gen.ll
@@ -17,7 +17,7 @@ entry:
; CHECK-NEXT: Value (SymbolTableIndex): 0x0
; CHECK-NEXT: Section: N_DEBUG
; CHECK-NEXT: Source Language ID: TB_CPLUSPLUS (0x9)
-; CHECK-NEXT: CPU Version ID: TCPU_COM (0x3)
+; CHECK-NEXT: CPU Version ID: TCPU_PWR7 (0x18)
; CHECK-NEXT: StorageClass: C_FILE (0x67)
; CHECK-NEXT: NumberOfAuxEntries: 2
; CHECK-NEXT: File Auxiliary Entry {
diff --git a/llvm/test/CodeGen/PowerPC/aix-llvm-intrinsic.ll b/llvm/test/CodeGen/PowerPC/aix-llvm-intrinsic.ll
index 50677f36e3f7a..dc849c4f8933f 100644
--- a/llvm/test/CodeGen/PowerPC/aix-llvm-intrinsic.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-llvm-intrinsic.ll
@@ -44,8 +44,7 @@ declare void @llvm.memset.p0.i32(ptr nocapture writeonly, i8, i32, i1 immarg)
; CHECKSYM-NEXT: Value (SymbolTableIndex): 0x0
; CHECKSYM-NEXT: Section: N_DEBUG
; CHECKSYM-NEXT: Source Language ID: TB_CPLUSPLUS (0x9)
-; CHECKSYM32-NEXT: CPU Version ID: TCPU_COM (0x3)
-; CHECKSYM64-NEXT: CPU Version ID: TCPU_PPC64 (0x2)
+; CHECKSYM-NEXT: CPU Version ID: TCPU_PWR (0x4)
; CHECKSYM-NEXT: StorageClass: C_FILE (0x67)
; CHECKSYM-NEXT: NumberOfAuxEntries: 2
; CHECKSYM: }
diff --git a/llvm/test/CodeGen/PowerPC/aix-tls-xcoff-reloc-large.ll b/llvm/test/CodeGen/PowerPC/aix-tls-xcoff-reloc-large.ll
index 63d927391936c..d943d9bd6cf10 100644
--- a/llvm/test/CodeGen/PowerPC/aix-tls-xcoff-reloc-large.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-tls-xcoff-reloc-large.ll
@@ -215,7 +215,7 @@ entry:
; SYM-NEXT: Value (SymbolTableIndex): 0x0
; SYM-NEXT: Section: N_DEBUG
; SYM-NEXT: Source Language ID: TB_CPLUSPLUS (0x9)
-; SYM-NEXT: CPU Version ID: TCPU_COM (0x3)
+; SYM-NEXT: CPU Version ID: TCPU_PWR (0x4)
; SYM-NEXT: StorageClass: C_FILE (0x67)
; SYM-NEXT: NumberOfAuxEntries: 2
; SYM-NEXT: File Auxiliary Entry {
diff --git a/llvm/test/CodeGen/PowerPC/aix-tls-xcoff-reloc.ll b/llvm/test/CodeGen/PowerPC/aix-tls-xcoff-reloc.ll
index c17b038a6960c..db1e770e04a1e 100644
--- a/llvm/test/CodeGen/PowerPC/aix-tls-xcoff-reloc.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-tls-xcoff-reloc.ll
@@ -176,7 +176,7 @@ entry:
; SYM-NEXT: Value (SymbolTableIndex): 0x0
; SYM-NEXT: Section: N_DEBUG
; SYM-NEXT: Source Language ID: TB_CPLUSPLUS (0x9)
-; SYM-NEXT: CPU Version ID: TCPU_COM (0x3)
+; SYM-NEXT: CPU Version ID: TCPU_PWR (0x4)
; SYM-NEXT: StorageClass: C_FILE (0x67)
; SYM-NEXT: NumberOfAuxEntries: 2
; SYM: Symbol {
diff --git a/llvm/test/CodeGen/PowerPC/aix-tls-xcoff-variables.ll b/llvm/test/CodeGen/PowerPC/aix-tls-xcoff-variables.ll
index f9a1a61617761..3c84aa1225d2e 100644
--- a/llvm/test/CodeGen/PowerPC/aix-tls-xcoff-variables.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-tls-xcoff-variables.ll
@@ -70,7 +70,7 @@
; SYMS-NEXT: Value (SymbolTableIndex): 0x0
; SYMS-NEXT: Section: N_DEBUG
; SYMS-NEXT: Source Language ID: TB_CPLUSPLUS (0x9)
-; SYMS-NEXT: CPU Version ID: TCPU_COM (0x3)
+; SYMS-NEXT: CPU Version ID: TCPU_PWR7 (0x18)
; SYMS-NEXT: StorageClass: C_FILE (0x67)
; SYMS-NEXT: NumberOfAuxEntries: 2
; SYMS: Symbol {
diff --git a/llvm/test/CodeGen/PowerPC/aix-weak.ll b/llvm/test/CodeGen/PowerPC/aix-weak.ll
index 7bf80ad19e9e0..3387eef8e43cb 100644
--- a/llvm/test/CodeGen/PowerPC/aix-weak.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-weak.ll
@@ -104,8 +104,7 @@ entry:
; CHECKSYM-NEXT: Value (SymbolTableIndex): 0x0
; CHECKSYM-NEXT: Section: N_DEBUG
; CHECKSYM-NEXT: Source Language ID: TB_CPLUSPLUS (0x9)
-; CHECKSYM32-NEXT: CPU Version ID: TCPU_COM (0x3)
-; CHECKSYM64-NEXT: CPU Version ID: TCPU_PPC64 (0x2)
+; CHECKSYM-NEXT: CPU Version ID: TCPU_PWR (0x4)
; CHECKSYM-NEXT: StorageClass: C_FILE (0x67)
; CHECKSYM-NEXT: NumberOfAuxEntries: 2
; CHECKSYM: Symbol {
diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-data.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-data.ll
index de937386b8b7d..e28751f10a12f 100644
--- a/llvm/test/CodeGen/PowerPC/aix-xcoff-data.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-data.ll
@@ -45,8 +45,9 @@
; CHECK-NOT: .toc
-; CHECK: .file
-; CHECK-NEXT: .csect ..text..[PR],5
+; CHECK: .file
+; CHECK-NEXT: .machine "pwr7"
+; CHECK-NEXT: .csect ..text..[PR],5
; CHECK: .csect .data[RW],5
; CHECK-NEXT: .globl ivar
@@ -212,8 +213,7 @@
; SYMS-NEXT: Value (SymbolTableIndex): 0x0
; SYMS-NEXT: Section: N_DEBUG
; SYMS-NEXT: Source Language ID: TB_CPLUSPLUS (0x9)
-; SYMS32-NEXT: CPU Version ID: TCPU_COM (0x3)
-; SYMS64-NEXT: CPU Version ID: TCPU_PPC64 (0x2)
+; SYMS-NEXT: CPU Version ID: TCPU_PWR7 (0x18)
; SYMS-NEXT: StorageClass: C_FILE (0x67)
; SYMS-NEXT: NumberOfAuxEntries: 2
; SYMS-NEXT: File Auxiliary Entry {
diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll
index 6599debbd41b4..541b3b1c19c05 100644
--- a/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll
@@ -163,8 +163,7 @@ declare i32 @b...
[truncated]
``````````
</details>
https://github.com/llvm/llvm-project/pull/95510
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