[llvm] [RFC][MC] Cache MCRegAliasIterator (PR #93510)

[Pierre van Houtryve via llvm-commits]

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@@ -20,6 +20,85 @@
 
 using namespace llvm;
 
+namespace {
+/// MCRegAliasIterator enumerates all registers aliasing Reg.  This iterator
+/// does not guarantee any ordering or that entries are unique.
+class MCRegAliasIteratorImpl {
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Pierre-vh wrote:

I would prefer keeping it outlined, the iteration logic isn't trivial and it feels better when it's encapsulated like this.
Most of it will likely just get inlined anyway.

https://github.com/llvm/llvm-project/pull/93510